diff --git a/doc/FPGAs.yml b/doc/FPGAs.yml index 6047bc1..a7c5843 100644 --- a/doc/FPGAs.yml +++ b/doc/FPGAs.yml @@ -190,6 +190,13 @@ Xilinx: Memory: OK Flash: OK + - Description: Kintex UltraScale + Model: + - xcku040 + URL: https://www.xilinx.com/products/silicon-devices/fpga/kintex-ultrascale.html#productTable + Memory: OK + Flash: NA + - Description: Spartan 3 Model: - xc3s200 @@ -252,7 +259,10 @@ Xilinx: Flash: NA - Description: ZynqMPSoC - Model: xczu2cg + Model: + - xczu2cg + - xczu9eg + - xczu11eg URL: https://www.xilinx.com/products/silicon-devices/soc/zynq-ultrascale-mpsoc.html Memory: OK Flash: NA diff --git a/src/part.hpp b/src/part.hpp index 43ee4f3..630fc18 100644 --- a/src/part.hpp +++ b/src/part.hpp @@ -31,6 +31,8 @@ static std::map fpga_list = { {0x03651093, {"xilinx", "kintex7", "xc7k325t", 6}}, {0x03656093, {"xilinx", "kintex7", "xc7k410t", 6}}, + {0x13822093, {"xilinx", "kintexus", "xcku040", 6}}, + {0x01414093, {"xilinx", "spartan3", "xc3s200", 6}}, {0x01c22093, {"xilinx", "spartan3", "xc3s500e", 6}}, @@ -65,9 +67,11 @@ static std::map fpga_list = { */ {0x08e22126, {"xilinx", "zynqmp_cfgn", "xczu2cg", 4}}, {0x08e70126, {"xilinx", "zynqmp_cfgn", "xczu9eg", 4}}, + {0x08e80126, {"xilinx", "zynqmp_cfgn","xczu11eg", 4}}, {0x04711093, {"xilinx", "zynqmp", "xczu2cg", 6}}, {0x04738093, {"xilinx", "zynqmp", "xczu9eg", 6}}, + {0x04740093, {"xilinx", "zynqmp", "xczu11eg", 6}}, {0x020f20dd, {"altera", "cyclone III/IV", "EP3C16/EP4CE15", 10}}, diff --git a/src/xilinx.cpp b/src/xilinx.cpp index 49bbca2..c1bffd4 100644 --- a/src/xilinx.cpp +++ b/src/xilinx.cpp @@ -65,6 +65,8 @@ Xilinx::Xilinx(Jtag *jtag, const std::string &filename, _fpga_family = ZYNQMP_FAMILY; } else if (family == "kintex7") { _fpga_family = KINTEX_FAMILY; + } else if (family == "kintexus") { + _fpga_family = KINTEXUS_FAMILY; } else if (family == "spartan3") { _fpga_family = SPARTAN3_FAMILY; if (_mode != Device::MEM_MODE) { diff --git a/src/xilinx.hpp b/src/xilinx.hpp index d07e231..e297268 100644 --- a/src/xilinx.hpp +++ b/src/xilinx.hpp @@ -155,6 +155,7 @@ class Xilinx: public Device, SPIInterface { SPARTAN7_FAMILY, ARTIX_FAMILY, KINTEX_FAMILY, + KINTEXUS_FAMILY, ZYNQ_FAMILY, ZYNQMP_FAMILY, XCF_FAMILY,