From 7f1f11d58d59b50bf1b96fb71b43cbada2447989 Mon Sep 17 00:00:00 2001
From: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
Date: Sat, 7 Mar 2020 18:46:41 +0100
Subject: [PATCH] add ulx2s and LFXP2-8E (lattice XP2)

---
 src/board.hpp | 1 +
 src/part.hpp  | 1 +
 2 files changed, 2 insertions(+)

diff --git a/src/board.hpp b/src/board.hpp
index 70126b0..492e93f 100644
--- a/src/board.hpp
+++ b/src/board.hpp
@@ -46,6 +46,7 @@ static std::map <std::string, target_cable_t> board_list = {
 	{"littleBee",  {"ft2232",     {}}},
 	{"spartanEdgeAccelBoard", {"",{}}},
 	{"tangnano",   {"ft2232",     {}}},
+	{"ulx2s",      {"ft232RL",  {FT232RL_RI, FT232RL_DSR, FT232RL_CTS, FT232RL_DCD}}},
 	{"ulx3s",      {"ft231X",   {FT232RL_DCD, FT232RL_DSR, FT232RL_RI, FT232RL_CTS}}}
 };
 
diff --git a/src/part.hpp b/src/part.hpp
index adfc007..a8de963 100644
--- a/src/part.hpp
+++ b/src/part.hpp
@@ -16,6 +16,7 @@ static std::map <int, fpga_model> fpga_list = {
 	{0x03620093, {"xilinx", "spartan7", "xc7s15ftgb196-1"}},
 	{0x020f30dd, {"altera", "cyclone 10 LP", "10CL025"}},
 	{0x612bd043, {"lattice", "MachXO3LF", "LCMX03LF-6900C"}},
+	{0x0129a043, {"lattice", "XP2", "LFXP2-8E"}},
 	{0x41111043, {"lattice", "ECP5", "LFE5U-25F-6BG256C"}},
 	{0x81113043, {"lattice", "ECP5-5G", "LFE5UM5G-85F-8BG381"}},
 	{0x1100581b, {"Gowin", "GW1N", "GW1NR-9"}},