From 7697341a681f9e6ef827839913fdd604cc8cdbf9 Mon Sep 17 00:00:00 2001 From: Ricardo Barbedo Date: Tue, 14 Feb 2023 11:44:45 +0100 Subject: [PATCH] Add documentation for Xilinx SPIx8 mode --- doc/FPGAs.yml | 2 +- doc/vendors/xilinx.rst | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/doc/FPGAs.yml b/doc/FPGAs.yml index 554579a..746ef3d 100644 --- a/doc/FPGAs.yml +++ b/doc/FPGAs.yml @@ -214,7 +214,7 @@ Xilinx: - xcvu9p URL: https://www.xilinx.com/products/silicon-devices/fpga/virtex-ultrascale-plus.html#productTable Memory: OK - Flash: NA + Flash: OK - Description: Spartan 3 Model: diff --git a/doc/vendors/xilinx.rst b/doc/vendors/xilinx.rst index 41c3bbe..1228ced 100644 --- a/doc/vendors/xilinx.rst +++ b/doc/vendors/xilinx.rst @@ -96,3 +96,22 @@ File load: officially supported. device/package format is something like xc7a35tcsg324 (arty model). See :ghsrc:`src/board.hpp `, or :ghsrc:`spiOverJtag ` directory for examples. + +Some boards with UltraScale FPGAs, like the VCU118, support the SPIx8 (Dual Quad SPI) configuration. +In this case, the ``spix8`` option ``write_cfgmem`` on the above example can be used to generate two ``.mcs`` files, +to fit bigger designs or for faster programming. Only ``.mcs`` files can be used to program the FPGA in this case. + +In this case, to load the two ``.mcs`` files: + +.. code-block:: bash + + openFPGALoader --board vcu118 -f --target-flash both --bitstream *.runs/impl_1/*_primary.mcs --secondary-bitstream *.runs/impl_1/*_secondary.mcs + +On these boards, each SPI flash can be programmed independently with the ``--target-flash`` option. +The default target is the ``primary`` flash. + +For example, to program only the secondary flash with arbitrary data not related to FPGA configuration: + +.. code-block:: bash + + openFPGALoader --board vcu118 -f --target-flash secondary --bitstream arbitrary_data