From 6578bed6aa69f3d205287352caae7f16de2f951e Mon Sep 17 00:00:00 2001
From: Sylvain Munaut <tnt@246tNt.com>
Date: Tue, 29 Mar 2022 10:19:25 +0200
Subject: [PATCH] part: Add support for ZynqMP Ultrascale Plus XCZU11EG

Signed-off-by: Sylvain Munaut <tnt@asuka.home.246tnt.com>
---
 src/part.hpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/part.hpp b/src/part.hpp
index 43ee4f3..c89c597 100644
--- a/src/part.hpp
+++ b/src/part.hpp
@@ -65,9 +65,11 @@ static std::map <int, fpga_model> fpga_list = {
 	 */
 	{0x08e22126, {"xilinx", "zynqmp_cfgn", "xczu2cg", 4}},
 	{0x08e70126, {"xilinx", "zynqmp_cfgn", "xczu9eg", 4}},
+	{0x08e80126, {"xilinx", "zynqmp_cfgn","xczu11eg", 4}},
 
 	{0x04711093, {"xilinx", "zynqmp",      "xczu2cg", 6}},
 	{0x04738093, {"xilinx", "zynqmp",      "xczu9eg", 6}},
+	{0x04740093, {"xilinx", "zynqmp",     "xczu11eg", 6}},
 
 	{0x020f20dd, {"altera", "cyclone III/IV", "EP3C16/EP4CE15", 10}},