From 57c0f16be4b8fa611de7626e67b5df9c33c81146 Mon Sep 17 00:00:00 2001
From: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
Date: Thu, 16 Sep 2021 07:41:05 +0200
Subject: [PATCH] ftdipp_mpsse: typo in setClkFreq

---
 src/ftdipp_mpsse.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/ftdipp_mpsse.cpp b/src/ftdipp_mpsse.cpp
index 6bf8102..a1aa65f 100644
--- a/src/ftdipp_mpsse.cpp
+++ b/src/ftdipp_mpsse.cpp
@@ -255,17 +255,17 @@ int FTDIpp_MPSSE::setClkFreq(uint32_t clkHZ)
 
 	if (use_divide_by_5) {
 		if (_clkHZ > 6000000) {
-			printWarn("Jtag probe limited to 60MHz");
+			printWarn("Jtag probe limited to 6MHz");
 			_clkHZ = 6000000;
 		}
 	} else {
 		if (_clkHZ > 30000000) {
 			printWarn("Jtag probe limited to 30MHz");
-			_clkHZ = 3000000;
+			_clkHZ = 30000000;
 		}
 	}
 
-	presc = (base_freq /(_clkHZ * 2)) -1;
+	presc = ((base_freq /_clkHZ) -1) / 2;
 	real_freq = base_freq / ((1+presc)*2);
 	if (real_freq > _clkHZ)
 		presc ++;