diff --git a/bpiOverJtag/bpiOverJtag_xc7k480tffg1156.bit.gz b/bpiOverJtag/bpiOverJtag_xc7k480tffg1156.bit.gz
index ad9bf93..5e8c91f 100644
Binary files a/bpiOverJtag/bpiOverJtag_xc7k480tffg1156.bit.gz and b/bpiOverJtag/bpiOverJtag_xc7k480tffg1156.bit.gz differ
diff --git a/bpiOverJtag/constr_xc7k480t_bpi_ffg1156.xdc b/bpiOverJtag/constr_xc7k480t_bpi_ffg1156.xdc
index 5f7ebef..3dd8bc4 100644
--- a/bpiOverJtag/constr_xc7k480t_bpi_ffg1156.xdc
+++ b/bpiOverJtag/constr_xc7k480t_bpi_ffg1156.xdc
@@ -4,6 +4,7 @@
 set_property CFGBVS GND [current_design]
 set_property CONFIG_VOLTAGE 1.8 [current_design]
 set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
+set_property BITSTREAM.CONFIG.UNUSEDPIN PULLNONE [current_design]
 
 ## Address bus [25:1]
 set_property -dict {PACKAGE_PIN AD26 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[1]}]
diff --git a/src/bpiFlash.cpp b/src/bpiFlash.cpp
index 063bd01..95926c0 100644
--- a/src/bpiFlash.cpp
+++ b/src/bpiFlash.cpp
@@ -357,7 +357,9 @@ bool BPIFlash::erase_block(uint32_t addr)
 
 	/* Verify erase by reading first few words */
 	if (_verbose) {
-		bpi_write(0, FLASH_CMD_READ_ARRAY);
+		/* Send READ_ARRAY to the erased block's address (not addr 0),
+		 * because multi-bank flash requires per-bank mode commands */
+		bpi_write(word_addr, FLASH_CMD_READ_ARRAY);
 		usleep(100);
 		char buf[128];
 		snprintf(buf, sizeof(buf), "Verify erase at 0x%06x:", addr);
diff --git a/src/xilinx.cpp b/src/xilinx.cpp
index 2cce842..308d636 100644
--- a/src/xilinx.cpp
+++ b/src/xilinx.cpp
@@ -880,11 +880,11 @@ void Xilinx::program_mem(ConfigBitstreamParser *bitfile)
 	 *    the TLR (Test-Logic-Reset) state.
 	 */
 	_jtag->shiftIR(get_ircode(_ircode_map, "JPROGRAM"), NULL, _irlen);
-	/* test */
+	/* Poll INIT_B (bit 4 of IR capture) until config memory is cleared */
 	tx_buf = get_ircode(_ircode_map, "BYPASS");
 	do {
 		_jtag->shiftIR(tx_buf, rx_buf, _irlen);
-	} while (!(rx_buf[0] &0x01));
+	} while (!(rx_buf[0] & 0x10));
 	/*
 	 * 8: Move into the RTI state.                        X     0   10,000(1)
 	 */