From 2ed5eb5eecafbb4a77305c9f3c36a4bff097ab64 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?St=C3=A9phane=20Chevigny?= Date: Sun, 13 Mar 2022 09:14:52 -0400 Subject: [PATCH] Rename 5cefa5f23 to 5ce523, add documentation for board and fpga --- doc/FPGAs.yml | 1 + doc/boards.yml | 9 ++++++++- spiOverJtag/Makefile | 2 +- spiOverJtag/build.py | 2 +- ...a5f23.rbf.gz => spiOverJtag_5ce523.rbf.gz} | Bin 121516 -> 121516 bytes src/board.hpp | 2 +- 6 files changed, 12 insertions(+), 4 deletions(-) rename spiOverJtag/{spiOverJtag_5cefa5f23.rbf.gz => spiOverJtag_5ce523.rbf.gz} (99%) diff --git a/doc/FPGAs.yml b/doc/FPGAs.yml index 3a8d908..02fa25b 100644 --- a/doc/FPGAs.yml +++ b/doc/FPGAs.yml @@ -76,6 +76,7 @@ Intel: - Description: Cyclone V E Model: - 5CEA2 + - 5CEA5 - 5CEBA4 URL: https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-v.html Memory: OK diff --git a/doc/boards.yml b/doc/boards.yml index a4deaad..ed1bbcd 100644 --- a/doc/boards.yml +++ b/doc/boards.yml @@ -354,6 +354,13 @@ Memory: OK Flash: OK +- ID: qmtechCycloneV_5ce523 + Description: QMTech CycloneV Core Board + URL: https://fr.aliexpress.com/item/1005001782703399.html + FPGA: Cyclone V 5CEFA5F23I7 + Memory: OK + Flash: OK + - ID: qmtechKintex7 Description: QMTech Kintex7 Core Board URL: https://www.aliexpress.com/item/1005003668804223.html @@ -390,7 +397,7 @@ Flash: NA - ID: SPEC150 - Description: CERN Simple PCIe FMC carrier SPEC + Description: CERN Simple PCIe FMC carrier SPEC URL: https://ohwr.org/project/spec150/wikis/home FPGA: Spartan6 xc6slx150Tfgg484 Memory: OK diff --git a/spiOverJtag/Makefile b/spiOverJtag/Makefile index 2ce988d..49557d2 100644 --- a/spiOverJtag/Makefile +++ b/spiOverJtag/Makefile @@ -6,7 +6,7 @@ XILINX_PARTS := xc6slx16ftg256 xc6slx16csg324 xc6slx45csg324 xc6slx100fgg484 \ xc7k325tffg676 xc7k325tffg900 XILINX_BIT_FILES := $(addsuffix .bit.gz,$(addprefix spiOverJtag_, $(XILINX_PARTS))) -ALTERA_PARTS := 10cl025256 ep4ce2217 ep4ce1523 5ce223 5ce423 5cefa5f23 +ALTERA_PARTS := 10cl025256 ep4ce2217 ep4ce1523 5ce223 5ce423 5ce523 ALTERA_BIT_FILES := $(addsuffix .rbf.gz, $(addprefix spiOverJtag_, $(ALTERA_PARTS))) BIT_FILES := $(ALTERA_BIT_FILES) $(XILINX_BIT_FILES) diff --git a/spiOverJtag/build.py b/spiOverJtag/build.py index e5003be..c8bb554 100755 --- a/spiOverJtag/build.py +++ b/spiOverJtag/build.py @@ -99,7 +99,7 @@ else: "ep4ce2217" : "EP4CE22F17C6", "ep4ce1523" : "EP4CE15F23C8", "5ce223" : "5CEFA2F23I7", - "5cefa5f23" : "5CEFA5F23I7", + "5ce523" : "5CEFA5F23I7", "5ce423" : "5CEBA4F23C8", "5cse423" : "5CSEMA4U23C6", "5cse623" : "5CSEBA6U23I7"}[part] diff --git a/spiOverJtag/spiOverJtag_5cefa5f23.rbf.gz b/spiOverJtag/spiOverJtag_5ce523.rbf.gz similarity index 99% rename from spiOverJtag/spiOverJtag_5cefa5f23.rbf.gz rename to spiOverJtag/spiOverJtag_5ce523.rbf.gz index 16b7ea258b41fe35bb7c983c85f4ce7f9f29b555..00b2ed32b8068c406f98636e6641d60d8ede59f1 100644 GIT binary patch delta 21 dcmZ3pm3_@tc6Rx04vx<+bQ{^XvNJBd1pr&r2wngH delta 21 dcmZ3pm3_@tc6Rx04i489I*sgG*%_DK0svCL2X6oX diff --git a/src/board.hpp b/src/board.hpp index b34728e..dce891e 100644 --- a/src/board.hpp +++ b/src/board.hpp @@ -161,7 +161,7 @@ static std::map board_list = { DFU_BOARD("orangeCrab", "", "dfu", 0x1209, 0x5af0, 0), JTAG_BOARD("qmtechCycloneIV", "ep4ce1523", "", 0, 0, CABLE_DEFAULT), JTAG_BOARD("qmtechCycloneV", "5ce223", "", 0, 0, CABLE_DEFAULT), - JTAG_BOARD("qmtechCycloneV_5cefa5f23", "5cefa5f23", "", 0,0, CABLE_DEFAULT), + JTAG_BOARD("qmtechCycloneV_5ce523", "5ce523", "", 0,0, CABLE_DEFAULT), JTAG_BOARD("qmtechKintex7", "xc7k325tffg676", "", 0, 0, CABLE_DEFAULT), JTAG_BOARD("genesys2", "xc7k325tffg900", "digilent_b", 0, 0, CABLE_DEFAULT), JTAG_BOARD("spec150", "xc6slx150tfgg484", "", 0, 0, CABLE_DEFAULT),