From 917e42127b7c4e786dcaee66eb52b8021b98e6ce Mon Sep 17 00:00:00 2001 From: Giovanni Bruni Date: Wed, 25 Oct 2023 17:43:49 +0200 Subject: [PATCH 1/3] lattice: fix bscan register initialization inside clearSRAM() For NEXUS family fpgas, the Bscan register is 362 bits long or 45.25 bytes => 46 bytes. This error was already correct when programming the sram. clearSRAM() is instead used when programming the spi flash memory. --- src/lattice.cpp | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/src/lattice.cpp b/src/lattice.cpp index 474c7b5..5143a04 100644 --- a/src/lattice.cpp +++ b/src/lattice.cpp @@ -135,6 +135,7 @@ using namespace std; #define READ_ECDSA_PUBKEY3 0x64 /* This command is used to read the fourth 128 bits of the ECDSA Public Key. */ #define ISC_NOOP 0xff /* This command is no operation command (NOOP) or null operation. */ #define LSC_DEVICE_CONTROL 0x7D /* Multiple commands. Bit 3: configuration reset */ +#define PRELOAD_SAMPLE 0x1C /* PRELOAD/SAMPLE jtag opcode. Nexus family has Bscan register 362 bits-long => 45.25 => 46 bytes */ #define PUBKEY_LENGTH_BYTES 64 /* length of the public key (MachXO3D) in bytes */ @@ -314,7 +315,7 @@ bool Lattice::program_mem() } else { tx_len = 26; } - wr_rd(0x1C, tx_buf, tx_len, NULL, 0); + wr_rd(PRELOAD_SAMPLE, tx_buf, tx_len, NULL, 0); /* LSC_REFRESH 0x79 -- "Equivalent to toggle PROGRAMN pin" * We REFRESH only if the fpga is in a status of error due to @@ -704,12 +705,19 @@ bool Lattice::clearSRAM() { uint32_t erase_op; - /* preload 0x1C */ - uint8_t tx_buf[26]; - memset(tx_buf, 0xff, 26); - wr_rd(0x1C, tx_buf, 26, NULL, 0); - - wr_rd(0xFf, NULL, 0, NULL, 0); + /* PRELOAD/SAMPLE 0x1C + * For NEXUS family fpgas, the Bscan register is 362 bits long or + * 45.25 bytes => 46 bytes + */ + uint8_t tx_buf[46]; + memset(tx_buf, 0xff, 46); + int tx_len; + if(_fpga_family == NEXUS_FAMILY){ + tx_len = 46; + } else { + tx_len = 26; + } + wr_rd(PRELOAD_SAMPLE, tx_buf, tx_len, NULL, 0); /* ISC Enable 0xC6 */ printInfo("Enable configuration: ", false); From d58a1c3fc7a7b7f22d77592dc14357311cddf82d Mon Sep 17 00:00:00 2001 From: Giovanni Bruni Date: Thu, 26 Oct 2023 11:30:24 +0200 Subject: [PATCH 2/3] lattice: correct mask for sram erase for NEXUS_FAMILY, as it is 0x00 --- src/lattice.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lattice.cpp b/src/lattice.cpp index 5143a04..981679c 100644 --- a/src/lattice.cpp +++ b/src/lattice.cpp @@ -729,7 +729,7 @@ bool Lattice::clearSRAM() printSuccess("DONE"); } - if (_fpga_family == MACHXO3D_FAMILY) + if (_fpga_family == MACHXO3D_FAMILY || _fpga_family == NEXUS_FAMILY) erase_op = 0x0; else erase_op = FLASH_ERASE_SRAM; From fa5ff873e4b8a281cfaa8f669b23948d686ccdb2 Mon Sep 17 00:00:00 2001 From: Giovanni Bruni Date: Wed, 8 Nov 2023 09:49:14 +0100 Subject: [PATCH 3/3] lattice.cpp: restore bypass instruction in clearSRAM() --- src/lattice.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/lattice.cpp b/src/lattice.cpp index 981679c..5dc8b36 100644 --- a/src/lattice.cpp +++ b/src/lattice.cpp @@ -719,6 +719,8 @@ bool Lattice::clearSRAM() } wr_rd(PRELOAD_SAMPLE, tx_buf, tx_len, NULL, 0); + wr_rd(0xFF, NULL, 0, NULL, 0); + /* ISC Enable 0xC6 */ printInfo("Enable configuration: ", false); if (!EnableISC(0x00)) {