From 18a24c65ea2afac48f059afd1306e19a821964c0 Mon Sep 17 00:00:00 2001 From: Rod Whitby Date: Sat, 19 Feb 2022 13:03:32 +1030 Subject: [PATCH] Add spiOverJtag support for Xilinx xc7k325tffg676 part. --- doc/FPGAs.yml | 2 +- spiOverJtag/constr_xc7k_ffg676.xdc | 10 ++++++++++ spiOverJtag/spiOverJtag_xc7k325tffg676.bit.gz | Bin 0 -> 12544 bytes spiOverJtag/xilinx_spiOverJtag.tcl | 2 ++ 4 files changed, 13 insertions(+), 1 deletion(-) create mode 100644 spiOverJtag/constr_xc7k_ffg676.xdc create mode 100644 spiOverJtag/spiOverJtag_xc7k325tffg676.bit.gz diff --git a/doc/FPGAs.yml b/doc/FPGAs.yml index 97d6968..81b376a 100644 --- a/doc/FPGAs.yml +++ b/doc/FPGAs.yml @@ -178,7 +178,7 @@ Xilinx: - xc7k325t URL: https://www.xilinx.com/products/silicon-devices/fpga/kintex-7.html#productTable Memory: OK - Flash: NT + Flash: OK - Description: Spartan 3 Model: xc3s200 diff --git a/spiOverJtag/constr_xc7k_ffg676.xdc b/spiOverJtag/constr_xc7k_ffg676.xdc new file mode 100644 index 0000000..b64bfdf --- /dev/null +++ b/spiOverJtag/constr_xc7k_ffg676.xdc @@ -0,0 +1,10 @@ +set_property CFGBVS VCCO [current_design] +set_property CONFIG_VOLTAGE 3.3 [current_design] +set_property BITSTREAM.CONFIG.SPI_BUSWIDTH {4} [current_design] + +set_property -dict {PACKAGE_PIN C23 IOSTANDARD LVTTL} [get_ports {csn}] +set_property -dict {PACKAGE_PIN B24 IOSTANDARD LVTTL} [get_ports {sdi_dq0}] +set_property -dict {PACKAGE_PIN A25 IOSTANDARD LVTTL} [get_ports {sdo_dq1}] +set_property -dict {PACKAGE_PIN B22 IOSTANDARD LVTTL} [get_ports {wpn_dq2}] +set_property -dict {PACKAGE_PIN A22 IOSTANDARD LVTTL} [get_ports {hldn_dq3}] + diff --git a/spiOverJtag/spiOverJtag_xc7k325tffg676.bit.gz b/spiOverJtag/spiOverJtag_xc7k325tffg676.bit.gz new file mode 100644 index 0000000000000000000000000000000000000000..4df3112576e7e5ee5dfbf990fd83b8677f6602b9 GIT binary patch literal 12544 zcmeI$eKeG59|!O|u_^NM*poR8tF7HUD5D()gAq$nrjXYruj5@ZLJX6cXg6g=D>WLz zpqlkE7=yfojapNUEu$$iVlWslOC^KMX3uIn=Q;b|?m18AT-QI>b?)zV{m$?H-1q&@ zt(7J(-%3{Yht@|ELJyw`Jb56-FW4s@Zyb*N#waEzC>Ujo()SOIfhM_)2aZ|6pqJ#Q zXDd^w!yA=CQ_zXkrF1*z)Pi)>X9p3cdfP*uW%KTQ`xE7iA!^GVN_vJreg@v|)fHAY zq(B-lSgy!ZcO76E1FfME)3LvkaLV%Gb+RxK6q;V+0E9l94H8K-keqZC7cKHe1*yPPR zm2=)Fz0R8*Q?dR{vB`Q68lto#30CwWO%+K<`28v&+rkW=NVe4BB%H#mZ~`oZ{ho+V z%>wib1U>-)1Ad;6r@E^m2Ti%~MyuqaZ&W#N-D=-Wze-WDvIpVCN(H*j{30VZoBS=b zHGL5N_!@`Kt{FUPTXUn@h#47Sa)^TENeyFV6~b>SQ5K0};)Fbh(Y;tGhe4)uZZAT$O9yGz zs!1Li3KMZxdAQDI5M(_jdcWHm84K~!g|cg#p=U04so|S&s(s0nggtN;SN%ise&L4l zxO=XiZ9!3m+-fi4Nx_@(fAiDREo-RpvBkhyERvL2;M64#x$zP;TCkB`AD5%ypZ)O6 zL(ds@5!+L5c-OzEH?Sv3~bxmqm*%%AId;|i2i4Byh89!Ha&r|qmu4-y}(JC z@Yl^i5T#@@UXU-u?Aw;<{qWw4`|=+huZ(JFx%!KXi>91#{)_LJ-4SV}<10tEcNfeV z!1$Ye0$G}O4%vmySjlCd(!Hg&cJLN&+i=`3Gje5rJ)1uxO8MJSmUw>j5*_mR;jRAK zf%mg-p2o5|{ffEG*U)hT;l_`We|FhA+A9&($C{2TjO;5_GlOxbmWg$jybj!63KQGE zaGWTG^{tdVu9w&@?Cc#ZJzK1#b&lC>;^K^&N8Wgadu>N8T6$|_#=6H#`YMwiMI@06 zCGIZ_s5398y%RaB}*>nm=Hq^>-#E2+#hquBUnAqVL;^b@0oF#9>>Zhe*@!dZqCRn7a<> z{``tQS|BE)y-qsPF*90|M{M64wu=^TA#M&2)3U+_s4*j@NQ;4vD1Yrv_8XVunwwV@b>*94xK$YOKgC-p)hDhziZ{1Zu+ktoqC_1DOHaK63wbz9 zZ_^vk=hn6hCa})^w7M_!9l2OV9CL+PMT2IGJt0O}O^=O;kB}NEU;YfH&f3<1fK8Z&| zNpx*r`o(c~*~YXo-0TR-X>$5&^j8+~%_b?5}Fesat% zA38srwXx39K}AkD*C~5i2I?DUYmEkVYO9ev)iZnBlE%v_LTsJ=&2@IFRc{*dZIAk! zkM^H^89_B500e*l5C8%|00;m9An%e2tyxWAg zK$OUflJwHL%ruMMdC%2e4Y|%VZ#2S3ti5 D&yx`P literal 0 HcmV?d00001 diff --git a/spiOverJtag/xilinx_spiOverJtag.tcl b/spiOverJtag/xilinx_spiOverJtag.tcl index d9a436e..1a8d6ad 100644 --- a/spiOverJtag/xilinx_spiOverJtag.tcl +++ b/spiOverJtag/xilinx_spiOverJtag.tcl @@ -14,6 +14,7 @@ set grade [dict create \ xc7a75tfgg484 -2 \ xc7a100tfgg484 -2 \ xc7a200tsbg484 -1 \ + xc7k325tffg676 -1 \ xc7s50csga324 -1 \ ] @@ -26,6 +27,7 @@ set pkg_name [dict create \ xc7a100tfgg484 xc7a_fgg484 \ xc7a200tsbg484 xc7a_sbg484 \ xc7a200tfbg484 xc7a_fbg484 \ + xc7k325tffg676 xc7k_ffg676 \ xc7s50csga324 xc7s_csga324 \ ]