diff --git a/doc/FPGAs.yml b/doc/FPGAs.yml
index 97d6968..81b376a 100644
--- a/doc/FPGAs.yml
+++ b/doc/FPGAs.yml
@@ -178,7 +178,7 @@ Xilinx:
       - xc7k325t
     URL: https://www.xilinx.com/products/silicon-devices/fpga/kintex-7.html#productTable
     Memory: OK
-    Flash: NT
+    Flash: OK
 
   - Description: Spartan 3
     Model: xc3s200
diff --git a/spiOverJtag/constr_xc7k_ffg676.xdc b/spiOverJtag/constr_xc7k_ffg676.xdc
new file mode 100644
index 0000000..b64bfdf
--- /dev/null
+++ b/spiOverJtag/constr_xc7k_ffg676.xdc
@@ -0,0 +1,10 @@
+set_property CFGBVS VCCO [current_design]
+set_property CONFIG_VOLTAGE 3.3 [current_design]
+set_property BITSTREAM.CONFIG.SPI_BUSWIDTH {4} [current_design]
+
+set_property -dict {PACKAGE_PIN C23 IOSTANDARD LVTTL} [get_ports {csn}]
+set_property -dict {PACKAGE_PIN B24 IOSTANDARD LVTTL} [get_ports {sdi_dq0}]
+set_property -dict {PACKAGE_PIN A25 IOSTANDARD LVTTL} [get_ports {sdo_dq1}]
+set_property -dict {PACKAGE_PIN B22 IOSTANDARD LVTTL} [get_ports {wpn_dq2}]
+set_property -dict {PACKAGE_PIN A22 IOSTANDARD LVTTL} [get_ports {hldn_dq3}]
+
diff --git a/spiOverJtag/spiOverJtag_xc7k325tffg676.bit.gz b/spiOverJtag/spiOverJtag_xc7k325tffg676.bit.gz
new file mode 100644
index 0000000..4df3112
Binary files /dev/null and b/spiOverJtag/spiOverJtag_xc7k325tffg676.bit.gz differ
diff --git a/spiOverJtag/xilinx_spiOverJtag.tcl b/spiOverJtag/xilinx_spiOverJtag.tcl
index d9a436e..1a8d6ad 100644
--- a/spiOverJtag/xilinx_spiOverJtag.tcl
+++ b/spiOverJtag/xilinx_spiOverJtag.tcl
@@ -14,6 +14,7 @@ set grade [dict create \
 	xc7a75tfgg484  -2 \
 	xc7a100tfgg484 -2 \
 	xc7a200tsbg484 -1 \
+	xc7k325tffg676 -1 \
 	xc7s50csga324  -1 \
 	]
 
@@ -26,6 +27,7 @@ set pkg_name [dict create \
 	xc7a100tfgg484 xc7a_fgg484 \
 	xc7a200tsbg484 xc7a_sbg484 \
 	xc7a200tfbg484 xc7a_fbg484 \
+	xc7k325tffg676 xc7k_ffg676 \
 	xc7s50csga324  xc7s_csga324 \
 	]