From 8e20f1eb7d680d6d379071c709c542e3a44d7cc9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bastian=20L=C3=B6her?= <b.loeher@gsi.de>
Date: Wed, 15 Feb 2023 15:06:02 +0100
Subject: [PATCH] Fix typo in part name and family.

---
 src/part.hpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/part.hpp b/src/part.hpp
index 80888cc..8a06dde 100644
--- a/src/part.hpp
+++ b/src/part.hpp
@@ -50,7 +50,7 @@ static std::map <uint32_t, fpga_model> fpga_list = {
 	{0x037c4093, {"xilinx", "spartan7", "xc7s25", 6}},
 	{0x0362f093, {"xilinx", "spartan7", "xc7s50", 6}},
 
-	{0x06e5d093, {"xilinx", "xa2c",     "xa2c64a",   8}},
+	{0x06e5d093, {"xilinx", "xc2c",     "xc2c64a",   8}},
 	{0x06e1c093, {"xilinx", "xc2c",     "xc2c32a",   8}},
 	{0x09602093, {"xilinx", "xc9500xl", "xc9536xl",  8}},
 	{0x09604093, {"xilinx", "xc9500xl", "xc9572xl",  8}},