## BPI Flash over JTAG constraints for xc7k480tffg1156
## Pin assignments from YPCB-00338-1P1 board

set_property CFGBVS GND [current_design]
set_property CONFIG_VOLTAGE 1.8 [current_design]
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property BITSTREAM.CONFIG.UNUSEDPIN PULLNONE [current_design]

## Address bus [25:1]
set_property -dict {PACKAGE_PIN AD26 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[1]}]
set_property -dict {PACKAGE_PIN AC25 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[2]}]
set_property -dict {PACKAGE_PIN AC29 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[3]}]
set_property -dict {PACKAGE_PIN AC28 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[4]}]
set_property -dict {PACKAGE_PIN AD27 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[5]}]
set_property -dict {PACKAGE_PIN AC27 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[6]}]
set_property -dict {PACKAGE_PIN AB25 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[7]}]
set_property -dict {PACKAGE_PIN AB28 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[8]}]
set_property -dict {PACKAGE_PIN AB27 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[9]}]
set_property -dict {PACKAGE_PIN AB26 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[10]}]
set_property -dict {PACKAGE_PIN AA26 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[11]}]
set_property -dict {PACKAGE_PIN AA31 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[12]}]
set_property -dict {PACKAGE_PIN AA30 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[13]}]
set_property -dict {PACKAGE_PIN AB33 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[14]}]
set_property -dict {PACKAGE_PIN AB32 IOSTANDARD LVCMOS18} [get_ports {bpi_addr[15]}]
set_property -dict {PACKAGE_PIN Y32  IOSTANDARD LVCMOS18} [get_ports {bpi_addr[16]}]
set_property -dict {PACKAGE_PIN P32  IOSTANDARD LVCMOS18} [get_ports {bpi_addr[17]}]
set_property -dict {PACKAGE_PIN R32  IOSTANDARD LVCMOS18} [get_ports {bpi_addr[18]}]
set_property -dict {PACKAGE_PIN U33  IOSTANDARD LVCMOS18} [get_ports {bpi_addr[19]}]
set_property -dict {PACKAGE_PIN T31  IOSTANDARD LVCMOS18} [get_ports {bpi_addr[20]}]
set_property -dict {PACKAGE_PIN T30  IOSTANDARD LVCMOS18} [get_ports {bpi_addr[21]}]
set_property -dict {PACKAGE_PIN U31  IOSTANDARD LVCMOS18} [get_ports {bpi_addr[22]}]
set_property -dict {PACKAGE_PIN U30  IOSTANDARD LVCMOS18} [get_ports {bpi_addr[23]}]
set_property -dict {PACKAGE_PIN N34  IOSTANDARD LVCMOS18} [get_ports {bpi_addr[24]}]
set_property -dict {PACKAGE_PIN P34  IOSTANDARD LVCMOS18} [get_ports {bpi_addr[25]}]

## Data bus [15:0] - bidirectional
set_property -dict {PACKAGE_PIN AA33 IOSTANDARD LVCMOS18} [get_ports {bpi_dq[0]}]
set_property -dict {PACKAGE_PIN AA34 IOSTANDARD LVCMOS18} [get_ports {bpi_dq[1]}]
set_property -dict {PACKAGE_PIN Y33  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[2]}]
set_property -dict {PACKAGE_PIN Y34  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[3]}]
set_property -dict {PACKAGE_PIN V32  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[4]}]
set_property -dict {PACKAGE_PIN V33  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[5]}]
set_property -dict {PACKAGE_PIN W31  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[6]}]
set_property -dict {PACKAGE_PIN W32  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[7]}]
set_property -dict {PACKAGE_PIN W30  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[8]}]
set_property -dict {PACKAGE_PIN V25  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[9]}]
set_property -dict {PACKAGE_PIN W25  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[10]}]
set_property -dict {PACKAGE_PIN V29  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[11]}]
set_property -dict {PACKAGE_PIN W29  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[12]}]
set_property -dict {PACKAGE_PIN V28  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[13]}]
set_property -dict {PACKAGE_PIN W24  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[14]}]
set_property -dict {PACKAGE_PIN Y24  IOSTANDARD LVCMOS18} [get_ports {bpi_dq[15]}]

## Control signals
set_property -dict {PACKAGE_PIN V30  IOSTANDARD LVCMOS18} [get_ports {bpi_ce_n}]
set_property -dict {PACKAGE_PIN T33  IOSTANDARD LVCMOS18} [get_ports {bpi_oe_n}]
set_property -dict {PACKAGE_PIN T34  IOSTANDARD LVCMOS18} [get_ports {bpi_we_n}]
set_property -dict {PACKAGE_PIN M31  IOSTANDARD LVCMOS18} [get_ports {bpi_adv_n}]
