From f1cd9c2596d60abf20157e7b49a3d8a8ba0e5775 Mon Sep 17 00:00:00 2001
From: Giles Atkinson <“gatk555@gmail.com”>
Date: Sat, 5 Aug 2023 13:49:11 +0100
Subject: [PATCH 1/2] Fix a crash when trying to auto-bridge a real-valued
 event node and improve an error message.

---
 src/xspice/evt/evtcheck_nodes.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/xspice/evt/evtcheck_nodes.c b/src/xspice/evt/evtcheck_nodes.c
index 3bbdaebfb..9cf51b9af 100644
--- a/src/xspice/evt/evtcheck_nodes.c
+++ b/src/xspice/evt/evtcheck_nodes.c
@@ -512,7 +512,8 @@ static struct bridge *find_bridge(Evt_Node_Info_t  *event_node,
     }
 
     if (!ok) {
-        vcc = nupa_get_param(vcc_parm, &ok);
+        if (vcc_parm)
+            vcc = nupa_get_param(vcc_parm, &ok);
         if (!ok) {
             if (event_node->udn_index == 0)
                 vcc = 3.3; // Fallback default for digital.
@@ -710,9 +711,13 @@ bool Evtcheck_nodes(
              if (strcmp(event_node->name, analog_node->name) == 0) {
                  if (show == AB_OFF) {
                      if (cp_getvar("probe_alli_given", CP_BOOL, NULL, 0))
-                         fprintf(stderr, "\nDot command '.probe alli' and digital nodes are not compatible.\n");
+                         fprintf(stderr,
+                                 "\nDot command '.probe alli' and "
+                                 "digital nodes are not compatible.\n");
                      FREE(errMsg);
-                     errMsg = copy("Auto bridging is switched off");
+                     errMsg = tprintf("Auto bridging is switched off "
+                                      "but node %s is mixed-type.\n",
+                                      event_node->name);
                      return FALSE;      // Auto-bridge disabled
                  }
                  bridge = find_bridge(event_node, ckt, &bridge_list);

From b4c1138a4f80e5d94743d7eb9df3c41b07d3176d Mon Sep 17 00:00:00 2001
From: Holger Vogt <holger.vogt@uni-due.de>
Date: Sat, 5 Aug 2023 23:40:45 +0200
Subject: [PATCH 2/2] Transformer examples, (three different methods) Single
 primary and secondary windings

More to come (multiple ports, core saturation)
---
 examples/various/transformers1.cir | 60 ++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)
 create mode 100644 examples/various/transformers1.cir

diff --git a/examples/various/transformers1.cir b/examples/various/transformers1.cir
new file mode 100644
index 000000000..552be7550
--- /dev/null
+++ b/examples/various/transformers1.cir
@@ -0,0 +1,60 @@
+ngspice transformers
+* single primary, single secondary, no core saturation
+
+* sources
+V1 1 0 dc 0 ac 1 sin (0 1 1k)
+
+Xtr1 1 0 2 0 tr1
+
+Xtr2 1 0 12 0 tr2
+
+Xtr3 1 0 22 0 tr3
+
+.tran 1u 10m
+
+* transformer 1
+* ngspice manual 3.3.10
+.subckt tr1 p1 p2 s1 s2
+  Rp1 p1 pint1 1m ; primary series resistance
+  Rs1 s1 sint1 1m ; secondary series resistance
+  L1 pint1 p2 1m ; primary inductance
+  L2 sint1 s2 4m ; secondary inductance
+  K1 L1 L2 0.98 ; coupling constant
+.ends
+
+* transformer 2
+* ngspice manual 12.2.20 and 12.2.21
+* px primary nodes, sx secondary nodes of electric circuit
+* mcx nodes of magnetic circuit 
+.subckt tr2 p1 p2 s1 s2
+  Rp1 p1 pint1 1m ; primary series resistance
+  Rs1 s1 sint1 1m ; secondary series resistance
+  a1 (pint1 pint2) (mc1 0) primary1
+  .model primary1 lcouple(num_turns=120)
+  a2 (sint1 s2) (0 mc2) secondary1
+  .model secondary1 lcouple(num_turns=240)
+  Rreluctance mc1 mc2 1000
+  Lleak pint2 p2 1u ; (primary) leakage inductance
+.ends
+
+* transformer 3
+* C.P. Basso, Switched Mode Power Supplies, 2nd Ed., p. 406
+.subckt tr3 p1 p2 s1 s2 params: RATIO=2
+  Rp1 p1 pint1 1m ; primary series resistance
+  Rs1 sint1 s1 1m ; secondary series resistance
+  Lp pint1 pint2 1m ; primary inductance
+  Rp pint1 pint2 1Meg ; primary parallel resistance
+  E 5 s2 pint1 pint2 {RATIO}
+  F pint1 pint2 VM {RATIO}
+  VM 5 sint1 0
+  Lleak pint2 p2 1u ; (primary) leakage inductance
+.ends
+
+.control
+run
+set xbrushwidth=2
+plot V(1) v(2) V(1)+5 V(12)+5 V(1)+10 V(22)+10
+.endc
+
+.end
+