From ed0ab4cc0d5250c4692d62a82c7e9a2478344c5b Mon Sep 17 00:00:00 2001 From: Holger Vogt Date: Tue, 27 May 2025 14:29:59 +0200 Subject: [PATCH] CMOS simple and slow OpAmp example --- examples/xspice/see/CMOSOpAmp/CMOS-OP1.cir | 33 ++++++++++++++ examples/xspice/see/CMOSOpAmp/cmos_sub.mod | 13 ++++++ examples/xspice/see/CMOSOpAmp/modelcard.nmos | 46 ++++++++++++++++++++ examples/xspice/see/CMOSOpAmp/modelcard.pmos | 38 ++++++++++++++++ examples/xspice/see/CMOSOpAmp/seegen4.mod | 9 ++++ 5 files changed, 139 insertions(+) create mode 100644 examples/xspice/see/CMOSOpAmp/CMOS-OP1.cir create mode 100644 examples/xspice/see/CMOSOpAmp/cmos_sub.mod create mode 100644 examples/xspice/see/CMOSOpAmp/modelcard.nmos create mode 100644 examples/xspice/see/CMOSOpAmp/modelcard.pmos create mode 100644 examples/xspice/see/CMOSOpAmp/seegen4.mod diff --git a/examples/xspice/see/CMOSOpAmp/CMOS-OP1.cir b/examples/xspice/see/CMOSOpAmp/CMOS-OP1.cir new file mode 100644 index 000000000..2e2b2e480 --- /dev/null +++ b/examples/xspice/see/CMOSOpAmp/CMOS-OP1.cir @@ -0,0 +1,33 @@ +.title KiCad schematic +.include "cmos_sub.mod" +.include "seegen4.mod" +V1 Vcc 0 DC 3.3 +XU1 VGP2 VGP4P8 Vbias VSN4N8 seegen4 +XMN9 Vbias Vbias 0 0 NCH W=5u L=1.4u +V5 in+ 0 DC 1.65 +R1 out in- 100k +R2 in in- 20k +V4 in 0 DC 1.65 SIN( 1.65 100m 1k 0 0 0 ) AC 1 +XMN3 out Vbias 0 0 NCH W=17.4u L=1.4u +C2 out 0 2p +XMP2 out VGP2 Vcc Vcc PCH W=14.5u L=1.4u +C1 VGP2 out 1.2p +XMP4 VGP4P8 VGP4P8 Vcc Vcc PCH W=2.8u L=1.4u +I1 Vcc Vbias 12u +XMN4 VGP4P8 in- VSN4N8 0 NCH W=2.8u L=1.4u +XMN8 VGP2 in+ VSN4N8 0 NCH W=2.8u L=1.4u +XMN2 VSN4N8 Vbias 0 0 NCH W=5u L=1.4u +XMP8 VGP2 VGP4P8 Vcc Vcc PCH W=2.8u L=1.4u + +.control +set xbrushwidth=2 + +tran 20n 2m +plot v(VGP4P8) +plot in out + +ac dec 10 1 1Meg +plot db(out) +.endc + +.end diff --git a/examples/xspice/see/CMOSOpAmp/cmos_sub.mod b/examples/xspice/see/CMOSOpAmp/cmos_sub.mod new file mode 100644 index 000000000..c72096db9 --- /dev/null +++ b/examples/xspice/see/CMOSOpAmp/cmos_sub.mod @@ -0,0 +1,13 @@ +* subcircuit model file + +.include modelcard.nmos +.include modelcard.pmos + +.subckt NCH D G S B W=1 L=1 +MN1 D G S B N1 W={W} L={L} AS={3*L*W} AD={3*L*W} PS={6*L+W} AS={6*L+W} +.ends + + +.subckt PCH D G S B W=1 L=1 +MP1 D G S B P1 W={W} L={L} AS={3*L*W} AD={3*L*W} PS={6*L+W} AS={6*L+W} +.ends diff --git a/examples/xspice/see/CMOSOpAmp/modelcard.nmos b/examples/xspice/see/CMOSOpAmp/modelcard.nmos new file mode 100644 index 000000000..06885ff57 --- /dev/null +++ b/examples/xspice/see/CMOSOpAmp/modelcard.nmos @@ -0,0 +1,46 @@ +*model = bsim3v3 +*Berkeley Spice Compatibility +*http://bsim.berkeley.edu/BSIM4/BSIM3/ftpv330.zip +* Lmin= .35 Lmax= 20 Wmin= .6 Wmax= 20 +.model N1 NMOS ++Level= 8 ++version=3.3.0 ++Tnom=27.0 ++Acnqsmod=1 elm=3 ++Capmod=3 ++Nch= 2.498E+17 Tox=9E-09 Xj=1.00000E-07 ++Lint=9.36e-8 Wint=1.47e-7 ++Lintnoi=1e-9 ++Vth0= .6322 K1= .756 K2= -3.83e-2 K3= -2.612 ++Dvt0= 2.812 Dvt1= 0.462 Dvt2=-9.17e-2 ++Nlx= 3.52291E-08 W0= 1.163e-6 ++K3b= 2.233 ++Vsat= 86301.58 Ua= 6.47e-9 Ub= 4.23e-18 Uc=-4.706281E-11 ++Rdsw= 650 U0= 388.3203 wr=1 ++A0= .3496967 Ags=.1 B0=0.546 B1= 1 ++Dwg = -6.0E-09 Dwb = -3.56E-09 Prwb = -.213 ++Keta=-3.605872E-02 A1= 2.778747E-02 A2= .9 ++Voff=-6.735529E-02 NFactor= 1.139926 Cit= 1.622527E-04 ++Cdsc=-2.147181E-05 ++Cdscb= 0 Dvt0w = 0 Dvt1w = 0 Dvt2w = 0 ++Cdscd = 0 Prwg = 0 ++Eta0= 1.0281729E-02 Etab=-5.042203E-03 ++Dsub= .31871233 ++Pclm= 1.114846 Pdiblc1= 2.45357E-03 Pdiblc2= 6.406289E-03 ++Drout= .31871233 Pscbe1= 5000000 Pscbe2= 5E-09 Pdiblcb = -.234 ++Pvag= 0 delta=0.01 ++ Wl = 0 Ww = -1.420242E-09 Wwl = 0 ++ Wln = 0 Wwn = .2613948 Ll = 1.300902E-10 ++ Lw = 0 Lwl = 0 Lln = .316394 ++ Lwn = 0 ++kt1=-.3 kt2=-.051 ++At= 22400 ++Ute=-1.48 ++Ua1= 3.31E-10 Ub1= 2.61E-19 Uc1= -3.42e-10 ++Kt1l=0 Kt1=-0.1 Prt=764.3 + + + + + + diff --git a/examples/xspice/see/CMOSOpAmp/modelcard.pmos b/examples/xspice/see/CMOSOpAmp/modelcard.pmos new file mode 100644 index 000000000..ab86a38ee --- /dev/null +++ b/examples/xspice/see/CMOSOpAmp/modelcard.pmos @@ -0,0 +1,38 @@ +*model = bsim3v3 +*Berkeley Spice Compatibility +*http://bsim.berkeley.edu/BSIM4/BSIM3/ftpv330.zip +* Lmin= .35 Lmax= 20 Wmin= .6 Wmax= 20 +.model P1 PMOS ++Level= 8 ++version=3.3.0 ++Tnom=27.0 ++Acnqsmod=1 elm=3 ++Nch= 3.533024E+17 Tox=9E-09 Xj=1.00000E-07 ++Lint=6.23e-8 Wint=1.22e-7 ++Lintnoi=1e-9 ++Vth0=-.6732829 K1= .8362093 K2=-8.606622E-02 K3= 1.82 ++Dvt0= 1.903801 Dvt1= .5333922 Dvt2=-.1862677 ++Nlx= 1.28e-8 W0= 2.1e-6 ++K3b= -0.24 Prwg=-0.001 Prwb=-0.323 ++Vsat= 103503.2 Ua= 1.39995E-09 Ub= 1.e-19 Uc=-2.73e-11 ++ Rdsw= 460 U0= 138.7609 ++A0= .4716551 Ags=0.12 ++Keta=-1.871516E-03 A1= .3417965 A2= 0.83 ++Voff=-.074182 NFactor= 1.54389 Cit=-1.015667E-03 ++Cdsc= 8.937517E-04 ++Cdscb= 1.45e-4 Cdscd=1.04e-4 ++ Dvt0w=0.232 Dvt1w=4.5e6 Dvt2w=-0.0023 ++Eta0= 6.024776E-02 Etab=-4.64593E-03 ++Dsub= .23222404 ++Pclm= .989 Pdiblc1= 2.07418E-02 Pdiblc2= 1.33813E-3 ++Drout= .3222404 Pscbe1= 118000 Pscbe2= 1E-09 ++Pvag= 0 ++kt1= -0.25 kt2= -0.032 prt=64.5 ++At= 33000 ++Ute= -1.5 ++Ua1= 4.312e-9 Ub1= 6.65e-19 Uc1= 0 ++Kt1l=0 + + + + diff --git a/examples/xspice/see/CMOSOpAmp/seegen4.mod b/examples/xspice/see/CMOSOpAmp/seegen4.mod new file mode 100644 index 000000000..e2d4d0b07 --- /dev/null +++ b/examples/xspice/see/CMOSOpAmp/seegen4.mod @@ -0,0 +1,9 @@ +* SEE generator model +.subckt seegen4 n1 n2 n3 n4 +.param tochar = 1e-13 +.param talpha = 500p tbeta=20p +.param Inull = 'tochar/(talpha-tbeta)' +* Eponential current source without control input +aseegen1 NULL [%i(n1) %i(n2) %i(n3) %i(n4)] seemod1 +.model seemod1 seegen (tdelay = 0.62m tperiod=0.1m inull='Inull' perlim=FALSE) +.ends \ No newline at end of file