From d2b18e6fad34fa605d48a6c540c47d6438740e94 Mon Sep 17 00:00:00 2001
From: rlar <rlar>
Date: Sun, 23 Jul 2017 20:13:11 +0200
Subject: [PATCH] modelcard.nmos.1, bsimcmg benchmark, 'D' is an instance
 parameter !

---
 bsimcmg_benchmark_test/idvdnmos.sp      | 2 +-
 bsimcmg_benchmark_test/idvgnmos.sp      | 2 +-
 bsimcmg_benchmark_test/modelcard.nmos.1 | 1 -
 3 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/bsimcmg_benchmark_test/idvdnmos.sp b/bsimcmg_benchmark_test/idvdnmos.sp
index 615fcb79a..3fed46e13 100644
--- a/bsimcmg_benchmark_test/idvdnmos.sp
+++ b/bsimcmg_benchmark_test/idvdnmos.sp
@@ -14,7 +14,7 @@ vgs gate  0 dc=1.0
 vbs bulk  0 dc=0.2
 
 * --- Transistor ---
-m1 drain gate 0 bulk 0 nmos1 TFIN=15n L=40n NFIN=10 NRS=1 NRD=1
+m1 drain gate 0 bulk 0 nmos1 TFIN=15n L=40n NFIN=10 NRS=1 NRD=1 D=40n
 
 * --- DC Analysis ---
 .dc vds 0 1 0.01 vgs 0 1.0 0.1
diff --git a/bsimcmg_benchmark_test/idvgnmos.sp b/bsimcmg_benchmark_test/idvgnmos.sp
index 402afc17b..2ae4e661c 100644
--- a/bsimcmg_benchmark_test/idvgnmos.sp
+++ b/bsimcmg_benchmark_test/idvgnmos.sp
@@ -15,7 +15,7 @@ vbs bulk  0 dc=0
 vt   t    0 dc= 0
 
 * --- Transistor ---
-m1 supply gate 0 bulk  t nmos1 TFIN=15n L=30n NFIN=10 NRS=1 NRD=1
+m1 supply gate 0 bulk  t nmos1 TFIN=15n L=30n NFIN=10 NRS=1 NRD=1 D=40n
 
 * --- DC Analysis ---
 .dc vgs -0.5 1.0 0.01 vds 0.05 1 0.95
diff --git a/bsimcmg_benchmark_test/modelcard.nmos.1 b/bsimcmg_benchmark_test/modelcard.nmos.1
index abd1f6ffc..6baf0c025 100644
--- a/bsimcmg_benchmark_test/modelcard.nmos.1
+++ b/bsimcmg_benchmark_test/modelcard.nmos.1
@@ -28,7 +28,6 @@
 + CIGC = 75.00m 
 + CIT = 0.000    
 + CTH0 = 2.0e-5
-+ D = 40n
 + DELTAW = 0.000  
 + DELTAWCV = 0.000  
 + TYPE = 1.000