diff --git a/src/spicelib/devices/bsim3v32/b3v32.c b/src/spicelib/devices/bsim3v32/b3v32.c index 2ab53bf2e..58898654e 100644 --- a/src/spicelib/devices/bsim3v32/b3v32.c +++ b/src/spicelib/devices/bsim3v32/b3v32.c @@ -73,15 +73,15 @@ IOP( "tox", BSIM3v32_MOD_TOX, IF_REAL, "Gate oxide thickness in meters"), IOP( "toxm", BSIM3v32_MOD_TOXM, IF_REAL, "Gate oxide thickness used in extraction"), IOP( "cdsc", BSIM3v32_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"), -IOP( "cdscb", BSIM3v32_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"), -IOP( "cdscd", BSIM3v32_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"), +IOP( "cdscb", BSIM3v32_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"), +IOP( "cdscd", BSIM3v32_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"), IOP( "cit", BSIM3v32_MOD_CIT, IF_REAL, "Interface state capacitance"), IOP( "nfactor", BSIM3v32_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"), IOP( "xj", BSIM3v32_MOD_XJ, IF_REAL, "Junction depth in meters"), IOP( "vsat", BSIM3v32_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"), IOP( "at", BSIM3v32_MOD_AT, IF_REAL, "Temperature coefficient of vsat"), -IOP( "a0", BSIM3v32_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."), -IOP( "ags", BSIM3v32_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."), +IOP( "a0", BSIM3v32_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."), +IOP( "ags", BSIM3v32_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."), IOP( "a1", BSIM3v32_MOD_A1, IF_REAL, "Non-saturation effect coefficient"), IOP( "a2", BSIM3v32_MOD_A2, IF_REAL, "Non-saturation effect coefficient"), IOP( "keta", BSIM3v32_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."), @@ -130,21 +130,21 @@ IOP( "xpart", BSIM3v32_MOD_XPART, IF_REAL, "Channel charge partitioning"), IOP( "elm", BSIM3v32_MOD_ELM, IF_REAL, "Non-quasi-static Elmore Constant Parameter"), IOP( "delta", BSIM3v32_MOD_DELTA, IF_REAL, "Effective Vds parameter"), IOP( "rsh", BSIM3v32_MOD_RSH, IF_REAL, "Source-drain sheet resistance"), -IOP( "rdsw", BSIM3v32_MOD_RDSW, IF_REAL, "Source-drain resistance per width"), +IOP( "rdsw", BSIM3v32_MOD_RDSW, IF_REAL, "Source-drain resistance per width"), -IOP( "prwg", BSIM3v32_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "), -IOP( "prwb", BSIM3v32_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "), +IOP( "prwg", BSIM3v32_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "), +IOP( "prwb", BSIM3v32_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "), -IOP( "prt", BSIM3v32_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "), +IOP( "prt", BSIM3v32_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "), IOP( "eta0", BSIM3v32_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"), IOP( "etab", BSIM3v32_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"), IOP( "pclm", BSIM3v32_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"), -IOP( "pdiblc1", BSIM3v32_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"), -IOP( "pdiblc2", BSIM3v32_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"), -IOP( "pdiblcb", BSIM3v32_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"), -IOP( "pscbe1", BSIM3v32_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"), -IOP( "pscbe2", BSIM3v32_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"), -IOP( "pvag", BSIM3v32_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"), +IOP( "pdiblc1", BSIM3v32_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblc2", BSIM3v32_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblcb", BSIM3v32_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"), +IOP( "pscbe1", BSIM3v32_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pscbe2", BSIM3v32_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pvag", BSIM3v32_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"), IOP( "js", BSIM3v32_MOD_JS, IF_REAL, "Source/drain junction reverse saturation current density"), IOP( "jsw", BSIM3v32_MOD_JSW, IF_REAL, "Sidewall junction reverse saturation current density"), IOP( "pb", BSIM3v32_MOD_PB, IF_REAL, "Source/drain junction built-in potential"), @@ -234,8 +234,8 @@ IOP( "lnfactor", BSIM3v32_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor") IOP( "lxj", BSIM3v32_MOD_LXJ, IF_REAL, "Length dependence of xj"), IOP( "lvsat", BSIM3v32_MOD_LVSAT, IF_REAL, "Length dependence of vsat"), IOP( "lat", BSIM3v32_MOD_LAT, IF_REAL, "Length dependence of at"), -IOP( "la0", BSIM3v32_MOD_LA0, IF_REAL, "Length dependence of a0"), -IOP( "lags", BSIM3v32_MOD_LAGS, IF_REAL, "Length dependence of ags"), +IOP( "la0", BSIM3v32_MOD_LA0, IF_REAL, "Length dependence of a0"), +IOP( "lags", BSIM3v32_MOD_LAGS, IF_REAL, "Length dependence of ags"), IOP( "la1", BSIM3v32_MOD_LA1, IF_REAL, "Length dependence of a1"), IOP( "la2", BSIM3v32_MOD_LA2, IF_REAL, "Length dependence of a2"), IOP( "lketa", BSIM3v32_MOD_LKETA, IF_REAL, "Length dependence of keta"), @@ -277,21 +277,21 @@ IOP( "lute", BSIM3v32_MOD_LUTE, IF_REAL, "Length dependence of ute"), IOP( "lvoff", BSIM3v32_MOD_LVOFF, IF_REAL, "Length dependence of voff"), IOP( "lelm", BSIM3v32_MOD_LELM, IF_REAL, "Length dependence of elm"), IOP( "ldelta", BSIM3v32_MOD_LDELTA, IF_REAL, "Length dependence of delta"), -IOP( "lrdsw", BSIM3v32_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "), +IOP( "lrdsw", BSIM3v32_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "), -IOP( "lprwg", BSIM3v32_MOD_LPRWG, IF_REAL, "Length dependence of prwg "), -IOP( "lprwb", BSIM3v32_MOD_LPRWB, IF_REAL, "Length dependence of prwb "), +IOP( "lprwg", BSIM3v32_MOD_LPRWG, IF_REAL, "Length dependence of prwg "), +IOP( "lprwb", BSIM3v32_MOD_LPRWB, IF_REAL, "Length dependence of prwb "), -IOP( "lprt", BSIM3v32_MOD_LPRT, IF_REAL, "Length dependence of prt "), -IOP( "leta0", BSIM3v32_MOD_LETA0, IF_REAL, "Length dependence of eta0"), -IOP( "letab", BSIM3v32_MOD_LETAB, IF_REAL, "Length dependence of etab"), -IOP( "lpclm", BSIM3v32_MOD_LPCLM, IF_REAL, "Length dependence of pclm"), -IOP( "lpdiblc1", BSIM3v32_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"), -IOP( "lpdiblc2", BSIM3v32_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"), -IOP( "lpdiblcb", BSIM3v32_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"), -IOP( "lpscbe1", BSIM3v32_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"), -IOP( "lpscbe2", BSIM3v32_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"), -IOP( "lpvag", BSIM3v32_MOD_LPVAG, IF_REAL, "Length dependence of pvag"), +IOP( "lprt", BSIM3v32_MOD_LPRT, IF_REAL, "Length dependence of prt "), +IOP( "leta0", BSIM3v32_MOD_LETA0, IF_REAL, "Length dependence of eta0"), +IOP( "letab", BSIM3v32_MOD_LETAB, IF_REAL, "Length dependence of etab"), +IOP( "lpclm", BSIM3v32_MOD_LPCLM, IF_REAL, "Length dependence of pclm"), +IOP( "lpdiblc1", BSIM3v32_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"), +IOP( "lpdiblc2", BSIM3v32_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"), +IOP( "lpdiblcb", BSIM3v32_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"), +IOP( "lpscbe1", BSIM3v32_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"), +IOP( "lpscbe2", BSIM3v32_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"), +IOP( "lpvag", BSIM3v32_MOD_LPVAG, IF_REAL, "Length dependence of pvag"), IOP( "lwr", BSIM3v32_MOD_LWR, IF_REAL, "Length dependence of wr"), IOP( "ldwg", BSIM3v32_MOD_LDWG, IF_REAL, "Length dependence of dwg"), IOP( "ldwb", BSIM3v32_MOD_LDWB, IF_REAL, "Length dependence of dwb"), @@ -313,15 +313,15 @@ IOP( "lmoin", BSIM3v32_MOD_LMOIN, IF_REAL, "Length dependence of moin"), IOP( "lnoff", BSIM3v32_MOD_LNOFF, IF_REAL, "Length dependence of noff"), IOP( "lvoffcv", BSIM3v32_MOD_LVOFFCV, IF_REAL, "Length dependence of voffcv"), IOP( "wcdsc", BSIM3v32_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"), -IOP( "wcdscb", BSIM3v32_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"), -IOP( "wcdscd", BSIM3v32_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"), +IOP( "wcdscb", BSIM3v32_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"), +IOP( "wcdscd", BSIM3v32_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"), IOP( "wcit", BSIM3v32_MOD_WCIT, IF_REAL, "Width dependence of cit"), IOP( "wnfactor", BSIM3v32_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"), IOP( "wxj", BSIM3v32_MOD_WXJ, IF_REAL, "Width dependence of xj"), IOP( "wvsat", BSIM3v32_MOD_WVSAT, IF_REAL, "Width dependence of vsat"), IOP( "wat", BSIM3v32_MOD_WAT, IF_REAL, "Width dependence of at"), -IOP( "wa0", BSIM3v32_MOD_WA0, IF_REAL, "Width dependence of a0"), -IOP( "wags", BSIM3v32_MOD_WAGS, IF_REAL, "Width dependence of ags"), +IOP( "wa0", BSIM3v32_MOD_WA0, IF_REAL, "Width dependence of a0"), +IOP( "wags", BSIM3v32_MOD_WAGS, IF_REAL, "Width dependence of ags"), IOP( "wa1", BSIM3v32_MOD_WA1, IF_REAL, "Width dependence of a1"), IOP( "wa2", BSIM3v32_MOD_WA2, IF_REAL, "Width dependence of a2"), IOP( "wketa", BSIM3v32_MOD_WKETA, IF_REAL, "Width dependence of keta"), @@ -369,15 +369,15 @@ IOP( "wprwg", BSIM3v32_MOD_WPRWG, IF_REAL, "Width dependence of prwg "), IOP( "wprwb", BSIM3v32_MOD_WPRWB, IF_REAL, "Width dependence of prwb "), IOP( "wprt", BSIM3v32_MOD_WPRT, IF_REAL, "Width dependence of prt"), -IOP( "weta0", BSIM3v32_MOD_WETA0, IF_REAL, "Width dependence of eta0"), -IOP( "wetab", BSIM3v32_MOD_WETAB, IF_REAL, "Width dependence of etab"), -IOP( "wpclm", BSIM3v32_MOD_WPCLM, IF_REAL, "Width dependence of pclm"), -IOP( "wpdiblc1", BSIM3v32_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"), -IOP( "wpdiblc2", BSIM3v32_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"), -IOP( "wpdiblcb", BSIM3v32_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"), -IOP( "wpscbe1", BSIM3v32_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"), -IOP( "wpscbe2", BSIM3v32_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"), -IOP( "wpvag", BSIM3v32_MOD_WPVAG, IF_REAL, "Width dependence of pvag"), +IOP( "weta0", BSIM3v32_MOD_WETA0, IF_REAL, "Width dependence of eta0"), +IOP( "wetab", BSIM3v32_MOD_WETAB, IF_REAL, "Width dependence of etab"), +IOP( "wpclm", BSIM3v32_MOD_WPCLM, IF_REAL, "Width dependence of pclm"), +IOP( "wpdiblc1", BSIM3v32_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"), +IOP( "wpdiblc2", BSIM3v32_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"), +IOP( "wpdiblcb", BSIM3v32_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"), +IOP( "wpscbe1", BSIM3v32_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"), +IOP( "wpscbe2", BSIM3v32_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"), +IOP( "wpvag", BSIM3v32_MOD_WPVAG, IF_REAL, "Width dependence of pvag"), IOP( "wwr", BSIM3v32_MOD_WWR, IF_REAL, "Width dependence of wr"), IOP( "wdwg", BSIM3v32_MOD_WDWG, IF_REAL, "Width dependence of dwg"), IOP( "wdwb", BSIM3v32_MOD_WDWB, IF_REAL, "Width dependence of dwb"), @@ -400,14 +400,14 @@ IOP( "wnoff", BSIM3v32_MOD_WNOFF, IF_REAL, "Width dependence of noff"), IOP( "wvoffcv", BSIM3v32_MOD_WVOFFCV, IF_REAL, "Width dependence of voffcv"), IOP( "pcdsc", BSIM3v32_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"), -IOP( "pcdscb", BSIM3v32_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"), +IOP( "pcdscb", BSIM3v32_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"), IOP( "pcdscd", BSIM3v32_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"), IOP( "pcit", BSIM3v32_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"), IOP( "pnfactor", BSIM3v32_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"), IOP( "pxj", BSIM3v32_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"), IOP( "pvsat", BSIM3v32_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"), IOP( "pat", BSIM3v32_MOD_PAT, IF_REAL, "Cross-term dependence of at"), -IOP( "pa0", BSIM3v32_MOD_PA0, IF_REAL, "Cross-term dependence of a0"), +IOP( "pa0", BSIM3v32_MOD_PA0, IF_REAL, "Cross-term dependence of a0"), IOP( "pags", BSIM3v32_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"), IOP( "pa1", BSIM3v32_MOD_PA1, IF_REAL, "Cross-term dependence of a1"), IOP( "pa2", BSIM3v32_MOD_PA2, IF_REAL, "Cross-term dependence of a2"), @@ -450,10 +450,10 @@ IOP( "pute", BSIM3v32_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"), IOP( "pvoff", BSIM3v32_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"), IOP( "pelm", BSIM3v32_MOD_PELM, IF_REAL, "Cross-term dependence of elm"), IOP( "pdelta", BSIM3v32_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"), -IOP( "prdsw", BSIM3v32_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "), +IOP( "prdsw", BSIM3v32_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "), -IOP( "pprwg", BSIM3v32_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "), -IOP( "pprwb", BSIM3v32_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "), +IOP( "pprwg", BSIM3v32_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "), +IOP( "pprwb", BSIM3v32_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "), IOP( "pprt", BSIM3v32_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "), IOP( "peta0", BSIM3v32_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"), @@ -464,7 +464,7 @@ IOP( "ppdiblc2", BSIM3v32_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc IOP( "ppdiblcb", BSIM3v32_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"), IOP( "ppscbe1", BSIM3v32_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"), IOP( "ppscbe2", BSIM3v32_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"), -IOP( "ppvag", BSIM3v32_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"), +IOP( "ppvag", BSIM3v32_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"), IOP( "pwr", BSIM3v32_MOD_PWR, IF_REAL, "Cross-term dependence of wr"), IOP( "pdwg", BSIM3v32_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"), IOP( "pdwb", BSIM3v32_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"), @@ -506,11 +506,11 @@ char *BSIM3v32names[] = { "Charge" }; -int BSIM3v32nSize = NUMELEMS(BSIM3v32names); -int BSIM3v32pTSize = NUMELEMS(BSIM3v32pTable); -int BSIM3v32mPTSize = NUMELEMS(BSIM3v32mPTable); -int BSIM3v32iSize = sizeof(BSIM3v32instance); -int BSIM3v32mSize = sizeof(BSIM3v32model); +int BSIM3v32nSize = NUMELEMS(BSIM3v32names); +int BSIM3v32pTSize = NUMELEMS(BSIM3v32pTable); +int BSIM3v32mPTSize = NUMELEMS(BSIM3v32mPTable); +int BSIM3v32iSize = sizeof(BSIM3v32instance); +int BSIM3v32mSize = sizeof(BSIM3v32model); diff --git a/src/spicelib/devices/bsim3v32/b3v32acld.c b/src/spicelib/devices/bsim3v32/b3v32acld.c index 28992b5f3..e7870a4e5 100644 --- a/src/spicelib/devices/bsim3v32/b3v32acld.c +++ b/src/spicelib/devices/bsim3v32/b3v32acld.c @@ -36,12 +36,12 @@ double ScalingFactor = 1.0e-9; double m; omega = ckt->CKTomega; - for (; model != NULL; model = model->BSIM3v32nextModel) + for (; model != NULL; model = model->BSIM3v32nextModel) { for (here = model->BSIM3v32instances; here!= NULL; - here = here->BSIM3v32nextInstance) - { - if (here->BSIM3v32mode >= 0) - { Gm = here->BSIM3v32gm; + here = here->BSIM3v32nextInstance) + { + if (here->BSIM3v32mode >= 0) + { Gm = here->BSIM3v32gm; Gmbs = here->BSIM3v32gmbs; FwdSum = Gm + Gmbs; RevSum = 0.0; @@ -59,7 +59,7 @@ double m; gbspb = 0.0; gbspsp = 0.0; - if (here->BSIM3v32nqsMod == 0) + if (here->BSIM3v32nqsMod == 0) { cggb = here->BSIM3v32cggb; cgsb = here->BSIM3v32cgsb; cgdb = here->BSIM3v32cgdb; @@ -73,70 +73,70 @@ double m; cddb = here->BSIM3v32cddb; xgtg = xgtd = xgts = xgtb = 0.0; - sxpart = 0.6; + sxpart = 0.6; dxpart = 0.4; - ddxpart_dVd = ddxpart_dVg = ddxpart_dVb - = ddxpart_dVs = 0.0; - dsxpart_dVd = dsxpart_dVg = dsxpart_dVb - = dsxpart_dVs = 0.0; - } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } else { cggb = cgdb = cgsb = 0.0; cbgb = cbdb = cbsb = 0.0; cdgb = cddb = cdsb = 0.0; - xgtg = here->BSIM3v32gtg; + xgtg = here->BSIM3v32gtg; xgtd = here->BSIM3v32gtd; xgts = here->BSIM3v32gts; - xgtb = here->BSIM3v32gtb; - + xgtb = here->BSIM3v32gtb; + xcqgb = here->BSIM3v32cqgb * omega; xcqdb = here->BSIM3v32cqdb * omega; xcqsb = here->BSIM3v32cqsb * omega; xcqbb = here->BSIM3v32cqbb * omega; - CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV + CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV * here->pParam->BSIM3v32leffCV; - qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); - if (fabs(qcheq) <= 1.0e-5 * CoxWL) - { if (model->BSIM3v32xpart < 0.5) - { dxpart = 0.4; - } - else if (model->BSIM3v32xpart > 0.5) - { dxpart = 0.0; - } - else - { dxpart = 0.5; - } - ddxpart_dVd = ddxpart_dVg = ddxpart_dVb - = ddxpart_dVs = 0.0; - } - else - { dxpart = here->BSIM3v32qdrn / qcheq; - Cdd = here->BSIM3v32cddb; - Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb - + here->BSIM3v32cbdb); - ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; - Cdg = here->BSIM3v32cdgb; - Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb - + here->BSIM3v32cbgb); - ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = here->BSIM3v32qdrn / qcheq; + Cdd = here->BSIM3v32cddb; + Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM3v32cdgb; + Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; - Cds = here->BSIM3v32cdsb; - Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb - + here->BSIM3v32cbsb); - ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + Cds = here->BSIM3v32cdsb; + Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; - ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg - + ddxpart_dVs); - } - sxpart = 1.0 - dxpart; - dsxpart_dVd = -ddxpart_dVd; - dsxpart_dVg = -ddxpart_dVg; - dsxpart_dVs = -ddxpart_dVs; - dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); } - } + } else { Gm = -here->BSIM3v32gm; Gmbs = -here->BSIM3v32gmbs; @@ -156,7 +156,7 @@ double m; gbspb = here->BSIM3v32gbbs; gbspdp = -(gbspg + gbspsp + gbspb); - if (here->BSIM3v32nqsMod == 0) + if (here->BSIM3v32nqsMod == 0) { cggb = here->BSIM3v32cggb; cgsb = here->BSIM3v32cgdb; cgdb = here->BSIM3v32cgsb; @@ -170,19 +170,19 @@ double m; cddb = -(here->BSIM3v32cdsb + cgdb + cbdb); xgtg = xgtd = xgts = xgtb = 0.0; - sxpart = 0.4; + sxpart = 0.4; dxpart = 0.6; - ddxpart_dVd = ddxpart_dVg = ddxpart_dVb - = ddxpart_dVs = 0.0; - dsxpart_dVd = dsxpart_dVg = dsxpart_dVb - = dsxpart_dVs = 0.0; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; } else { cggb = cgdb = cgsb = 0.0; cbgb = cbdb = cbsb = 0.0; cdgb = cddb = cdsb = 0.0; - xgtg = here->BSIM3v32gtg; + xgtg = here->BSIM3v32gtg; xgtd = here->BSIM3v32gts; xgts = here->BSIM3v32gtd; xgtb = here->BSIM3v32gtb; @@ -192,50 +192,50 @@ double m; xcqsb = here->BSIM3v32cqdb * omega; xcqbb = here->BSIM3v32cqbb * omega; - CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV + CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV * here->pParam->BSIM3v32leffCV; - qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); - if (fabs(qcheq) <= 1.0e-5 * CoxWL) - { if (model->BSIM3v32xpart < 0.5) - { sxpart = 0.4; - } - else if (model->BSIM3v32xpart > 0.5) - { sxpart = 0.0; - } - else - { sxpart = 0.5; - } - dsxpart_dVd = dsxpart_dVg = dsxpart_dVb - = dsxpart_dVs = 0.0; - } - else - { sxpart = here->BSIM3v32qdrn / qcheq; - Css = here->BSIM3v32cddb; - Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb - + here->BSIM3v32cbdb); - dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; - Csg = here->BSIM3v32cdgb; - Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb - + here->BSIM3v32cbgb); - dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = here->BSIM3v32qdrn / qcheq; + Css = here->BSIM3v32cddb; + Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM3v32cdgb; + Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; - Csd = here->BSIM3v32cdsb; - Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb - + here->BSIM3v32cbsb); - dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + Csd = here->BSIM3v32cdsb; + Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; - dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg - + dsxpart_dVs); - } - dxpart = 1.0 - sxpart; - ddxpart_dVd = -dsxpart_dVd; - ddxpart_dVg = -dsxpart_dVg; - ddxpart_dVs = -dsxpart_dVs; - ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); } } - T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau; + T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau; gdpr = here->BSIM3v32drainConductance; gspr = here->BSIM3v32sourceConductance; gds = here->BSIM3v32gds; @@ -244,9 +244,9 @@ double m; capbd = here->BSIM3v32capbd; capbs = here->BSIM3v32capbs; - GSoverlapCap = here->BSIM3v32cgso; - GDoverlapCap = here->BSIM3v32cgdo; - GBoverlapCap = here->pParam->BSIM3v32cgbo; + GSoverlapCap = here->BSIM3v32cgso; + GDoverlapCap = here->BSIM3v32cgdo; + GBoverlapCap = here->pParam->BSIM3v32cgbo; xcdgb = (cdgb - GDoverlapCap) * omega; xcddb = (cddb + capbd + GDoverlapCap) * omega; @@ -255,106 +255,106 @@ double m; xcsdb = -(cgdb + cbdb + cddb) * omega; xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega; xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap) - * omega; + * omega; xcgdb = (cgdb - GDoverlapCap ) * omega; xcgsb = (cgsb - GSoverlapCap) * omega; xcbgb = (cbgb - GBoverlapCap) * omega; xcbdb = (cbdb - capbd ) * omega; xcbsb = (cbsb - capbs ) * omega; - m = here->BSIM3v32m; + m = here->BSIM3v32m; - *(here->BSIM3v32GgPtr + 1) += m * xcggb; - *(here->BSIM3v32BbPtr + 1) -= - m * (xcbgb + xcbdb + xcbsb); - *(here->BSIM3v32DPdpPtr + 1) += m * xcddb; - *(here->BSIM3v32SPspPtr + 1) += m * xcssb; - *(here->BSIM3v32GbPtr + 1) -= - m * (xcggb + xcgdb + xcgsb); - *(here->BSIM3v32GdpPtr + 1) += m * xcgdb; - *(here->BSIM3v32GspPtr + 1) += m * xcgsb; - *(here->BSIM3v32BgPtr + 1) += m * xcbgb; - *(here->BSIM3v32BdpPtr + 1) += m * xcbdb; - *(here->BSIM3v32BspPtr + 1) += m * xcbsb; - *(here->BSIM3v32DPgPtr + 1) += m * xcdgb; - *(here->BSIM3v32DPbPtr + 1) -= - m * (xcdgb + xcddb + xcdsb); - *(here->BSIM3v32DPspPtr + 1) += m * xcdsb; - *(here->BSIM3v32SPgPtr + 1) += m * xcsgb; - *(here->BSIM3v32SPbPtr + 1) -= - m * (xcsgb + xcsdb + xcssb); - *(here->BSIM3v32SPdpPtr + 1) += m * xcsdb; - - *(here->BSIM3v32DdPtr) += m * gdpr; - *(here->BSIM3v32SsPtr) += m * gspr; - *(here->BSIM3v32BbPtr) += - m * (gbd + gbs - here->BSIM3v32gbbs); - *(here->BSIM3v32DPdpPtr) += - m * (gdpr + gds + gbd + RevSum + - dxpart * xgtd + T1 * ddxpart_dVd + - gbdpdp); - *(here->BSIM3v32SPspPtr) += - m * (gspr + gds + gbs + FwdSum + - sxpart * xgts + T1 * dsxpart_dVs + - gbspsp); - - *(here->BSIM3v32DdpPtr) -= m * gdpr; - *(here->BSIM3v32SspPtr) -= m * gspr; - - *(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs; - *(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp); - *(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp); - - *(here->BSIM3v32DPdPtr) -= m * gdpr; - *(here->BSIM3v32DPgPtr) += - m * (Gm + dxpart * xgtg + T1 * ddxpart_dVg + - gbdpg); - *(here->BSIM3v32DPbPtr) -= - m * (gbd - Gmbs - dxpart * xgtb - - T1 * ddxpart_dVb - gbdpb); - *(here->BSIM3v32DPspPtr) -= - m * (gds + FwdSum - dxpart * xgts - - T1 * ddxpart_dVs - gbdpsp); - - *(here->BSIM3v32SPgPtr) -= - m * (Gm - sxpart * xgtg - T1 * dsxpart_dVg - - gbspg); - *(here->BSIM3v32SPsPtr) -= m * gspr; - *(here->BSIM3v32SPbPtr) -= - m * (gbs + Gmbs - sxpart * xgtb - - T1 * dsxpart_dVb - gbspb); - *(here->BSIM3v32SPdpPtr) -= - m * (gds + RevSum - sxpart * xgtd - - T1 * dsxpart_dVd - gbspdp); - - *(here->BSIM3v32GgPtr) -= m * xgtg; - *(here->BSIM3v32GbPtr) -= m * xgtb; - *(here->BSIM3v32GdpPtr) -= m * xgtd; - *(here->BSIM3v32GspPtr) -= m * xgts; - - if (here->BSIM3v32nqsMod) - { - *(here->BSIM3v32QqPtr + 1) += - m * omega * ScalingFactor; - *(here->BSIM3v32QgPtr + 1) -= m * xcqgb; - *(here->BSIM3v32QdpPtr + 1) -= m * xcqdb; - *(here->BSIM3v32QspPtr + 1) -= m * xcqsb; - *(here->BSIM3v32QbPtr + 1) -= m * xcqbb; - - *(here->BSIM3v32QqPtr) += m * here->BSIM3v32gtau; - - *(here->BSIM3v32DPqPtr) += - m * (dxpart * here->BSIM3v32gtau); - *(here->BSIM3v32SPqPtr) += - m * (sxpart * here->BSIM3v32gtau); - *(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau; - - *(here->BSIM3v32QgPtr) += m * xgtg; - *(here->BSIM3v32QdpPtr) += m * xgtd; - *(here->BSIM3v32QspPtr) += m * xgts; - *(here->BSIM3v32QbPtr) += m * xgtb; - } - } + *(here->BSIM3v32GgPtr + 1) += m * xcggb; + *(here->BSIM3v32BbPtr + 1) -= + m * (xcbgb + xcbdb + xcbsb); + *(here->BSIM3v32DPdpPtr + 1) += m * xcddb; + *(here->BSIM3v32SPspPtr + 1) += m * xcssb; + *(here->BSIM3v32GbPtr + 1) -= + m * (xcggb + xcgdb + xcgsb); + *(here->BSIM3v32GdpPtr + 1) += m * xcgdb; + *(here->BSIM3v32GspPtr + 1) += m * xcgsb; + *(here->BSIM3v32BgPtr + 1) += m * xcbgb; + *(here->BSIM3v32BdpPtr + 1) += m * xcbdb; + *(here->BSIM3v32BspPtr + 1) += m * xcbsb; + *(here->BSIM3v32DPgPtr + 1) += m * xcdgb; + *(here->BSIM3v32DPbPtr + 1) -= + m * (xcdgb + xcddb + xcdsb); + *(here->BSIM3v32DPspPtr + 1) += m * xcdsb; + *(here->BSIM3v32SPgPtr + 1) += m * xcsgb; + *(here->BSIM3v32SPbPtr + 1) -= + m * (xcsgb + xcsdb + xcssb); + *(here->BSIM3v32SPdpPtr + 1) += m * xcsdb; + + *(here->BSIM3v32DdPtr) += m * gdpr; + *(here->BSIM3v32SsPtr) += m * gspr; + *(here->BSIM3v32BbPtr) += + m * (gbd + gbs - here->BSIM3v32gbbs); + *(here->BSIM3v32DPdpPtr) += + m * (gdpr + gds + gbd + RevSum + + dxpart * xgtd + T1 * ddxpart_dVd + + gbdpdp); + *(here->BSIM3v32SPspPtr) += + m * (gspr + gds + gbs + FwdSum + + sxpart * xgts + T1 * dsxpart_dVs + + gbspsp); + + *(here->BSIM3v32DdpPtr) -= m * gdpr; + *(here->BSIM3v32SspPtr) -= m * gspr; + + *(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs; + *(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp); + *(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp); + + *(here->BSIM3v32DPdPtr) -= m * gdpr; + *(here->BSIM3v32DPgPtr) += + m * (Gm + dxpart * xgtg + T1 * ddxpart_dVg + + gbdpg); + *(here->BSIM3v32DPbPtr) -= + m * (gbd - Gmbs - dxpart * xgtb - + T1 * ddxpart_dVb - gbdpb); + *(here->BSIM3v32DPspPtr) -= + m * (gds + FwdSum - dxpart * xgts - + T1 * ddxpart_dVs - gbdpsp); + + *(here->BSIM3v32SPgPtr) -= + m * (Gm - sxpart * xgtg - T1 * dsxpart_dVg - + gbspg); + *(here->BSIM3v32SPsPtr) -= m * gspr; + *(here->BSIM3v32SPbPtr) -= + m * (gbs + Gmbs - sxpart * xgtb - + T1 * dsxpart_dVb - gbspb); + *(here->BSIM3v32SPdpPtr) -= + m * (gds + RevSum - sxpart * xgtd - + T1 * dsxpart_dVd - gbspdp); + + *(here->BSIM3v32GgPtr) -= m * xgtg; + *(here->BSIM3v32GbPtr) -= m * xgtb; + *(here->BSIM3v32GdpPtr) -= m * xgtd; + *(here->BSIM3v32GspPtr) -= m * xgts; + + if (here->BSIM3v32nqsMod) + { + *(here->BSIM3v32QqPtr + 1) += + m * omega * ScalingFactor; + *(here->BSIM3v32QgPtr + 1) -= m * xcqgb; + *(here->BSIM3v32QdpPtr + 1) -= m * xcqdb; + *(here->BSIM3v32QspPtr + 1) -= m * xcqsb; + *(here->BSIM3v32QbPtr + 1) -= m * xcqbb; + + *(here->BSIM3v32QqPtr) += m * here->BSIM3v32gtau; + + *(here->BSIM3v32DPqPtr) += + m * (dxpart * here->BSIM3v32gtau); + *(here->BSIM3v32SPqPtr) += + m * (sxpart * here->BSIM3v32gtau); + *(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau; + + *(here->BSIM3v32QgPtr) += m * xgtg; + *(here->BSIM3v32QdpPtr) += m * xgtd; + *(here->BSIM3v32QspPtr) += m * xgts; + *(here->BSIM3v32QbPtr) += m * xgtb; + } + } } return(OK); } diff --git a/src/spicelib/devices/bsim3v32/b3v32ask.c b/src/spicelib/devices/bsim3v32/b3v32ask.c index 27796a9a6..3eb7b1730 100644 --- a/src/spicelib/devices/bsim3v32/b3v32ask.c +++ b/src/spicelib/devices/bsim3v32/b3v32ask.c @@ -19,22 +19,22 @@ int BSIM3v32ask (CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value, - IFvalue *select) + IFvalue *select) { BSIM3v32instance *here = (BSIM3v32instance*)inst; NG_IGNORE(select); - switch(which) + switch(which) { case BSIM3v32_L: value->rValue = here->BSIM3v32l; return(OK); case BSIM3v32_W: value->rValue = here->BSIM3v32w; return(OK); - case BSIM3v32_M: - value->rValue = here->BSIM3v32m; - return (OK); + case BSIM3v32_M: + value->rValue = here->BSIM3v32m; + return (OK); case BSIM3v32_AS: value->rValue = here->BSIM3v32sourceArea; return(OK); @@ -94,11 +94,11 @@ BSIM3v32instance *here = (BSIM3v32instance*)inst; return(OK); case BSIM3v32_SOURCECONDUCT: value->rValue = here->BSIM3v32sourceConductance; - value->rValue *= here->BSIM3v32m; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_DRAINCONDUCT: value->rValue = here->BSIM3v32drainConductance; - value->rValue *= here->BSIM3v32m; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_VBD: value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbd); @@ -113,118 +113,118 @@ BSIM3v32instance *here = (BSIM3v32instance*)inst; value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vds); return(OK); case BSIM3v32_CD: - value->rValue = here->BSIM3v32cd; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32cd; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CBS: - value->rValue = here->BSIM3v32cbs; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32cbs; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CBD: - value->rValue = here->BSIM3v32cbd; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32cbd; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_GM: - value->rValue = here->BSIM3v32gm; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32gm; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_GDS: - value->rValue = here->BSIM3v32gds; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32gds; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_GMBS: - value->rValue = here->BSIM3v32gmbs; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32gmbs; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_GBD: - value->rValue = here->BSIM3v32gbd; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32gbd; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_GBS: - value->rValue = here->BSIM3v32gbs; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32gbs; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_QB: - value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qb); - value->rValue *= here->BSIM3v32m; + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qb); + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CQB: - value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqb); - value->rValue *= here->BSIM3v32m; + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqb); + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_QG: - value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qg); - value->rValue *= here->BSIM3v32m; + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qg); + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CQG: - value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqg); - value->rValue *= here->BSIM3v32m; + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqg); + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_QD: - value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qd); - value->rValue *= here->BSIM3v32m; + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qd); + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CQD: - value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqd); - value->rValue *= here->BSIM3v32m; + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqd); + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CGG: - value->rValue = here->BSIM3v32cggb; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32cggb; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CGD: value->rValue = here->BSIM3v32cgdb; - value->rValue *= here->BSIM3v32m; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CGS: value->rValue = here->BSIM3v32cgsb; - value->rValue *= here->BSIM3v32m; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CDG: - value->rValue = here->BSIM3v32cdgb; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32cdgb; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CDD: - value->rValue = here->BSIM3v32cddb; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32cddb; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CDS: - value->rValue = here->BSIM3v32cdsb; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32cdsb; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CBG: value->rValue = here->BSIM3v32cbgb; - value->rValue *= here->BSIM3v32m; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CBDB: value->rValue = here->BSIM3v32cbdb; - value->rValue *= here->BSIM3v32m; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CBSB: value->rValue = here->BSIM3v32cbsb; - value->rValue *= here->BSIM3v32m; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CAPBD: - value->rValue = here->BSIM3v32capbd; - value->rValue *= here->BSIM3v32m; + value->rValue = here->BSIM3v32capbd; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_CAPBS: value->rValue = here->BSIM3v32capbs; - value->rValue *= here->BSIM3v32m; + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_VON: - value->rValue = here->BSIM3v32von; + value->rValue = here->BSIM3v32von; return(OK); case BSIM3v32_VDSAT: - value->rValue = here->BSIM3v32vdsat; + value->rValue = here->BSIM3v32vdsat; return(OK); case BSIM3v32_QBS: - value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbs); - value->rValue *= here->BSIM3v32m; + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbs); + value->rValue *= here->BSIM3v32m; return(OK); case BSIM3v32_QBD: - value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbd); - value->rValue *= here->BSIM3v32m; + value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbd); + value->rValue *= here->BSIM3v32m; return(OK); default: return(E_BADPARM); diff --git a/src/spicelib/devices/bsim3v32/b3v32check.c b/src/spicelib/devices/bsim3v32/b3v32check.c index 2f1c7aec5..f297934dc 100644 --- a/src/spicelib/devices/bsim3v32/b3v32check.c +++ b/src/spicelib/devices/bsim3v32/b3v32check.c @@ -31,416 +31,416 @@ FILE *fplog; if ((fplog = fopen("b3v32check.log", "w")) != NULL) { pParam = here->pParam; - fprintf (fplog, - "BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)\n"); - fprintf (fplog, "Parameter Checking.\n"); - fprintf (fplog, "Model = %s\n", model->BSIM3v32modName); - fprintf (fplog, "W = %g, L = %g, M = %g\n", here->BSIM3v32w, - here->BSIM3v32l, here->BSIM3v32m); + fprintf (fplog, + "BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)\n"); + fprintf (fplog, "Parameter Checking.\n"); + fprintf (fplog, "Model = %s\n", model->BSIM3v32modName); + fprintf (fplog, "W = %g, L = %g, M = %g\n", here->BSIM3v32w, + here->BSIM3v32l, here->BSIM3v32m); - if ((strcmp(model->BSIM3v32version, "3.2.4")) && (strcmp(model->BSIM3v32version, "3.24")) - && (strcmp(model->BSIM3v32version, "3.2.3")) && (strcmp(model->BSIM3v32version, "3.23")) - && (strcmp(model->BSIM3v32version, "3.2.2")) && (strcmp(model->BSIM3v32version, "3.22")) - && (strcmp(model->BSIM3v32version, "3.2")) && (strcmp(model->BSIM3v32version, "3.20"))) - { - fprintf (fplog, - "Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n"); - fprintf (fplog, - "You specified a wrong version number. Working now with BSIM3v3.2.4.\n"); - printf ("Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n"); - printf ("You specified a wrong version number. Working now with BSIM3v3.2.4.\n"); - } + if ((strcmp(model->BSIM3v32version, "3.2.4")) && (strcmp(model->BSIM3v32version, "3.24")) + && (strcmp(model->BSIM3v32version, "3.2.3")) && (strcmp(model->BSIM3v32version, "3.23")) + && (strcmp(model->BSIM3v32version, "3.2.2")) && (strcmp(model->BSIM3v32version, "3.22")) + && (strcmp(model->BSIM3v32version, "3.2")) && (strcmp(model->BSIM3v32version, "3.20"))) + { + fprintf (fplog, + "Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n"); + fprintf (fplog, + "You specified a wrong version number. Working now with BSIM3v3.2.4.\n"); + printf ("Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n"); + printf ("You specified a wrong version number. Working now with BSIM3v3.2.4.\n"); + } - if (pParam->BSIM3v32nlx < -pParam->BSIM3v32leff) - { fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n", - pParam->BSIM3v32nlx); - printf("Fatal: Nlx = %g is less than -Leff.\n", - pParam->BSIM3v32nlx); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32nlx < -pParam->BSIM3v32leff) + { fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n", + pParam->BSIM3v32nlx); + printf("Fatal: Nlx = %g is less than -Leff.\n", + pParam->BSIM3v32nlx); + Fatal_Flag = 1; + } - if (model->BSIM3v32tox <= 0.0) - { fprintf(fplog, "Fatal: Tox = %g is not positive.\n", - model->BSIM3v32tox); - printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v32tox); - Fatal_Flag = 1; - } + if (model->BSIM3v32tox <= 0.0) + { fprintf(fplog, "Fatal: Tox = %g is not positive.\n", + model->BSIM3v32tox); + printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v32tox); + Fatal_Flag = 1; + } - if (model->BSIM3v32toxm <= 0.0) - { fprintf(fplog, "Fatal: Toxm = %g is not positive.\n", - model->BSIM3v32toxm); - printf("Fatal: Toxm = %g is not positive.\n", model->BSIM3v32toxm); - Fatal_Flag = 1; - } + if (model->BSIM3v32toxm <= 0.0) + { fprintf(fplog, "Fatal: Toxm = %g is not positive.\n", + model->BSIM3v32toxm); + printf("Fatal: Toxm = %g is not positive.\n", model->BSIM3v32toxm); + Fatal_Flag = 1; + } - if (pParam->BSIM3v32npeak <= 0.0) - { fprintf(fplog, "Fatal: Nch = %g is not positive.\n", - pParam->BSIM3v32npeak); - printf("Fatal: Nch = %g is not positive.\n", - pParam->BSIM3v32npeak); - Fatal_Flag = 1; - } - if (pParam->BSIM3v32nsub <= 0.0) - { fprintf(fplog, "Fatal: Nsub = %g is not positive.\n", - pParam->BSIM3v32nsub); - printf("Fatal: Nsub = %g is not positive.\n", - pParam->BSIM3v32nsub); - Fatal_Flag = 1; - } - if (pParam->BSIM3v32ngate < 0.0) - { fprintf(fplog, "Fatal: Ngate = %g is not positive.\n", - pParam->BSIM3v32ngate); - printf("Fatal: Ngate = %g Ngate is not positive.\n", - pParam->BSIM3v32ngate); - Fatal_Flag = 1; - } - if (pParam->BSIM3v32ngate > 1.e25) - { fprintf(fplog, "Fatal: Ngate = %g is too high.\n", - pParam->BSIM3v32ngate); - printf("Fatal: Ngate = %g Ngate is too high\n", - pParam->BSIM3v32ngate); - Fatal_Flag = 1; - } - if (pParam->BSIM3v32xj <= 0.0) - { fprintf(fplog, "Fatal: Xj = %g is not positive.\n", - pParam->BSIM3v32xj); - printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v32xj); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32npeak <= 0.0) + { fprintf(fplog, "Fatal: Nch = %g is not positive.\n", + pParam->BSIM3v32npeak); + printf("Fatal: Nch = %g is not positive.\n", + pParam->BSIM3v32npeak); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32nsub <= 0.0) + { fprintf(fplog, "Fatal: Nsub = %g is not positive.\n", + pParam->BSIM3v32nsub); + printf("Fatal: Nsub = %g is not positive.\n", + pParam->BSIM3v32nsub); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32ngate < 0.0) + { fprintf(fplog, "Fatal: Ngate = %g is not positive.\n", + pParam->BSIM3v32ngate); + printf("Fatal: Ngate = %g Ngate is not positive.\n", + pParam->BSIM3v32ngate); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32ngate > 1.e25) + { fprintf(fplog, "Fatal: Ngate = %g is too high.\n", + pParam->BSIM3v32ngate); + printf("Fatal: Ngate = %g Ngate is too high\n", + pParam->BSIM3v32ngate); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32xj <= 0.0) + { fprintf(fplog, "Fatal: Xj = %g is not positive.\n", + pParam->BSIM3v32xj); + printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v32xj); + Fatal_Flag = 1; + } - if (pParam->BSIM3v32dvt1 < 0.0) - { fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n", - pParam->BSIM3v32dvt1); - printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v32dvt1); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32dvt1 < 0.0) + { fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n", + pParam->BSIM3v32dvt1); + printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v32dvt1); + Fatal_Flag = 1; + } - if (pParam->BSIM3v32dvt1w < 0.0) - { fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n", - pParam->BSIM3v32dvt1w); - printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v32dvt1w); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32dvt1w < 0.0) + { fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n", + pParam->BSIM3v32dvt1w); + printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v32dvt1w); + Fatal_Flag = 1; + } - if (pParam->BSIM3v32w0 == -pParam->BSIM3v32weff) - { fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); - printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32w0 == -pParam->BSIM3v32weff) + { fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } - if (pParam->BSIM3v32dsub < 0.0) - { fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub); - printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub); - Fatal_Flag = 1; - } - if (pParam->BSIM3v32b1 == -pParam->BSIM3v32weff) - { fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); - printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); - Fatal_Flag = 1; - } - if (pParam->BSIM3v32u0temp <= 0.0) - { fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v32u0temp); - printf("Fatal: u0 at current temperature = %g is not positive.\n", - pParam->BSIM3v32u0temp); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32dsub < 0.0) + { fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub); + printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32b1 == -pParam->BSIM3v32weff) + { fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } + if (pParam->BSIM3v32u0temp <= 0.0) + { fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v32u0temp); + printf("Fatal: u0 at current temperature = %g is not positive.\n", + pParam->BSIM3v32u0temp); + Fatal_Flag = 1; + } /* Check delta parameter */ - if (pParam->BSIM3v32delta < 0.0) - { fprintf(fplog, "Fatal: Delta = %g is less than zero.\n", - pParam->BSIM3v32delta); - printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v32delta); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32delta < 0.0) + { fprintf(fplog, "Fatal: Delta = %g is less than zero.\n", + pParam->BSIM3v32delta); + printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v32delta); + Fatal_Flag = 1; + } - if (pParam->BSIM3v32vsattemp <= 0.0) - { fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v32vsattemp); - printf("Fatal: Vsat at current temperature = %g is not positive.\n", - pParam->BSIM3v32vsattemp); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32vsattemp <= 0.0) + { fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v32vsattemp); + printf("Fatal: Vsat at current temperature = %g is not positive.\n", + pParam->BSIM3v32vsattemp); + Fatal_Flag = 1; + } /* Check Rout parameters */ - if (pParam->BSIM3v32pclm <= 0.0) - { fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm); - printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32pclm <= 0.0) + { fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm); + printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm); + Fatal_Flag = 1; + } - if (pParam->BSIM3v32drout < 0.0) - { fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout); - printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32drout < 0.0) + { fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout); + printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout); + Fatal_Flag = 1; + } - if (pParam->BSIM3v32pscbe2 <= 0.0) - { fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n", - pParam->BSIM3v32pscbe2); - printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM3v32pscbe2); - } + if (pParam->BSIM3v32pscbe2 <= 0.0) + { fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n", + pParam->BSIM3v32pscbe2); + printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM3v32pscbe2); + } - /* acm model */ - if (model->BSIM3v32acmMod == 0) { - if (model->BSIM3v32unitLengthSidewallJctCap > 0.0 || - model->BSIM3v32unitLengthGateSidewallJctCap > 0.0) - { - if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff) - { fprintf(fplog, "Warning: Pd = %g is less than W.\n", - here->BSIM3v32drainPerimeter); - printf("Warning: Pd = %g is less than W.\n", - here->BSIM3v32drainPerimeter); - } - if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff) - { fprintf(fplog, "Warning: Ps = %g is less than W.\n", - here->BSIM3v32sourcePerimeter); - printf("Warning: Ps = %g is less than W.\n", - here->BSIM3v32sourcePerimeter); - } - } - } + /* acm model */ + if (model->BSIM3v32acmMod == 0) { + if (model->BSIM3v32unitLengthSidewallJctCap > 0.0 || + model->BSIM3v32unitLengthGateSidewallJctCap > 0.0) + { + if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff) + { fprintf(fplog, "Warning: Pd = %g is less than W.\n", + here->BSIM3v32drainPerimeter); + printf("Warning: Pd = %g is less than W.\n", + here->BSIM3v32drainPerimeter); + } + if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff) + { fprintf(fplog, "Warning: Ps = %g is less than W.\n", + here->BSIM3v32sourcePerimeter); + printf("Warning: Ps = %g is less than W.\n", + here->BSIM3v32sourcePerimeter); + } + } + } - if (pParam->BSIM3v32noff < 0.1) - { fprintf(fplog, "Warning: Noff = %g is too small.\n", - pParam->BSIM3v32noff); - printf("Warning: Noff = %g is too small.\n", pParam->BSIM3v32noff); - } - if (pParam->BSIM3v32noff > 4.0) - { fprintf(fplog, "Warning: Noff = %g is too large.\n", - pParam->BSIM3v32noff); - printf("Warning: Noff = %g is too large.\n", pParam->BSIM3v32noff); - } + if (pParam->BSIM3v32noff < 0.1) + { fprintf(fplog, "Warning: Noff = %g is too small.\n", + pParam->BSIM3v32noff); + printf("Warning: Noff = %g is too small.\n", pParam->BSIM3v32noff); + } + if (pParam->BSIM3v32noff > 4.0) + { fprintf(fplog, "Warning: Noff = %g is too large.\n", + pParam->BSIM3v32noff); + printf("Warning: Noff = %g is too large.\n", pParam->BSIM3v32noff); + } - if (pParam->BSIM3v32voffcv < -0.5) - { fprintf(fplog, "Warning: Voffcv = %g is too small.\n", - pParam->BSIM3v32voffcv); - printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM3v32voffcv); - } - if (pParam->BSIM3v32voffcv > 0.5) - { fprintf(fplog, "Warning: Voffcv = %g is too large.\n", - pParam->BSIM3v32voffcv); - printf("Warning: Voffcv = %g is too large.\n", pParam->BSIM3v32voffcv); - } + if (pParam->BSIM3v32voffcv < -0.5) + { fprintf(fplog, "Warning: Voffcv = %g is too small.\n", + pParam->BSIM3v32voffcv); + printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM3v32voffcv); + } + if (pParam->BSIM3v32voffcv > 0.5) + { fprintf(fplog, "Warning: Voffcv = %g is too large.\n", + pParam->BSIM3v32voffcv); + printf("Warning: Voffcv = %g is too large.\n", pParam->BSIM3v32voffcv); + } - if (model->BSIM3v32ijth < 0.0) - { fprintf(fplog, "Fatal: Ijth = %g cannot be negative.\n", - model->BSIM3v32ijth); - printf("Fatal: Ijth = %g cannot be negative.\n", model->BSIM3v32ijth); - Fatal_Flag = 1; - } + if (model->BSIM3v32ijth < 0.0) + { fprintf(fplog, "Fatal: Ijth = %g cannot be negative.\n", + model->BSIM3v32ijth); + printf("Fatal: Ijth = %g cannot be negative.\n", model->BSIM3v32ijth); + Fatal_Flag = 1; + } /* Check capacitance parameters */ - if (pParam->BSIM3v32clc < 0.0) - { fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc); - printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc); - Fatal_Flag = 1; - } + if (pParam->BSIM3v32clc < 0.0) + { fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc); + printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc); + Fatal_Flag = 1; + } - if (pParam->BSIM3v32moin < 5.0) - { fprintf(fplog, "Warning: Moin = %g is too small.\n", - pParam->BSIM3v32moin); - printf("Warning: Moin = %g is too small.\n", pParam->BSIM3v32moin); - } - if (pParam->BSIM3v32moin > 25.0) - { fprintf(fplog, "Warning: Moin = %g is too large.\n", - pParam->BSIM3v32moin); - printf("Warning: Moin = %g is too large.\n", pParam->BSIM3v32moin); - } + if (pParam->BSIM3v32moin < 5.0) + { fprintf(fplog, "Warning: Moin = %g is too small.\n", + pParam->BSIM3v32moin); + printf("Warning: Moin = %g is too small.\n", pParam->BSIM3v32moin); + } + if (pParam->BSIM3v32moin > 25.0) + { fprintf(fplog, "Warning: Moin = %g is too large.\n", + pParam->BSIM3v32moin); + printf("Warning: Moin = %g is too large.\n", pParam->BSIM3v32moin); + } - if(model->BSIM3v32capMod ==3) { - if (pParam->BSIM3v32acde < 0.4) - { fprintf(fplog, "Warning: Acde = %g is too small.\n", - pParam->BSIM3v32acde); - printf("Warning: Acde = %g is too small.\n", pParam->BSIM3v32acde); - } - if (pParam->BSIM3v32acde > 1.6) - { fprintf(fplog, "Warning: Acde = %g is too large.\n", - pParam->BSIM3v32acde); - printf("Warning: Acde = %g is too large.\n", pParam->BSIM3v32acde); - } - } + if(model->BSIM3v32capMod ==3) { + if (pParam->BSIM3v32acde < 0.4) + { fprintf(fplog, "Warning: Acde = %g is too small.\n", + pParam->BSIM3v32acde); + printf("Warning: Acde = %g is too small.\n", pParam->BSIM3v32acde); + } + if (pParam->BSIM3v32acde > 1.6) + { fprintf(fplog, "Warning: Acde = %g is too large.\n", + pParam->BSIM3v32acde); + printf("Warning: Acde = %g is too large.\n", pParam->BSIM3v32acde); + } + } - if (model->BSIM3v32paramChk ==1) - { -/* Check L and W parameters */ - if (pParam->BSIM3v32leff <= 5.0e-8) - { fprintf(fplog, "Warning: Leff = %g may be too small.\n", - pParam->BSIM3v32leff); - printf("Warning: Leff = %g may be too small.\n", - pParam->BSIM3v32leff); - } + if (model->BSIM3v32paramChk ==1) + { + /* Check L and W parameters */ + if (pParam->BSIM3v32leff <= 5.0e-8) + { fprintf(fplog, "Warning: Leff = %g may be too small.\n", + pParam->BSIM3v32leff); + printf("Warning: Leff = %g may be too small.\n", + pParam->BSIM3v32leff); + } - if (pParam->BSIM3v32leffCV <= 5.0e-8) - { fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n", - pParam->BSIM3v32leffCV); - printf("Warning: Leff for CV = %g may be too small.\n", - pParam->BSIM3v32leffCV); - } + if (pParam->BSIM3v32leffCV <= 5.0e-8) + { fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n", + pParam->BSIM3v32leffCV); + printf("Warning: Leff for CV = %g may be too small.\n", + pParam->BSIM3v32leffCV); + } - if (pParam->BSIM3v32weff <= 1.0e-7) - { fprintf(fplog, "Warning: Weff = %g may be too small.\n", - pParam->BSIM3v32weff); - printf("Warning: Weff = %g may be too small.\n", - pParam->BSIM3v32weff); - } + if (pParam->BSIM3v32weff <= 1.0e-7) + { fprintf(fplog, "Warning: Weff = %g may be too small.\n", + pParam->BSIM3v32weff); + printf("Warning: Weff = %g may be too small.\n", + pParam->BSIM3v32weff); + } - if (pParam->BSIM3v32weffCV <= 1.0e-7) - { fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n", - pParam->BSIM3v32weffCV); - printf("Warning: Weff for CV = %g may be too small.\n", - pParam->BSIM3v32weffCV); - } + if (pParam->BSIM3v32weffCV <= 1.0e-7) + { fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n", + pParam->BSIM3v32weffCV); + printf("Warning: Weff for CV = %g may be too small.\n", + pParam->BSIM3v32weffCV); + } -/* Check threshold voltage parameters */ - if (pParam->BSIM3v32nlx < 0.0) - { fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx); - printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx); - } - if (model->BSIM3v32tox < 1.0e-9) - { fprintf(fplog, "Warning: Tox = %g is less than 10A.\n", - model->BSIM3v32tox); - printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v32tox); - } + /* Check threshold voltage parameters */ + if (pParam->BSIM3v32nlx < 0.0) + { fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx); + printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx); + } + if (model->BSIM3v32tox < 1.0e-9) + { fprintf(fplog, "Warning: Tox = %g is less than 10A.\n", + model->BSIM3v32tox); + printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v32tox); + } - if (pParam->BSIM3v32npeak <= 1.0e15) - { fprintf(fplog, "Warning: Nch = %g may be too small.\n", - pParam->BSIM3v32npeak); - printf("Warning: Nch = %g may be too small.\n", - pParam->BSIM3v32npeak); - } - else if (pParam->BSIM3v32npeak >= 1.0e21) - { fprintf(fplog, "Warning: Nch = %g may be too large.\n", - pParam->BSIM3v32npeak); - printf("Warning: Nch = %g may be too large.\n", - pParam->BSIM3v32npeak); - } + if (pParam->BSIM3v32npeak <= 1.0e15) + { fprintf(fplog, "Warning: Nch = %g may be too small.\n", + pParam->BSIM3v32npeak); + printf("Warning: Nch = %g may be too small.\n", + pParam->BSIM3v32npeak); + } + else if (pParam->BSIM3v32npeak >= 1.0e21) + { fprintf(fplog, "Warning: Nch = %g may be too large.\n", + pParam->BSIM3v32npeak); + printf("Warning: Nch = %g may be too large.\n", + pParam->BSIM3v32npeak); + } - if (pParam->BSIM3v32nsub <= 1.0e14) - { fprintf(fplog, "Warning: Nsub = %g may be too small.\n", - pParam->BSIM3v32nsub); - printf("Warning: Nsub = %g may be too small.\n", - pParam->BSIM3v32nsub); - } - else if (pParam->BSIM3v32nsub >= 1.0e21) - { fprintf(fplog, "Warning: Nsub = %g may be too large.\n", - pParam->BSIM3v32nsub); - printf("Warning: Nsub = %g may be too large.\n", - pParam->BSIM3v32nsub); - } + if (pParam->BSIM3v32nsub <= 1.0e14) + { fprintf(fplog, "Warning: Nsub = %g may be too small.\n", + pParam->BSIM3v32nsub); + printf("Warning: Nsub = %g may be too small.\n", + pParam->BSIM3v32nsub); + } + else if (pParam->BSIM3v32nsub >= 1.0e21) + { fprintf(fplog, "Warning: Nsub = %g may be too large.\n", + pParam->BSIM3v32nsub); + printf("Warning: Nsub = %g may be too large.\n", + pParam->BSIM3v32nsub); + } - if ((pParam->BSIM3v32ngate > 0.0) && - (pParam->BSIM3v32ngate <= 1.e18)) - { fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n", - pParam->BSIM3v32ngate); - printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n", - pParam->BSIM3v32ngate); - } + if ((pParam->BSIM3v32ngate > 0.0) && + (pParam->BSIM3v32ngate <= 1.e18)) + { fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM3v32ngate); + printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM3v32ngate); + } - if (pParam->BSIM3v32dvt0 < 0.0) - { fprintf(fplog, "Warning: Dvt0 = %g is negative.\n", - pParam->BSIM3v32dvt0); - printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v32dvt0); - } + if (pParam->BSIM3v32dvt0 < 0.0) + { fprintf(fplog, "Warning: Dvt0 = %g is negative.\n", + pParam->BSIM3v32dvt0); + printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v32dvt0); + } - if (fabs(1.0e-6 / (pParam->BSIM3v32w0 + pParam->BSIM3v32weff)) > 10.0) - { fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n"); - printf("Warning: (W0 + Weff) may be too small.\n"); - } + if (fabs(1.0e-6 / (pParam->BSIM3v32w0 + pParam->BSIM3v32weff)) > 10.0) + { fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n"); + printf("Warning: (W0 + Weff) may be too small.\n"); + } -/* Check subthreshold parameters */ - if (pParam->BSIM3v32nfactor < 0.0) - { fprintf(fplog, "Warning: Nfactor = %g is negative.\n", - pParam->BSIM3v32nfactor); - printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v32nfactor); - } - if (pParam->BSIM3v32cdsc < 0.0) - { fprintf(fplog, "Warning: Cdsc = %g is negative.\n", - pParam->BSIM3v32cdsc); - printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v32cdsc); - } - if (pParam->BSIM3v32cdscd < 0.0) - { fprintf(fplog, "Warning: Cdscd = %g is negative.\n", - pParam->BSIM3v32cdscd); - printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v32cdscd); - } -/* Check DIBL parameters */ - if (pParam->BSIM3v32eta0 < 0.0) - { fprintf(fplog, "Warning: Eta0 = %g is negative.\n", - pParam->BSIM3v32eta0); - printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v32eta0); - } + /* Check subthreshold parameters */ + if (pParam->BSIM3v32nfactor < 0.0) + { fprintf(fplog, "Warning: Nfactor = %g is negative.\n", + pParam->BSIM3v32nfactor); + printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v32nfactor); + } + if (pParam->BSIM3v32cdsc < 0.0) + { fprintf(fplog, "Warning: Cdsc = %g is negative.\n", + pParam->BSIM3v32cdsc); + printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v32cdsc); + } + if (pParam->BSIM3v32cdscd < 0.0) + { fprintf(fplog, "Warning: Cdscd = %g is negative.\n", + pParam->BSIM3v32cdscd); + printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v32cdscd); + } + /* Check DIBL parameters */ + if (pParam->BSIM3v32eta0 < 0.0) + { fprintf(fplog, "Warning: Eta0 = %g is negative.\n", + pParam->BSIM3v32eta0); + printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v32eta0); + } -/* Check Abulk parameters */ - if (fabs(1.0e-6 / (pParam->BSIM3v32b1 + pParam->BSIM3v32weff)) > 10.0) - { fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n"); - printf("Warning: (B1 + Weff) may be too small.\n"); - } + /* Check Abulk parameters */ + if (fabs(1.0e-6 / (pParam->BSIM3v32b1 + pParam->BSIM3v32weff)) > 10.0) + { fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n"); + printf("Warning: (B1 + Weff) may be too small.\n"); + } -/* Check Saturation parameters */ - if (pParam->BSIM3v32a2 < 0.01) - { fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v32a2); - printf("Warning: A2 = %g is too small. Set to 0.01.\n", - pParam->BSIM3v32a2); - pParam->BSIM3v32a2 = 0.01; - } - else if (pParam->BSIM3v32a2 > 1.0) - { fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", - pParam->BSIM3v32a2); - printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", - pParam->BSIM3v32a2); - pParam->BSIM3v32a2 = 1.0; - pParam->BSIM3v32a1 = 0.0; + /* Check Saturation parameters */ + if (pParam->BSIM3v32a2 < 0.01) + { fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v32a2); + printf("Warning: A2 = %g is too small. Set to 0.01.\n", + pParam->BSIM3v32a2); + pParam->BSIM3v32a2 = 0.01; + } + else if (pParam->BSIM3v32a2 > 1.0) + { fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM3v32a2); + printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM3v32a2); + pParam->BSIM3v32a2 = 1.0; + pParam->BSIM3v32a1 = 0.0; - } + } - if (pParam->BSIM3v32rdsw < 0.0) - { fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n", - pParam->BSIM3v32rdsw); - printf("Warning: Rdsw = %g is negative. Set to zero.\n", - pParam->BSIM3v32rdsw); - pParam->BSIM3v32rdsw = 0.0; - pParam->BSIM3v32rds0 = 0.0; - } - else if ((pParam->BSIM3v32rds0 > 0.0) && (pParam->BSIM3v32rds0 < 0.001)) - { fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", - pParam->BSIM3v32rds0); - printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", - pParam->BSIM3v32rds0); - pParam->BSIM3v32rds0 = 0.0; - } - if (pParam->BSIM3v32vsattemp < 1.0e3) - { fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp); - printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp); - } + if (pParam->BSIM3v32rdsw < 0.0) + { fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM3v32rdsw); + printf("Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM3v32rdsw); + pParam->BSIM3v32rdsw = 0.0; + pParam->BSIM3v32rds0 = 0.0; + } + else if ((pParam->BSIM3v32rds0 > 0.0) && (pParam->BSIM3v32rds0 < 0.001)) + { fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", + pParam->BSIM3v32rds0); + printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", + pParam->BSIM3v32rds0); + pParam->BSIM3v32rds0 = 0.0; + } + if (pParam->BSIM3v32vsattemp < 1.0e3) + { fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp); + printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp); + } - if (pParam->BSIM3v32pdibl1 < 0.0) - { fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n", - pParam->BSIM3v32pdibl1); - printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v32pdibl1); - } - if (pParam->BSIM3v32pdibl2 < 0.0) - { fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n", - pParam->BSIM3v32pdibl2); - printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v32pdibl2); - } -/* Check overlap capacitance parameters */ - if (model->BSIM3v32cgdo < 0.0) - { fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo); - printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo); - model->BSIM3v32cgdo = 0.0; - } - if (model->BSIM3v32cgso < 0.0) - { fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso); - printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso); - model->BSIM3v32cgso = 0.0; - } - if (model->BSIM3v32cgbo < 0.0) - { fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo); - printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo); - model->BSIM3v32cgbo = 0.0; - } + if (pParam->BSIM3v32pdibl1 < 0.0) + { fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n", + pParam->BSIM3v32pdibl1); + printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v32pdibl1); + } + if (pParam->BSIM3v32pdibl2 < 0.0) + { fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n", + pParam->BSIM3v32pdibl2); + printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v32pdibl2); + } + /* Check overlap capacitance parameters */ + if (model->BSIM3v32cgdo < 0.0) + { fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo); + printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo); + model->BSIM3v32cgdo = 0.0; + } + if (model->BSIM3v32cgso < 0.0) + { fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso); + printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso); + model->BSIM3v32cgso = 0.0; + } + if (model->BSIM3v32cgbo < 0.0) + { fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo); + printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo); + model->BSIM3v32cgbo = 0.0; + } - }/* loop for the parameter check for warning messages */ - fclose(fplog); + }/* loop for the parameter check for warning messages */ + fclose(fplog); } else { fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n"); diff --git a/src/spicelib/devices/bsim3v32/b3v32cvtest.c b/src/spicelib/devices/bsim3v32/b3v32cvtest.c index 52c162c37..8d0f717fe 100644 --- a/src/spicelib/devices/bsim3v32/b3v32cvtest.c +++ b/src/spicelib/devices/bsim3v32/b3v32cvtest.c @@ -31,21 +31,21 @@ double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs; for (; model != NULL; model = model->BSIM3v32nextModel) { /* loop through all the instances of the model */ for (here = model->BSIM3v32instances; here != NULL ; - here=here->BSIM3v32nextInstance) - { - vbs = model->BSIM3v32type - * (*(ckt->CKTrhsOld+here->BSIM3v32bNode) - - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); + here=here->BSIM3v32nextInstance) + { + vbs = model->BSIM3v32type + * (*(ckt->CKTrhsOld+here->BSIM3v32bNode) + - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); vgs = model->BSIM3v32type - * (*(ckt->CKTrhsOld+here->BSIM3v32gNode) - - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); + * (*(ckt->CKTrhsOld+here->BSIM3v32gNode) + - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); vds = model->BSIM3v32type - * (*(ckt->CKTrhsOld+here->BSIM3v32dNodePrime) - - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); + * (*(ckt->CKTrhsOld+here->BSIM3v32dNodePrime) + - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); vbd = vbs - vds; vgd = vgs - vds; - vgdo = *(ckt->CKTstate0 + here->BSIM3v32vgs) - - *(ckt->CKTstate0 + here->BSIM3v32vds); + vgdo = *(ckt->CKTstate0 + here->BSIM3v32vgs) + - *(ckt->CKTstate0 + here->BSIM3v32vds); delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v32vbs); delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v32vbd); delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v32vgs); @@ -54,47 +54,47 @@ double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs; cd = here->BSIM3v32cd - here->BSIM3v32cbd; if (here->BSIM3v32mode >= 0) - { cd += here->BSIM3v32csub; - cdhat = cd - here->BSIM3v32gbd * delvbd - + (here->BSIM3v32gmbs + here->BSIM3v32gbbs) * delvbs - + (here->BSIM3v32gm + here->BSIM3v32gbgs) * delvgs - + (here->BSIM3v32gds + here->BSIM3v32gbds) * delvds; + { cd += here->BSIM3v32csub; + cdhat = cd - here->BSIM3v32gbd * delvbd + + (here->BSIM3v32gmbs + here->BSIM3v32gbbs) * delvbs + + (here->BSIM3v32gm + here->BSIM3v32gbgs) * delvgs + + (here->BSIM3v32gds + here->BSIM3v32gbds) * delvds; } - else - { cdhat = cd + (here->BSIM3v32gmbs - here->BSIM3v32gbd) * delvbd - + here->BSIM3v32gm * delvgd - here->BSIM3v32gds * delvds; + else + { cdhat = cd + (here->BSIM3v32gmbs - here->BSIM3v32gbd) * delvbd + + here->BSIM3v32gm * delvgd - here->BSIM3v32gds * delvds; } /* * check convergence */ if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX))) - { tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd)) - + ckt->CKTabstol; + { tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd)) + + ckt->CKTabstol; if (fabs(cdhat - cd) >= tol) - { ckt->CKTnoncon++; + { ckt->CKTnoncon++; return(OK); - } + } cbs = here->BSIM3v32cbs; cbd = here->BSIM3v32cbd; if (here->BSIM3v32mode >= 0) - { cbhat = cbs + cbd - here->BSIM3v32csub - + here->BSIM3v32gbd * delvbd - + (here->BSIM3v32gbs - here->BSIM3v32gbbs) * delvbs - - here->BSIM3v32gbgs * delvgs - - here->BSIM3v32gbds * delvds; - } - else - { cbhat = cbs + cbd - here->BSIM3v32csub - + here->BSIM3v32gbs * delvbs - + (here->BSIM3v32gbd - here->BSIM3v32gbbs) * delvbd - - here->BSIM3v32gbgs * delvgd - + here->BSIM3v32gbds * delvds; - } - tol = ckt->CKTreltol * MAX(fabs(cbhat), - fabs(cbs + cbd - here->BSIM3v32csub)) + ckt->CKTabstol; - if (fabs(cbhat - (cbs + cbd - here->BSIM3v32csub)) > tol) - { ckt->CKTnoncon++; + { cbhat = cbs + cbd - here->BSIM3v32csub + + here->BSIM3v32gbd * delvbd + + (here->BSIM3v32gbs - here->BSIM3v32gbbs) * delvbs + - here->BSIM3v32gbgs * delvgs + - here->BSIM3v32gbds * delvds; + } + else + { cbhat = cbs + cbd - here->BSIM3v32csub + + here->BSIM3v32gbs * delvbs + + (here->BSIM3v32gbd - here->BSIM3v32gbbs) * delvbd + - here->BSIM3v32gbgs * delvgd + + here->BSIM3v32gbds * delvds; + } + tol = ckt->CKTreltol * MAX(fabs(cbhat), + fabs(cbs + cbd - here->BSIM3v32csub)) + ckt->CKTabstol; + if (fabs(cbhat - (cbs + cbd - here->BSIM3v32csub)) > tol) + { ckt->CKTnoncon++; return(OK); } } diff --git a/src/spicelib/devices/bsim3v32/b3v32del.c b/src/spicelib/devices/bsim3v32/b3v32del.c index f6b9d15b8..4b5227540 100644 --- a/src/spicelib/devices/bsim3v32/b3v32del.c +++ b/src/spicelib/devices/bsim3v32/b3v32del.c @@ -25,11 +25,11 @@ BSIM3v32model *model = (BSIM3v32model*)inModel; BSIM3v32instance **prev = NULL; BSIM3v32instance *here; - for (; model ; model = model->BSIM3v32nextModel) + for (; model ; model = model->BSIM3v32nextModel) { prev = &(model->BSIM3v32instances); - for (here = *prev; here ; here = *prev) - { if (here->BSIM3v32name == name || (fast && here==*fast)) - { *prev= here->BSIM3v32nextInstance; + for (here = *prev; here ; here = *prev) + { if (here->BSIM3v32name == name || (fast && here==*fast)) + { *prev= here->BSIM3v32nextInstance; FREE(here); return(OK); } diff --git a/src/spicelib/devices/bsim3v32/b3v32dest.c b/src/spicelib/devices/bsim3v32/b3v32dest.c index b3e05f67b..8858e547f 100644 --- a/src/spicelib/devices/bsim3v32/b3v32dest.c +++ b/src/spicelib/devices/bsim3v32/b3v32dest.c @@ -23,7 +23,7 @@ BSIM3v32destroy (GENmodel **inModel) BSIM3v32model *oldmod = NULL; for (; mod ; mod = mod->BSIM3v32nextModel) { - /** added to get rid of link list pSizeDependParamKnot **/ + /** added to get rid of link list pSizeDependParamKnot **/ struct bsim3v32SizeDependParam *pParam, *pParamOld=NULL; pParam = mod->pSizeDependParamKnot; diff --git a/src/spicelib/devices/bsim3v32/b3v32getic.c b/src/spicelib/devices/bsim3v32/b3v32getic.c index 4f7798bd8..5c7bab523 100644 --- a/src/spicelib/devices/bsim3v32/b3v32getic.c +++ b/src/spicelib/devices/bsim3v32/b3v32getic.c @@ -21,20 +21,20 @@ BSIM3v32getic (GENmodel *inModel, CKTcircuit *ckt) BSIM3v32model *model = (BSIM3v32model*)inModel; BSIM3v32instance *here; - for (; model ; model = model->BSIM3v32nextModel) + for (; model ; model = model->BSIM3v32nextModel) { for (here = model->BSIM3v32instances; here; here = here->BSIM3v32nextInstance) - { - if (!here->BSIM3v32icVBSGiven) - { here->BSIM3v32icVBS = *(ckt->CKTrhs + here->BSIM3v32bNode) - - *(ckt->CKTrhs + here->BSIM3v32sNode); + { + if (!here->BSIM3v32icVBSGiven) + { here->BSIM3v32icVBS = *(ckt->CKTrhs + here->BSIM3v32bNode) + - *(ckt->CKTrhs + here->BSIM3v32sNode); } - if (!here->BSIM3v32icVDSGiven) - { here->BSIM3v32icVDS = *(ckt->CKTrhs + here->BSIM3v32dNode) - - *(ckt->CKTrhs + here->BSIM3v32sNode); + if (!here->BSIM3v32icVDSGiven) + { here->BSIM3v32icVDS = *(ckt->CKTrhs + here->BSIM3v32dNode) + - *(ckt->CKTrhs + here->BSIM3v32sNode); } - if (!here->BSIM3v32icVGSGiven) - { here->BSIM3v32icVGS = *(ckt->CKTrhs + here->BSIM3v32gNode) - - *(ckt->CKTrhs + here->BSIM3v32sNode); + if (!here->BSIM3v32icVGSGiven) + { here->BSIM3v32icVGS = *(ckt->CKTrhs + here->BSIM3v32gNode) + - *(ckt->CKTrhs + here->BSIM3v32sNode); } } } diff --git a/src/spicelib/devices/bsim3v32/b3v32ld.c b/src/spicelib/devices/bsim3v32/b3v32ld.c index 650a0c499..69b212937 100644 --- a/src/spicelib/devices/bsim3v32/b3v32ld.c +++ b/src/spicelib/devices/bsim3v32/b3v32ld.c @@ -65,13 +65,13 @@ double DeltaPhi, dDeltaPhi_dVg, dDeltaPhi_dVd, dDeltaPhi_dVb; double Cox, Tox, Tcen, dTcen_dVg, dTcen_dVd, dTcen_dVb; double Ccen, Coxeff, dCoxeff_dVg, dCoxeff_dVd, dCoxeff_dVb; double Denomi, dDenomi_dVg, dDenomi_dVd, dDenomi_dVb; -double ueff, dueff_dVg, dueff_dVd, dueff_dVb; +double ueff, dueff_dVg, dueff_dVd, dueff_dVb; double Esat, Vdsat; double EsatL, dEsatL_dVg, dEsatL_dVd, dEsatL_dVb; -double dVdsat_dVg, dVdsat_dVb, dVdsat_dVd, Vasat, dAlphaz_dVg, dAlphaz_dVb; -double dVasat_dVg, dVasat_dVb, dVasat_dVd, Va, dVa_dVd, dVa_dVg, dVa_dVb; -double Vbseff, dVbseff_dVb, VbseffCV, dVbseffCV_dVb; -double Arg1, One_Third_CoxWL, Two_Third_CoxWL, Alphaz, CoxWL; +double dVdsat_dVg, dVdsat_dVb, dVdsat_dVd, Vasat, dAlphaz_dVg, dAlphaz_dVb; +double dVasat_dVg, dVasat_dVb, dVasat_dVd, Va, dVa_dVd, dVa_dVg, dVa_dVb; +double Vbseff, dVbseff_dVb, VbseffCV, dVbseffCV_dVb; +double Arg1, One_Third_CoxWL, Two_Third_CoxWL, Alphaz, CoxWL; double T0, dT0_dVg, dT0_dVd, dT0_dVb; double T1, dT1_dVg, dT1_dVd, dT1_dVb; double T2, dT2_dVg, dT2_dVd, dT2_dVb; @@ -82,7 +82,7 @@ double T6; double T7; double T8; double T9; -double T10; +double T10; double T11, T12; double tmp, Abulk, dAbulk_dVb, Abulk0, dAbulk0_dVb; double VACLM, dVACLM_dVg, dVACLM_dVd, dVACLM_dVb; @@ -97,9 +97,9 @@ double tempv; #endif double a1, ScalingFactor; -double Vgsteff, dVgsteff_dVg, dVgsteff_dVd, dVgsteff_dVb; -double Vdseff, dVdseff_dVg, dVdseff_dVd, dVdseff_dVb; -double VdseffCV, dVdseffCV_dVg, dVdseffCV_dVd, dVdseffCV_dVb; +double Vgsteff, dVgsteff_dVg, dVgsteff_dVd, dVgsteff_dVb; +double Vdseff, dVdseff_dVg, dVdseff_dVd, dVdseff_dVb; +double VdseffCV, dVdseffCV_dVg, dVdseffCV_dVd, dVdseffCV_dVb; double diffVds, dAbulk_dVg; double beta, dbeta_dVg, dbeta_dVd, dbeta_dVb; double gche, dgche_dVg, dgche_dVd, dgche_dVb; @@ -123,79 +123,79 @@ double dxpart, sxpart, ggtg, ggtd, ggts, ggtb; double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs; double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs; -double gbspsp, gbbdp, gbbsp, gbspg, gbspb, gbspdp; -double gbdpdp, gbdpg, gbdpb, gbdpsp; +double gbspsp, gbbdp, gbbsp, gbspg, gbspb, gbspdp; +double gbdpdp, gbdpg, gbdpb, gbdpsp; double Cgg, Cgd, Cgb, Cdg, Cdd, Cds; double Csg, Csd, Css, Csb, Cbg, Cbd, Cbb; double Cgg1, Cgb1, Cgd1, Cbg1, Cbb1, Cbd1, Qac0, Qsub0; double dQac0_dVg, dQac0_dVd = 0.0, dQac0_dVb, dQsub0_dVg; double dQsub0_dVd, dQsub0_dVb; - + double m; struct bsim3v32SizeDependParam *pParam; int ByPass, Check, ChargeComputationNeeded, error; ScalingFactor = 1.0e-9; -ChargeComputationNeeded = +ChargeComputationNeeded = ((ckt->CKTmode & (MODEDCTRANCURVE | MODEAC | MODETRAN | MODEINITSMSIG)) || ((ckt->CKTmode & MODETRANOP) && (ckt->CKTmode & MODEUIC))) ? 1 : 0; for (; model != NULL; model = model->BSIM3v32nextModel) -{ for (here = model->BSIM3v32instances; here != NULL; +{ for (here = model->BSIM3v32instances; here != NULL; here = here->BSIM3v32nextInstance) - { - Check = 1; + { + Check = 1; ByPass = 0; - pParam = here->pParam; + pParam = here->pParam; if ((ckt->CKTmode & MODEINITSMSIG)) - { vbs = *(ckt->CKTstate0 + here->BSIM3v32vbs); + { vbs = *(ckt->CKTstate0 + here->BSIM3v32vbs); vgs = *(ckt->CKTstate0 + here->BSIM3v32vgs); vds = *(ckt->CKTstate0 + here->BSIM3v32vds); qdef = *(ckt->CKTstate0 + here->BSIM3v32qdef); } - else if ((ckt->CKTmode & MODEINITTRAN)) - { vbs = *(ckt->CKTstate1 + here->BSIM3v32vbs); + else if ((ckt->CKTmode & MODEINITTRAN)) + { vbs = *(ckt->CKTstate1 + here->BSIM3v32vbs); vgs = *(ckt->CKTstate1 + here->BSIM3v32vgs); vds = *(ckt->CKTstate1 + here->BSIM3v32vds); qdef = *(ckt->CKTstate1 + here->BSIM3v32qdef); } - else if ((ckt->CKTmode & MODEINITJCT) && !here->BSIM3v32off) - { vds = model->BSIM3v32type * here->BSIM3v32icVDS; + else if ((ckt->CKTmode & MODEINITJCT) && !here->BSIM3v32off) + { vds = model->BSIM3v32type * here->BSIM3v32icVDS; vgs = model->BSIM3v32type * here->BSIM3v32icVGS; vbs = model->BSIM3v32type * here->BSIM3v32icVBS; qdef = 0.0; - if ((vds == 0.0) && (vgs == 0.0) && (vbs == 0.0) && + if ((vds == 0.0) && (vgs == 0.0) && (vbs == 0.0) && ((ckt->CKTmode & (MODETRAN | MODEAC|MODEDCOP | MODEDCTRANCURVE)) || (!(ckt->CKTmode & MODEUIC)))) - { vbs = 0.0; + { vbs = 0.0; vgs = model->BSIM3v32type * here->BSIM3v32vth0 + 0.1; vds = 0.1; } } - else if ((ckt->CKTmode & (MODEINITJCT | MODEINITFIX)) && - (here->BSIM3v32off)) + else if ((ckt->CKTmode & (MODEINITJCT | MODEINITFIX)) && + (here->BSIM3v32off)) { qdef = vbs = vgs = vds = 0.0; - } + } else - { + { #ifndef PREDICTOR if ((ckt->CKTmode & MODEINITPRED)) - { xfact = ckt->CKTdelta / ckt->CKTdeltaOld[1]; - *(ckt->CKTstate0 + here->BSIM3v32vbs) = + { xfact = ckt->CKTdelta / ckt->CKTdeltaOld[1]; + *(ckt->CKTstate0 + here->BSIM3v32vbs) = *(ckt->CKTstate1 + here->BSIM3v32vbs); vbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v32vbs)) - (xfact * (*(ckt->CKTstate2 + here->BSIM3v32vbs))); - *(ckt->CKTstate0 + here->BSIM3v32vgs) = + *(ckt->CKTstate0 + here->BSIM3v32vgs) = *(ckt->CKTstate1 + here->BSIM3v32vgs); vgs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v32vgs)) - (xfact * (*(ckt->CKTstate2 + here->BSIM3v32vgs))); - *(ckt->CKTstate0 + here->BSIM3v32vds) = + *(ckt->CKTstate0 + here->BSIM3v32vds) = *(ckt->CKTstate1 + here->BSIM3v32vds); vds = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v32vds)) - (xfact * (*(ckt->CKTstate2 + here->BSIM3v32vds))); - *(ckt->CKTstate0 + here->BSIM3v32vbd) = + *(ckt->CKTstate0 + here->BSIM3v32vbd) = *(ckt->CKTstate0 + here->BSIM3v32vbs) - *(ckt->CKTstate0 + here->BSIM3v32vds); *(ckt->CKTstate0 + here->BSIM3v32qdef) = @@ -203,14 +203,14 @@ for (; model != NULL; model = model->BSIM3v32nextModel) qdef = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v32qdef)) -(xfact * (*(ckt->CKTstate2 + here->BSIM3v32qdef))); } - else - { + else + { #endif /* PREDICTOR */ vbs = model->BSIM3v32type * (*(ckt->CKTrhsOld + here->BSIM3v32bNode) - *(ckt->CKTrhsOld + here->BSIM3v32sNodePrime)); vgs = model->BSIM3v32type - * (*(ckt->CKTrhsOld + here->BSIM3v32gNode) + * (*(ckt->CKTrhsOld + here->BSIM3v32gNode) - *(ckt->CKTrhsOld + here->BSIM3v32sNodePrime)); vds = model->BSIM3v32type * (*(ckt->CKTrhsOld + here->BSIM3v32dNodePrime) @@ -274,7 +274,7 @@ for (; model != NULL; model = model->BSIM3v32nextModel) * MAX(fabs(cdhat),fabs(Idtot)) + ckt->CKTabstol)) { tempv = MAX(fabs(cbhat),fabs(Ibtot)) + ckt->CKTabstol; if ((fabs(cbhat - Ibtot)) < ckt->CKTreltol * tempv) - { /* bypass code */ + { /* bypass code */ vbs = *(ckt->CKTstate0 + here->BSIM3v32vbs); vbd = *(ckt->CKTstate0 + here->BSIM3v32vbd); vgs = *(ckt->CKTstate0 + here->BSIM3v32vgs); @@ -285,46 +285,46 @@ for (; model != NULL; model = model->BSIM3v32nextModel) vgb = vgs - vbs; cdrain = here->BSIM3v32cd; - if ((ckt->CKTmode & (MODETRAN | MODEAC)) || - ((ckt->CKTmode & MODETRANOP) && + if ((ckt->CKTmode & (MODETRAN | MODEAC)) || + ((ckt->CKTmode & MODETRANOP) && (ckt->CKTmode & MODEUIC))) - { ByPass = 1; + { ByPass = 1; qgate = here->BSIM3v32qgate; qbulk = here->BSIM3v32qbulk; qdrn = here->BSIM3v32qdrn; - goto line755; + goto line755; + } + else + { goto line850; } - else - { goto line850; - } } } #endif /*NOBYPASS*/ von = here->BSIM3v32von; if (*(ckt->CKTstate0 + here->BSIM3v32vds) >= 0.0) - { vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3v32vgs), von); + { vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3v32vgs), von); vds = vgs - vgd; vds = DEVlimvds(vds, *(ckt->CKTstate0 + here->BSIM3v32vds)); vgd = vgs - vds; } - else - { vgd = DEVfetlim(vgd, vgdo, von); + else + { vgd = DEVfetlim(vgd, vgdo, von); vds = vgs - vgd; vds = -DEVlimvds(-vds, -(*(ckt->CKTstate0+here->BSIM3v32vds))); vgs = vgd + vds; } if (vds >= 0.0) - { vbs = DEVpnjlim(vbs, *(ckt->CKTstate0 + here->BSIM3v32vbs), + { vbs = DEVpnjlim(vbs, *(ckt->CKTstate0 + here->BSIM3v32vbs), CONSTvt0, model->BSIM3v32vcrit, &Check); vbd = vbs - vds; } - else - { vbd = DEVpnjlim(vbd, *(ckt->CKTstate0 + here->BSIM3v32vbd), - CONSTvt0, model->BSIM3v32vcrit, &Check); + else + { vbd = DEVpnjlim(vbd, *(ckt->CKTstate0 + here->BSIM3v32vbd), + CONSTvt0, model->BSIM3v32vcrit, &Check); vbs = vbd + vds; } } @@ -339,36 +339,36 @@ for (; model != NULL; model = model->BSIM3v32nextModel) /* acm model */ if (model->BSIM3v32acmMod == 0) { - if ((here->BSIM3v32sourceArea <= 0.0) - && (here->BSIM3v32sourcePerimeter <= 0.0)) - { - SourceSatCurrent = 1.0e-14; - } - else - { - SourceSatCurrent = here->BSIM3v32sourceArea - * model->BSIM3v32jctTempSatCurDensity - + here->BSIM3v32sourcePerimeter - * model->BSIM3v32jctSidewallTempSatCurDensity; - } - } + if ((here->BSIM3v32sourceArea <= 0.0) + && (here->BSIM3v32sourcePerimeter <= 0.0)) + { + SourceSatCurrent = 1.0e-14; + } + else + { + SourceSatCurrent = here->BSIM3v32sourceArea + * model->BSIM3v32jctTempSatCurDensity + + here->BSIM3v32sourcePerimeter + * model->BSIM3v32jctSidewallTempSatCurDensity; + } + } else { SourceSatCurrent = 0.0; if (!here->BSIM3v32sourceAreaGiven) - { + { here->BSIM3v32sourceArea = 2.0 * model->BSIM3v32hdif * pParam->BSIM3v32weff; } SourceSatCurrent = here->BSIM3v32sourceArea * model->BSIM3v32jctTempSatCurDensity; if (!here->BSIM3v32sourcePerimeterGiven) - { + { here->BSIM3v32sourcePerimeter = 4.0 * model->BSIM3v32hdif + 2.0 * pParam->BSIM3v32weff; } SourceSatCurrent = SourceSatCurrent + here->BSIM3v32sourcePerimeter * model->BSIM3v32jctSidewallTempSatCurDensity; if (SourceSatCurrent <= 0.0) SourceSatCurrent = 1.0e-14; } - if (SourceSatCurrent <= 0.0) - { here->BSIM3v32gbs = ckt->CKTgmin; + if (SourceSatCurrent <= 0.0) + { here->BSIM3v32gbs = ckt->CKTgmin; here->BSIM3v32cbs = here->BSIM3v32gbs * vbs; } else @@ -376,7 +376,7 @@ for (; model != NULL; model = model->BSIM3v32nextModel) { evbs = exp(vbs / Nvtm); here->BSIM3v32gbs = SourceSatCurrent * evbs / Nvtm + ckt->CKTgmin; here->BSIM3v32cbs = SourceSatCurrent * (evbs - 1.0) - + ckt->CKTgmin * vbs; + + ckt->CKTgmin * vbs; } else { if (vbs < here->BSIM3v32vjsm) @@ -386,24 +386,24 @@ for (; model != NULL; model = model->BSIM3v32nextModel) + ckt->CKTgmin * vbs; } else - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - T0 = here->BSIM3v32IsEvjsm / Nvtm; - here->BSIM3v32gbs = T0 + (ckt->CKTgmin); - here->BSIM3v32cbs = here->BSIM3v32IsEvjsm - SourceSatCurrent - + T0 * (vbs - here->BSIM3v32vjsm) + (ckt->CKTgmin) * vbs; - break; - case BSIM3v32V32: - default: - T0 = (SourceSatCurrent + model->BSIM3v32ijth) / Nvtm; - here->BSIM3v32gbs = T0 + (ckt->CKTgmin); - here->BSIM3v32cbs = model->BSIM3v32ijth + (ckt->CKTgmin) * vbs - + T0 * (vbs - here->BSIM3v32vjsm); - } + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + T0 = here->BSIM3v32IsEvjsm / Nvtm; + here->BSIM3v32gbs = T0 + (ckt->CKTgmin); + here->BSIM3v32cbs = here->BSIM3v32IsEvjsm - SourceSatCurrent + + T0 * (vbs - here->BSIM3v32vjsm) + (ckt->CKTgmin) * vbs; + break; + case BSIM3v32V32: + default: + T0 = (SourceSatCurrent + model->BSIM3v32ijth) / Nvtm; + here->BSIM3v32gbs = T0 + (ckt->CKTgmin); + here->BSIM3v32cbs = model->BSIM3v32ijth + (ckt->CKTgmin) * vbs + + T0 * (vbs - here->BSIM3v32vjsm); + } } } } @@ -425,19 +425,19 @@ for (; model != NULL; model = model->BSIM3v32nextModel) { DrainSatCurrent = 0.0; if (!here->BSIM3v32drainAreaGiven) - { + { here->BSIM3v32drainArea = 2.0 * model->BSIM3v32hdif * pParam->BSIM3v32weff; } DrainSatCurrent = here->BSIM3v32drainArea * model->BSIM3v32jctTempSatCurDensity; if (!here->BSIM3v32drainPerimeterGiven) - { + { here->BSIM3v32drainPerimeter = 4.0 * model->BSIM3v32hdif + 2.0 * pParam->BSIM3v32weff; } DrainSatCurrent = DrainSatCurrent + here->BSIM3v32drainPerimeter * model->BSIM3v32jctSidewallTempSatCurDensity; if (DrainSatCurrent <= 0.0) DrainSatCurrent = 1.0e-14; } - if (DrainSatCurrent <= 0.0) - { here->BSIM3v32gbd = ckt->CKTgmin; + if (DrainSatCurrent <= 0.0) + { here->BSIM3v32gbd = ckt->CKTgmin; here->BSIM3v32cbd = here->BSIM3v32gbd * vbd; } else @@ -455,68 +455,68 @@ for (; model != NULL; model = model->BSIM3v32nextModel) + ckt->CKTgmin * vbd; } else - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - T0 = here->BSIM3v32IsEvjdm / Nvtm; - here->BSIM3v32gbd = T0 + (ckt->CKTgmin); - here->BSIM3v32cbd = here->BSIM3v32IsEvjdm - DrainSatCurrent - + T0 * (vbd - here->BSIM3v32vjdm) + (ckt->CKTgmin) * vbd; - break; - case BSIM3v32V32: - default: - T0 = (DrainSatCurrent + model->BSIM3v32ijth) / Nvtm; - here->BSIM3v32gbd = T0 + (ckt->CKTgmin); - here->BSIM3v32cbd = model->BSIM3v32ijth + (ckt->CKTgmin) * vbd - + T0 * (vbd - here->BSIM3v32vjdm); - } + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + T0 = here->BSIM3v32IsEvjdm / Nvtm; + here->BSIM3v32gbd = T0 + (ckt->CKTgmin); + here->BSIM3v32cbd = here->BSIM3v32IsEvjdm - DrainSatCurrent + + T0 * (vbd - here->BSIM3v32vjdm) + (ckt->CKTgmin) * vbd; + break; + case BSIM3v32V32: + default: + T0 = (DrainSatCurrent + model->BSIM3v32ijth) / Nvtm; + here->BSIM3v32gbd = T0 + (ckt->CKTgmin); + here->BSIM3v32cbd = model->BSIM3v32ijth + (ckt->CKTgmin) * vbd + + T0 * (vbd - here->BSIM3v32vjdm); + } } } } /* End of diode DC model */ if (vds >= 0.0) - { /* normal mode */ + { /* normal mode */ here->BSIM3v32mode = 1; Vds = vds; Vgs = vgs; Vbs = vbs; } - else - { /* inverse mode */ + else + { /* inverse mode */ here->BSIM3v32mode = -1; Vds = -vds; Vgs = vgd; Vbs = vbd; } - T0 = Vbs - pParam->BSIM3v32vbsc - 0.001; - T1 = sqrt(T0 * T0 - 0.004 * pParam->BSIM3v32vbsc); - Vbseff = pParam->BSIM3v32vbsc + 0.5 * (T0 + T1); - dVbseff_dVb = 0.5 * (1.0 + T0 / T1); + T0 = Vbs - pParam->BSIM3v32vbsc - 0.001; + T1 = sqrt(T0 * T0 - 0.004 * pParam->BSIM3v32vbsc); + Vbseff = pParam->BSIM3v32vbsc + 0.5 * (T0 + T1); + dVbseff_dVb = 0.5 * (1.0 + T0 / T1); if (Vbseff < Vbs) { Vbseff = Vbs; } if (Vbseff > 0.0) - { T0 = pParam->BSIM3v32phi / (pParam->BSIM3v32phi + Vbseff); + { T0 = pParam->BSIM3v32phi / (pParam->BSIM3v32phi + Vbseff); Phis = pParam->BSIM3v32phi * T0; dPhis_dVb = -T0 * T0; sqrtPhis = pParam->BSIM3v32phis3 / (pParam->BSIM3v32phi + 0.5 * Vbseff); dsqrtPhis_dVb = -0.5 * sqrtPhis * sqrtPhis / pParam->BSIM3v32phis3; } - else - { Phis = pParam->BSIM3v32phi - Vbseff; + else + { Phis = pParam->BSIM3v32phi - Vbseff; dPhis_dVb = -1.0; sqrtPhis = sqrt(Phis); - dsqrtPhis_dVb = -0.5 / sqrtPhis; + dsqrtPhis_dVb = -0.5 / sqrtPhis; } Xdep = pParam->BSIM3v32Xdep0 * sqrtPhis / pParam->BSIM3v32sqrtPhi; dXdep_dVb = (pParam->BSIM3v32Xdep0 / pParam->BSIM3v32sqrtPhi) - * dsqrtPhis_dVb; + * dsqrtPhis_dVb; Leff = pParam->BSIM3v32leff; Vtm = model->BSIM3v32vtm; @@ -526,27 +526,27 @@ for (; model != NULL; model = model->BSIM3v32nextModel) T0 = pParam->BSIM3v32dvt2 * Vbseff; if (T0 >= - 0.5) - { T1 = 1.0 + T0; - T2 = pParam->BSIM3v32dvt2; - } - else /* Added to avoid any discontinuity problems caused by dvt2 */ - { T4 = 1.0 / (3.0 + 8.0 * T0); - T1 = (1.0 + 3.0 * T0) * T4; - T2 = pParam->BSIM3v32dvt2 * T4 * T4; - } + { T1 = 1.0 + T0; + T2 = pParam->BSIM3v32dvt2; + } + else /* Added to avoid any discontinuity problems caused by dvt2 */ + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM3v32dvt2 * T4 * T4; + } lt1 = model->BSIM3v32factor1 * T3 * T1; dlt1_dVb = model->BSIM3v32factor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); T0 = pParam->BSIM3v32dvt2w * Vbseff; if (T0 >= - 0.5) - { T1 = 1.0 + T0; - T2 = pParam->BSIM3v32dvt2w; - } - else /* Added to avoid any discontinuity problems caused by dvt2w */ - { T4 = 1.0 / (3.0 + 8.0 * T0); - T1 = (1.0 + 3.0 * T0) * T4; - T2 = pParam->BSIM3v32dvt2w * T4 * T4; - } + { T1 = 1.0 + T0; + T2 = pParam->BSIM3v32dvt2w; + } + else /* Added to avoid any discontinuity problems caused by dvt2w */ + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM3v32dvt2w * T4 * T4; + } ltw = model->BSIM3v32factor1 * T3 * T1; dltw_dVb = model->BSIM3v32factor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); @@ -590,18 +590,18 @@ for (; model != NULL; model = model->BSIM3v32nextModel) + (pParam->BSIM3v32kt1 + pParam->BSIM3v32kt1l / Leff + pParam->BSIM3v32kt2 * Vbseff) * TempRatio; tmp2 = model->BSIM3v32tox * pParam->BSIM3v32phi - / (pParam->BSIM3v32weff + pParam->BSIM3v32w0); + / (pParam->BSIM3v32weff + pParam->BSIM3v32w0); - T3 = pParam->BSIM3v32eta0 + pParam->BSIM3v32etab * Vbseff; - if (T3 < 1.0e-4) /* avoid discontinuity problems caused by etab */ - { T9 = 1.0 / (3.0 - 2.0e4 * T3); - T3 = (2.0e-4 - T3) * T9; - T4 = T9 * T9; - } - else - { T4 = 1.0; - } - dDIBL_Sft_dVd = T3 * pParam->BSIM3v32theta0vb0; + T3 = pParam->BSIM3v32eta0 + pParam->BSIM3v32etab * Vbseff; + if (T3 < 1.0e-4) /* avoid discontinuity problems caused by etab */ + { T9 = 1.0 / (3.0 - 2.0e4 * T3); + T3 = (2.0e-4 - T3) * T9; + T4 = T9 * T9; + } + else + { T4 = 1.0; + } + dDIBL_Sft_dVd = T3 * pParam->BSIM3v32theta0vb0; DIBL_Sft = dDIBL_Sft_dVd * Vds; Vth = model->BSIM3v32type * here->BSIM3v32vth0 - pParam->BSIM3v32k1 @@ -609,7 +609,7 @@ for (; model != NULL; model = model->BSIM3v32nextModel) - pParam->BSIM3v32k2ox * Vbseff - Delt_vth - T2 + (pParam->BSIM3v32k3 + pParam->BSIM3v32k3b * Vbseff) * tmp2 + T1 - DIBL_Sft; - here->BSIM3v32von = Vth; + here->BSIM3v32von = Vth; dVth_dVb = pParam->BSIM3v32k1ox * dsqrtPhis_dVb - pParam->BSIM3v32k2ox - dDelt_vth_dVb - dT2_dVb + pParam->BSIM3v32k3b * tmp2 @@ -621,28 +621,28 @@ for (; model != NULL; model = model->BSIM3v32nextModel) tmp2 = pParam->BSIM3v32nfactor * EPSSI / Xdep; tmp3 = pParam->BSIM3v32cdsc + pParam->BSIM3v32cdscb * Vbseff + pParam->BSIM3v32cdscd * Vds; - tmp4 = (tmp2 + tmp3 * Theta0 + pParam->BSIM3v32cit) / model->BSIM3v32cox; - if (tmp4 >= -0.5) - { n = 1.0 + tmp4; - dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + tmp4 = (tmp2 + tmp3 * Theta0 + pParam->BSIM3v32cit) / model->BSIM3v32cox; + if (tmp4 >= -0.5) + { n = 1.0 + tmp4; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + pParam->BSIM3v32cdscb * Theta0) / model->BSIM3v32cox; dn_dVd = pParam->BSIM3v32cdscd * Theta0 / model->BSIM3v32cox; - } - else - /* avoid discontinuity problems caused by tmp4 */ - { T0 = 1.0 / (3.0 + 8.0 * tmp4); - n = (1.0 + 3.0 * tmp4) * T0; - T0 *= T0; - dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + } + else + /* avoid discontinuity problems caused by tmp4 */ + { T0 = 1.0 / (3.0 + 8.0 * tmp4); + n = (1.0 + 3.0 * tmp4) * T0; + T0 *= T0; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + pParam->BSIM3v32cdscb * Theta0) / model->BSIM3v32cox * T0; dn_dVd = pParam->BSIM3v32cdscd * Theta0 / model->BSIM3v32cox * T0; - } + } /* Poly Gate Si Depletion Effect */ - T0 = here->BSIM3v32vfb + pParam->BSIM3v32phi; - if ((pParam->BSIM3v32ngate > 1.e18) && (pParam->BSIM3v32ngate < 1.e25) + T0 = here->BSIM3v32vfb + pParam->BSIM3v32phi; + if ((pParam->BSIM3v32ngate > 1.e18) && (pParam->BSIM3v32ngate < 1.e25) && (Vgs > T0)) - /* added to avoid the problem caused by ngate */ + /* added to avoid the problem caused by ngate */ { T1 = 1.0e6 * Charge_q * EPSSI * pParam->BSIM3v32ngate / (model->BSIM3v32cox * model->BSIM3v32cox); T4 = sqrt(1.0 + 2.0 * (Vgs - T0) / T1); @@ -652,10 +652,10 @@ for (; model != NULL; model = model->BSIM3v32nextModel) T6 = sqrt(T7 * T7 + 0.224); T5 = 1.12 - 0.5 * (T7 + T6); Vgs_eff = Vgs - T5; - dVgs_eff_dVg = 1.0 - (0.5 - 0.5 / T4) * (1.0 + T7 / T6); + dVgs_eff_dVg = 1.0 - (0.5 - 0.5 / T4) * (1.0 + T7 / T6); } - else - { Vgs_eff = Vgs; + else + { Vgs_eff = Vgs; dVgs_eff_dVg = 1.0; } Vgst = Vgs_eff - Vth; @@ -666,154 +666,154 @@ for (; model != NULL; model = model->BSIM3v32nextModel) VgstNVt = Vgst / T10; ExpArg = (2.0 * pParam->BSIM3v32voff - Vgst) / T10; - /* MCJ: Very small Vgst */ + /* MCJ: Very small Vgst */ if (VgstNVt > EXP_THRESHOLD) - { Vgsteff = Vgst; + { Vgsteff = Vgst; dVgsteff_dVg = dVgs_eff_dVg; dVgsteff_dVd = -dVth_dVd; dVgsteff_dVb = -dVth_dVb; - } - else if (ExpArg > EXP_THRESHOLD) - { T0 = (Vgst - pParam->BSIM3v32voff) / (n * Vtm); - ExpVgst = exp(T0); - Vgsteff = Vtm * pParam->BSIM3v32cdep0 / model->BSIM3v32cox * ExpVgst; + } + else if (ExpArg > EXP_THRESHOLD) + { T0 = (Vgst - pParam->BSIM3v32voff) / (n * Vtm); + ExpVgst = exp(T0); + Vgsteff = Vtm * pParam->BSIM3v32cdep0 / model->BSIM3v32cox * ExpVgst; dVgsteff_dVg = Vgsteff / (n * Vtm); dVgsteff_dVd = -dVgsteff_dVg * (dVth_dVd + T0 * Vtm * dn_dVd); dVgsteff_dVb = -dVgsteff_dVg * (dVth_dVb + T0 * Vtm * dn_dVb); - dVgsteff_dVg *= dVgs_eff_dVg; - } - else - { ExpVgst = exp(VgstNVt); + dVgsteff_dVg *= dVgs_eff_dVg; + } + else + { ExpVgst = exp(VgstNVt); T1 = T10 * log(1.0 + ExpVgst); dT1_dVg = ExpVgst / (1.0 + ExpVgst); dT1_dVb = -dT1_dVg * (dVth_dVb + Vgst / n * dn_dVb) - + T1 / n * dn_dVb; - dT1_dVd = -dT1_dVg * (dVth_dVd + Vgst / n * dn_dVd) - + T1 / n * dn_dVd; + + T1 / n * dn_dVb; + dT1_dVd = -dT1_dVg * (dVth_dVd + Vgst / n * dn_dVd) + + T1 / n * dn_dVd; - dT2_dVg = -model->BSIM3v32cox / (Vtm * pParam->BSIM3v32cdep0) - * exp(ExpArg); + dT2_dVg = -model->BSIM3v32cox / (Vtm * pParam->BSIM3v32cdep0) + * exp(ExpArg); T2 = 1.0 - T10 * dT2_dVg; dT2_dVd = -dT2_dVg * (dVth_dVd - 2.0 * Vtm * ExpArg * dn_dVd) - + (T2 - 1.0) / n * dn_dVd; + + (T2 - 1.0) / n * dn_dVd; dT2_dVb = -dT2_dVg * (dVth_dVb - 2.0 * Vtm * ExpArg * dn_dVb) - + (T2 - 1.0) / n * dn_dVb; + + (T2 - 1.0) / n * dn_dVb; Vgsteff = T1 / T2; - T3 = T2 * T2; + T3 = T2 * T2; dVgsteff_dVg = (T2 * dT1_dVg - T1 * dT2_dVg) / T3 * dVgs_eff_dVg; dVgsteff_dVd = (T2 * dT1_dVd - T1 * dT2_dVd) / T3; dVgsteff_dVb = (T2 * dT1_dVb - T1 * dT2_dVb) / T3; - } - /* Added revision dependent code */ + } + /* Added revision dependent code */ if (model->BSIM3v32intVersion > BSIM3v32V323) { - here->BSIM3v32Vgsteff = Vgsteff; - } + here->BSIM3v32Vgsteff = Vgsteff; + } /* Calculate Effective Channel Geometry */ T9 = sqrtPhis - pParam->BSIM3v32sqrtPhi; - Weff = pParam->BSIM3v32weff - 2.0 * (pParam->BSIM3v32dwg * Vgsteff - + pParam->BSIM3v32dwb * T9); + Weff = pParam->BSIM3v32weff - 2.0 * (pParam->BSIM3v32dwg * Vgsteff + + pParam->BSIM3v32dwb * T9); dWeff_dVg = -2.0 * pParam->BSIM3v32dwg; dWeff_dVb = -2.0 * pParam->BSIM3v32dwb * dsqrtPhis_dVb; if (Weff < 2.0e-8) /* to avoid the discontinuity problem due to Weff*/ - { T0 = 1.0 / (6.0e-8 - 2.0 * Weff); - Weff = 2.0e-8 * (4.0e-8 - Weff) * T0; - T0 *= T0 * 4.0e-16; + { T0 = 1.0 / (6.0e-8 - 2.0 * Weff); + Weff = 2.0e-8 * (4.0e-8 - Weff) * T0; + T0 *= T0 * 4.0e-16; dWeff_dVg *= T0; - dWeff_dVb *= T0; + dWeff_dVb *= T0; } T0 = pParam->BSIM3v32prwg * Vgsteff + pParam->BSIM3v32prwb * T9; - if (T0 >= -0.9) - { Rds = pParam->BSIM3v32rds0 * (1.0 + T0); - dRds_dVg = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwg; + if (T0 >= -0.9) + { Rds = pParam->BSIM3v32rds0 * (1.0 + T0); + dRds_dVg = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwg; dRds_dVb = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwb * dsqrtPhis_dVb; - } - else - /* to avoid the discontinuity problem due to prwg and prwb*/ - { T1 = 1.0 / (17.0 + 20.0 * T0); - Rds = pParam->BSIM3v32rds0 * (0.8 + T0) * T1; - T1 *= T1; - dRds_dVg = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwg * T1; - dRds_dVb = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwb * dsqrtPhis_dVb - * T1; - } - /* Added revision dependent code */ - if (model->BSIM3v32intVersion > BSIM3v32V323) { - here->BSIM3v32rds = Rds; /* Noise Bugfix */ } - + else + /* to avoid the discontinuity problem due to prwg and prwb*/ + { T1 = 1.0 / (17.0 + 20.0 * T0); + Rds = pParam->BSIM3v32rds0 * (0.8 + T0) * T1; + T1 *= T1; + dRds_dVg = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwg * T1; + dRds_dVb = pParam->BSIM3v32rds0 * pParam->BSIM3v32prwb * dsqrtPhis_dVb + * T1; + } + /* Added revision dependent code */ + if (model->BSIM3v32intVersion > BSIM3v32V323) { + here->BSIM3v32rds = Rds; /* Noise Bugfix */ + } + /* Calculate Abulk */ T1 = 0.5 * pParam->BSIM3v32k1ox / sqrtPhis; dT1_dVb = -T1 / sqrtPhis * dsqrtPhis_dVb; T9 = sqrt(pParam->BSIM3v32xj * Xdep); tmp1 = Leff + 2.0 * T9; - T5 = Leff / tmp1; + T5 = Leff / tmp1; tmp2 = pParam->BSIM3v32a0 * T5; - tmp3 = pParam->BSIM3v32weff + pParam->BSIM3v32b1; + tmp3 = pParam->BSIM3v32weff + pParam->BSIM3v32b1; tmp4 = pParam->BSIM3v32b0 / tmp3; T2 = tmp2 + tmp4; dT2_dVb = -T9 / tmp1 / Xdep * dXdep_dVb; T6 = T5 * T5; T7 = T5 * T6; - Abulk0 = 1.0 + T1 * T2; + Abulk0 = 1.0 + T1 * T2; dAbulk0_dVb = T1 * tmp2 * dT2_dVb + T2 * dT1_dVb; T8 = pParam->BSIM3v32ags * pParam->BSIM3v32a0 * T7; dAbulk_dVg = -T1 * T8; - Abulk = Abulk0 + dAbulk_dVg * Vgsteff; + Abulk = Abulk0 + dAbulk_dVg * Vgsteff; dAbulk_dVb = dAbulk0_dVb - T8 * Vgsteff * (dT1_dVb - + 3.0 * T1 * dT2_dVb); + + 3.0 * T1 * dT2_dVb); if (Abulk0 < 0.1) /* added to avoid the problems caused by Abulk0 */ - { T9 = 1.0 / (3.0 - 20.0 * Abulk0); - Abulk0 = (0.2 - Abulk0) * T9; - dAbulk0_dVb *= T9 * T9; - } + { T9 = 1.0 / (3.0 - 20.0 * Abulk0); + Abulk0 = (0.2 - Abulk0) * T9; + dAbulk0_dVb *= T9 * T9; + } if (Abulk < 0.1) /* added to avoid the problems caused by Abulk */ - { T9 = 1.0 / (3.0 - 20.0 * Abulk); - Abulk = (0.2 - Abulk) * T9; - /* Added revision dependent code */ + { T9 = 1.0 / (3.0 - 20.0 * Abulk); + Abulk = (0.2 - Abulk) * T9; + /* Added revision dependent code */ if (model->BSIM3v32intVersion > BSIM3v32V32) { - T10 = T9 * T9; - dAbulk_dVb *= T10; - dAbulk_dVg *= T10; - } else { - dAbulk_dVb *= T9 * T9; - } - } - /* Added revision dependent code */ + T10 = T9 * T9; + dAbulk_dVb *= T10; + dAbulk_dVg *= T10; + } else { + dAbulk_dVb *= T9 * T9; + } + } + /* Added revision dependent code */ if (model->BSIM3v32intVersion > BSIM3v32V323) { - here->BSIM3v32Abulk = Abulk; + here->BSIM3v32Abulk = Abulk; } T2 = pParam->BSIM3v32keta * Vbseff; - if (T2 >= -0.9) - { T0 = 1.0 / (1.0 + T2); + if (T2 >= -0.9) + { T0 = 1.0 / (1.0 + T2); dT0_dVb = -pParam->BSIM3v32keta * T0 * T0; - } - else + } + else /* added to avoid the problems caused by Keta */ - { T1 = 1.0 / (0.8 + T2); - T0 = (17.0 + 20.0 * T2) * T1; + { T1 = 1.0 / (0.8 + T2); + T0 = (17.0 + 20.0 * T2) * T1; dT0_dVb = -pParam->BSIM3v32keta * T1 * T1; - } - dAbulk_dVg *= T0; - dAbulk_dVb = dAbulk_dVb * T0 + Abulk * dT0_dVb; - dAbulk0_dVb = dAbulk0_dVb * T0 + Abulk0 * dT0_dVb; - Abulk *= T0; - Abulk0 *= T0; + } + dAbulk_dVg *= T0; + dAbulk_dVb = dAbulk_dVb * T0 + Abulk * dT0_dVb; + dAbulk0_dVb = dAbulk0_dVb * T0 + Abulk0 * dT0_dVb; + Abulk *= T0; + Abulk0 *= T0; /* Mobility calculation */ if (model->BSIM3v32mobMod == 1) - { T0 = Vgsteff + Vth + Vth; + { T0 = Vgsteff + Vth + Vth; T2 = pParam->BSIM3v32ua + pParam->BSIM3v32uc * Vbseff; T3 = T0 / model->BSIM3v32tox; T5 = T3 * (T2 + pParam->BSIM3v32ub * T3); @@ -821,49 +821,49 @@ for (; model != NULL; model = model->BSIM3v32nextModel) dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM3v32uc * T3; } - else if (model->BSIM3v32mobMod == 2) - { T5 = Vgsteff / model->BSIM3v32tox * (pParam->BSIM3v32ua - + pParam->BSIM3v32uc * Vbseff + pParam->BSIM3v32ub * Vgsteff + else if (model->BSIM3v32mobMod == 2) + { T5 = Vgsteff / model->BSIM3v32tox * (pParam->BSIM3v32ua + + pParam->BSIM3v32uc * Vbseff + pParam->BSIM3v32ub * Vgsteff / model->BSIM3v32tox); dDenomi_dVg = (pParam->BSIM3v32ua + pParam->BSIM3v32uc * Vbseff - + 2.0 * pParam->BSIM3v32ub * Vgsteff / model->BSIM3v32tox) - / model->BSIM3v32tox; + + 2.0 * pParam->BSIM3v32ub * Vgsteff / model->BSIM3v32tox) + / model->BSIM3v32tox; dDenomi_dVd = 0.0; - dDenomi_dVb = Vgsteff * pParam->BSIM3v32uc / model->BSIM3v32tox; + dDenomi_dVb = Vgsteff * pParam->BSIM3v32uc / model->BSIM3v32tox; } - else - { T0 = Vgsteff + Vth + Vth; + else + { T0 = Vgsteff + Vth + Vth; T2 = 1.0 + pParam->BSIM3v32uc * Vbseff; T3 = T0 / model->BSIM3v32tox; T4 = T3 * (pParam->BSIM3v32ua + pParam->BSIM3v32ub * T3); - T5 = T4 * T2; + T5 = T4 * T2; dDenomi_dVg = (pParam->BSIM3v32ua + 2.0 * pParam->BSIM3v32ub * T3) * T2 - / model->BSIM3v32tox; + / model->BSIM3v32tox; dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM3v32uc * T4; } - if (T5 >= -0.8) - { Denomi = 1.0 + T5; - } - else /* Added to avoid the discontinuity problem caused by ua and ub*/ - { T9 = 1.0 / (7.0 + 10.0 * T5); - Denomi = (0.6 + T5) * T9; - T9 *= T9; + if (T5 >= -0.8) + { Denomi = 1.0 + T5; + } + else /* Added to avoid the discontinuity problem caused by ua and ub*/ + { T9 = 1.0 / (7.0 + 10.0 * T5); + Denomi = (0.6 + T5) * T9; + T9 *= T9; dDenomi_dVg *= T9; dDenomi_dVd *= T9; dDenomi_dVb *= T9; - } + } here->BSIM3v32ueff = ueff = here->BSIM3v32u0temp / Denomi; - T9 = -ueff / Denomi; + T9 = -ueff / Denomi; dueff_dVg = T9 * dDenomi_dVg; dueff_dVd = T9 * dDenomi_dVd; dueff_dVb = T9 * dDenomi_dVb; /* Saturation Drain Voltage Vdsat */ WVCox = Weff * pParam->BSIM3v32vsattemp * model->BSIM3v32cox; - WVCoxRds = WVCox * Rds; + WVCoxRds = WVCox * Rds; Esat = 2.0 * pParam->BSIM3v32vsattemp / ueff; EsatL = Esat * Leff; @@ -871,31 +871,31 @@ for (; model != NULL; model = model->BSIM3v32nextModel) dEsatL_dVg = T0 * dueff_dVg; dEsatL_dVd = T0 * dueff_dVd; dEsatL_dVb = T0 * dueff_dVb; - - /* Sqrt() */ + + /* Sqrt() */ a1 = pParam->BSIM3v32a1; - if (a1 == 0.0) - { Lambda = pParam->BSIM3v32a2; - dLambda_dVg = 0.0; - } - else if (a1 > 0.0) + if (a1 == 0.0) + { Lambda = pParam->BSIM3v32a2; + dLambda_dVg = 0.0; + } + else if (a1 > 0.0) /* Added to avoid the discontinuity problem caused by a1 and a2 (Lambda) */ - { T0 = 1.0 - pParam->BSIM3v32a2; - T1 = T0 - pParam->BSIM3v32a1 * Vgsteff - 0.0001; - T2 = sqrt(T1 * T1 + 0.0004 * T0); - Lambda = pParam->BSIM3v32a2 + T0 - 0.5 * (T1 + T2); - dLambda_dVg = 0.5 * pParam->BSIM3v32a1 * (1.0 + T1 / T2); - } - else - { T1 = pParam->BSIM3v32a2 + pParam->BSIM3v32a1 * Vgsteff - 0.0001; - T2 = sqrt(T1 * T1 + 0.0004 * pParam->BSIM3v32a2); - Lambda = 0.5 * (T1 + T2); - dLambda_dVg = 0.5 * pParam->BSIM3v32a1 * (1.0 + T1 / T2); - } + { T0 = 1.0 - pParam->BSIM3v32a2; + T1 = T0 - pParam->BSIM3v32a1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * T0); + Lambda = pParam->BSIM3v32a2 + T0 - 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM3v32a1 * (1.0 + T1 / T2); + } + else + { T1 = pParam->BSIM3v32a2 + pParam->BSIM3v32a1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * pParam->BSIM3v32a2); + Lambda = 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM3v32a1 * (1.0 + T1 / T2); + } Vgst2Vtm = Vgsteff + 2.0 * Vtm; - /* Added revision dependent code */ + /* Added revision dependent code */ if (model->BSIM3v32intVersion > BSIM3v32V323) { here->BSIM3v32AbovVgst2Vtm = Abulk / Vgst2Vtm; } @@ -907,48 +907,48 @@ for (; model != NULL; model = model->BSIM3v32nextModel) else { tmp2 = dWeff_dVg / Weff; tmp3 = dWeff_dVb / Weff; - } + } if ((Rds == 0.0) && (Lambda == 1.0)) { T0 = 1.0 / (Abulk * EsatL + Vgst2Vtm); tmp1 = 0.0; - T1 = T0 * T0; - T2 = Vgst2Vtm * T0; + T1 = T0 * T0; + T2 = Vgst2Vtm * T0; T3 = EsatL * Vgst2Vtm; Vdsat = T3 * T0; - + dT0_dVg = -(Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 1.0) * T1; - dT0_dVd = -(Abulk * dEsatL_dVd) * T1; - dT0_dVb = -(Abulk * dEsatL_dVb + dAbulk_dVb * EsatL) * T1; + dT0_dVd = -(Abulk * dEsatL_dVd) * T1; + dT0_dVb = -(Abulk * dEsatL_dVb + dAbulk_dVb * EsatL) * T1; dVdsat_dVg = T3 * dT0_dVg + T2 * dEsatL_dVg + EsatL * T0; dVdsat_dVd = T3 * dT0_dVd + T2 * dEsatL_dVd; - dVdsat_dVb = T3 * dT0_dVb + T2 * dEsatL_dVb; + dVdsat_dVb = T3 * dT0_dVb + T2 * dEsatL_dVb; } else { tmp1 = dLambda_dVg / (Lambda * Lambda); T9 = Abulk * WVCoxRds; - T8 = Abulk * T9; - T7 = Vgst2Vtm * T9; + T8 = Abulk * T9; + T7 = Vgst2Vtm * T9; T6 = Vgst2Vtm * WVCoxRds; - T0 = 2.0 * Abulk * (T9 - 1.0 + 1.0 / Lambda); + T0 = 2.0 * Abulk * (T9 - 1.0 + 1.0 / Lambda); dT0_dVg = 2.0 * (T8 * tmp2 - Abulk * tmp1 - + (2.0 * T9 + 1.0 / Lambda - 1.0) * dAbulk_dVg); - + + (2.0 * T9 + 1.0 / Lambda - 1.0) * dAbulk_dVg); + dT0_dVb = 2.0 * (T8 * (2.0 / Abulk * dAbulk_dVb + tmp3) - + (1.0 / Lambda - 1.0) * dAbulk_dVb); - dT0_dVd = 0.0; + + (1.0 / Lambda - 1.0) * dAbulk_dVb); + dT0_dVd = 0.0; T1 = Vgst2Vtm * (2.0 / Lambda - 1.0) + Abulk * EsatL + 3.0 * T7; - + dT1_dVg = (2.0 / Lambda - 1.0) - 2.0 * Vgst2Vtm * tmp1 - + Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 3.0 * (T9 - + T7 * tmp2 + T6 * dAbulk_dVg); + + Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 3.0 * (T9 + + T7 * tmp2 + T6 * dAbulk_dVg); dT1_dVb = Abulk * dEsatL_dVb + EsatL * dAbulk_dVb - + 3.0 * (T6 * dAbulk_dVb + T7 * tmp3); + + 3.0 * (T6 * dAbulk_dVb + T7 * tmp3); dT1_dVd = Abulk * dEsatL_dVd; T2 = Vgst2Vtm * (EsatL + 2.0 * T6); dT2_dVg = EsatL + Vgst2Vtm * dEsatL_dVg - + T6 * (4.0 + 2.0 * Vgst2Vtm * tmp2); + + T6 * (4.0 + 2.0 * Vgst2Vtm * tmp2); dT2_dVb = Vgst2Vtm * (dEsatL_dVb + 2.0 * T6 * tmp3); dT2_dVd = Vgst2Vtm * dEsatL_dVd; @@ -956,16 +956,16 @@ for (; model != NULL; model = model->BSIM3v32nextModel) Vdsat = (T1 - T3) / T0; dT3_dVg = (T1 * dT1_dVg - 2.0 * (T0 * dT2_dVg + T2 * dT0_dVg)) - / T3; + / T3; dT3_dVd = (T1 * dT1_dVd - 2.0 * (T0 * dT2_dVd + T2 * dT0_dVd)) - / T3; + / T3; dT3_dVb = (T1 * dT1_dVb - 2.0 * (T0 * dT2_dVb + T2 * dT0_dVb)) - / T3; + / T3; dVdsat_dVg = (dT1_dVg - (T1 * dT1_dVg - dT0_dVg * T2 - - T0 * dT2_dVg) / T3 - Vdsat * dT0_dVg) / T0; + - T0 * dT2_dVg) / T3 - Vdsat * dT0_dVg) / T0; dVdsat_dVb = (dT1_dVb - (T1 * dT1_dVb - dT0_dVb * T2 - - T0 * dT2_dVb) / T3 - Vdsat * dT0_dVb) / T0; + - T0 * dT2_dVb) / T3 - Vdsat * dT0_dVb) / T0; dVdsat_dVd = (dT1_dVd - (T1 * dT1_dVd - T0 * dT2_dVd) / T3) / T0; } here->BSIM3v32vdsat = Vdsat; @@ -977,52 +977,52 @@ for (; model != NULL; model = model->BSIM3v32nextModel) dT1_dVb = dVdsat_dVb; T2 = sqrt(T1 * T1 + 4.0 * pParam->BSIM3v32delta * Vdsat); - T0 = T1 / T2; - T3 = 2.0 * pParam->BSIM3v32delta / T2; + T0 = T1 / T2; + T3 = 2.0 * pParam->BSIM3v32delta / T2; dT2_dVg = T0 * dT1_dVg + T3 * dVdsat_dVg; dT2_dVd = T0 * dT1_dVd + T3 * dVdsat_dVd; dT2_dVb = T0 * dT1_dVb + T3 * dVdsat_dVb; Vdseff = Vdsat - 0.5 * (T1 + T2); - dVdseff_dVg = dVdsat_dVg - 0.5 * (dT1_dVg + dT2_dVg); - dVdseff_dVd = dVdsat_dVd - 0.5 * (dT1_dVd + dT2_dVd); - dVdseff_dVb = dVdsat_dVb - 0.5 * (dT1_dVb + dT2_dVb); - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - /* Added to eliminate non-zero Vdseff at Vds=0.0 */ - if (Vds == 0.0) - { - Vdseff = 0.0; - dVdseff_dVg = 0.0; - dVdseff_dVb = 0.0; - } - break; - case BSIM3v32V32: - default: - /* Do nothing */ - break; - } + dVdseff_dVg = dVdsat_dVg - 0.5 * (dT1_dVg + dT2_dVg); + dVdseff_dVd = dVdsat_dVd - 0.5 * (dT1_dVd + dT2_dVd); + dVdseff_dVb = dVdsat_dVb - 0.5 * (dT1_dVb + dT2_dVb); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + /* Added to eliminate non-zero Vdseff at Vds=0.0 */ + if (Vds == 0.0) + { + Vdseff = 0.0; + dVdseff_dVg = 0.0; + dVdseff_dVb = 0.0; + } + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } /* Calculate VAsat */ tmp4 = 1.0 - 0.5 * Abulk * Vdsat / Vgst2Vtm; T9 = WVCoxRds * Vgsteff; - T8 = T9 / Vgst2Vtm; + T8 = T9 / Vgst2Vtm; T0 = EsatL + Vdsat + 2.0 * T9 * tmp4; - + T7 = 2.0 * WVCoxRds * tmp4; dT0_dVg = dEsatL_dVg + dVdsat_dVg + T7 * (1.0 + tmp2 * Vgsteff) - - T8 * (Abulk * dVdsat_dVg - Abulk * Vdsat / Vgst2Vtm - + Vdsat * dAbulk_dVg); - + - T8 * (Abulk * dVdsat_dVg - Abulk * Vdsat / Vgst2Vtm + + Vdsat * dAbulk_dVg); + dT0_dVb = dEsatL_dVb + dVdsat_dVb + T7 * tmp3 * Vgsteff - - T8 * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + - T8 * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); dT0_dVd = dEsatL_dVd + dVdsat_dVd - T8 * Abulk * dVdsat_dVd; - T9 = WVCoxRds * Abulk; - T1 = 2.0 / Lambda - 1.0 + T9; + T9 = WVCoxRds * Abulk; + T1 = 2.0 / Lambda - 1.0 + T9; dT1_dVg = -2.0 * tmp1 + WVCoxRds * (Abulk * tmp2 + dAbulk_dVg); dT1_dVb = dAbulk_dVb * WVCoxRds + T9 * tmp3; @@ -1034,42 +1034,42 @@ for (; model != NULL; model = model->BSIM3v32nextModel) if (Vdseff > Vds) Vdseff = Vds; diffVds = Vds - Vdseff; - /* Added revision dependent code */ + /* Added revision dependent code */ if (model->BSIM3v32intVersion > BSIM3v32V323) { - here->BSIM3v32Vdseff = Vdseff; - } + here->BSIM3v32Vdseff = Vdseff; + } /* Calculate VACLM */ if ((pParam->BSIM3v32pclm > 0.0) && (diffVds > 1.0e-10)) - { T0 = 1.0 / (pParam->BSIM3v32pclm * Abulk * pParam->BSIM3v32litl); + { T0 = 1.0 / (pParam->BSIM3v32pclm * Abulk * pParam->BSIM3v32litl); dT0_dVb = -T0 / Abulk * dAbulk_dVb; - dT0_dVg = -T0 / Abulk * dAbulk_dVg; - - T2 = Vgsteff / EsatL; - T1 = Leff * (Abulk + T2); + dT0_dVg = -T0 / Abulk * dAbulk_dVg; + + T2 = Vgsteff / EsatL; + T1 = Leff * (Abulk + T2); dT1_dVg = Leff * ((1.0 - T2 * dEsatL_dVg) / EsatL + dAbulk_dVg); dT1_dVb = Leff * (dAbulk_dVb - T2 * dEsatL_dVb / EsatL); dT1_dVd = -T2 * dEsatL_dVd / Esat; - T9 = T0 * T1; + T9 = T0 * T1; VACLM = T9 * diffVds; dVACLM_dVg = T0 * dT1_dVg * diffVds - T9 * dVdseff_dVg + T1 * diffVds * dT0_dVg; dVACLM_dVb = (dT0_dVb * T1 + T0 * dT1_dVb) * diffVds - - T9 * dVdseff_dVb; + - T9 * dVdseff_dVb; dVACLM_dVd = T0 * dT1_dVd * diffVds + T9 * (1.0 - dVdseff_dVd); } - else - { VACLM = MAX_EXP; + else + { VACLM = MAX_EXP; dVACLM_dVd = dVACLM_dVg = dVACLM_dVb = 0.0; } /* Calculate VADIBL */ if (pParam->BSIM3v32thetaRout > 0.0) - { T8 = Abulk * Vdsat; - T0 = Vgst2Vtm * T8; + { T8 = Abulk * Vdsat; + T0 = Vgst2Vtm * T8; dT0_dVg = Vgst2Vtm * Abulk * dVdsat_dVg + T8 - + Vgst2Vtm * Vdsat * dAbulk_dVg; + + Vgst2Vtm * Vdsat * dAbulk_dVg; dT0_dVb = Vgst2Vtm * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); dT0_dVd = Vgst2Vtm * Abulk * dVdsat_dVd; @@ -1078,59 +1078,59 @@ for (; model != NULL; model = model->BSIM3v32nextModel) dT1_dVb = Abulk * dVdsat_dVb + dAbulk_dVb * Vdsat; dT1_dVd = Abulk * dVdsat_dVd; - T9 = T1 * T1; - T2 = pParam->BSIM3v32thetaRout; + T9 = T1 * T1; + T2 = pParam->BSIM3v32thetaRout; VADIBL = (Vgst2Vtm - T0 / T1) / T2; dVADIBL_dVg = (1.0 - dT0_dVg / T1 + T0 * dT1_dVg / T9) / T2; dVADIBL_dVb = (-dT0_dVb / T1 + T0 * dT1_dVb / T9) / T2; dVADIBL_dVd = (-dT0_dVd / T1 + T0 * dT1_dVd / T9) / T2; - T7 = pParam->BSIM3v32pdiblb * Vbseff; - if (T7 >= -0.9) - { T3 = 1.0 / (1.0 + T7); + T7 = pParam->BSIM3v32pdiblb * Vbseff; + if (T7 >= -0.9) + { T3 = 1.0 / (1.0 + T7); VADIBL *= T3; dVADIBL_dVg *= T3; dVADIBL_dVb = (dVADIBL_dVb - VADIBL * pParam->BSIM3v32pdiblb) - * T3; + * T3; dVADIBL_dVd *= T3; - } - else + } + else /* Added to avoid the discontinuity problem caused by pdiblcb */ - { T4 = 1.0 / (0.8 + T7); - T3 = (17.0 + 20.0 * T7) * T4; + { T4 = 1.0 / (0.8 + T7); + T3 = (17.0 + 20.0 * T7) * T4; dVADIBL_dVg *= T3; dVADIBL_dVb = dVADIBL_dVb * T3 - - VADIBL * pParam->BSIM3v32pdiblb * T4 * T4; + - VADIBL * pParam->BSIM3v32pdiblb * T4 * T4; dVADIBL_dVd *= T3; VADIBL *= T3; - } + } } - else - { VADIBL = MAX_EXP; + else + { VADIBL = MAX_EXP; dVADIBL_dVd = dVADIBL_dVg = dVADIBL_dVb = 0.0; } /* Calculate VA */ - - T8 = pParam->BSIM3v32pvag / EsatL; - T9 = T8 * Vgsteff; - if (T9 > -0.9) - { T0 = 1.0 + T9; + + T8 = pParam->BSIM3v32pvag / EsatL; + T9 = T8 * Vgsteff; + if (T9 > -0.9) + { T0 = 1.0 + T9; dT0_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL); dT0_dVb = -T9 * dEsatL_dVb / EsatL; dT0_dVd = -T9 * dEsatL_dVd / EsatL; - } - else /* Added to avoid the discontinuity problems caused by pvag */ - { T1 = 1.0 / (17.0 + 20.0 * T9); - T0 = (0.8 + T9) * T1; - T1 *= T1; + } + else /* Added to avoid the discontinuity problems caused by pvag */ + { T1 = 1.0 / (17.0 + 20.0 * T9); + T0 = (0.8 + T9) * T1; + T1 *= T1; dT0_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL) * T1; T9 *= T1 / EsatL; dT0_dVb = -T9 * dEsatL_dVb; dT0_dVd = -T9 * dEsatL_dVd; - } - + } + tmp1 = VACLM * VACLM; tmp2 = VADIBL * VADIBL; tmp3 = VACLM + VADIBL; @@ -1147,25 +1147,25 @@ for (; model != NULL; model = model->BSIM3v32nextModel) dVa_dVb = dVasat_dVb + T1 * dT0_dVb + T0 * dT1_dVb; /* Calculate VASCBE */ - if (pParam->BSIM3v32pscbe2 > 0.0) - { if (diffVds > pParam->BSIM3v32pscbe1 * pParam->BSIM3v32litl - / EXP_THRESHOLD) - { T0 = pParam->BSIM3v32pscbe1 * pParam->BSIM3v32litl / diffVds; - VASCBE = Leff * exp(T0) / pParam->BSIM3v32pscbe2; + if (pParam->BSIM3v32pscbe2 > 0.0) + { if (diffVds > pParam->BSIM3v32pscbe1 * pParam->BSIM3v32litl + / EXP_THRESHOLD) + { T0 = pParam->BSIM3v32pscbe1 * pParam->BSIM3v32litl / diffVds; + VASCBE = Leff * exp(T0) / pParam->BSIM3v32pscbe2; T1 = T0 * VASCBE / diffVds; dVASCBE_dVg = T1 * dVdseff_dVg; dVASCBE_dVd = -T1 * (1.0 - dVdseff_dVd); dVASCBE_dVb = T1 * dVdseff_dVb; } - else - { VASCBE = MAX_EXP * Leff/pParam->BSIM3v32pscbe2; + else + { VASCBE = MAX_EXP * Leff/pParam->BSIM3v32pscbe2; dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; } - } - else - { VASCBE = MAX_EXP; + } + else + { VASCBE = MAX_EXP; dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; - } + } /* Calculate Ids */ CoxWovL = model->BSIM3v32cox * Weff / Leff; @@ -1175,48 +1175,48 @@ for (; model != NULL; model = model->BSIM3v32nextModel) dbeta_dVb = CoxWovL * dueff_dVb + beta * dWeff_dVb / Weff; T0 = 1.0 - 0.5 * Abulk * Vdseff / Vgst2Vtm; - dT0_dVg = -0.5 * (Abulk * dVdseff_dVg - - Abulk * Vdseff / Vgst2Vtm + Vdseff * dAbulk_dVg) / Vgst2Vtm; + dT0_dVg = -0.5 * (Abulk * dVdseff_dVg + - Abulk * Vdseff / Vgst2Vtm + Vdseff * dAbulk_dVg) / Vgst2Vtm; dT0_dVd = -0.5 * Abulk * dVdseff_dVd / Vgst2Vtm; dT0_dVb = -0.5 * (Abulk * dVdseff_dVb + dAbulk_dVb * Vdseff) / Vgst2Vtm; fgche1 = Vgsteff * T0; - dfgche1_dVg = Vgsteff * dT0_dVg + T0; - dfgche1_dVd = Vgsteff * dT0_dVd; - dfgche1_dVb = Vgsteff * dT0_dVb; + dfgche1_dVg = Vgsteff * dT0_dVg + T0; + dfgche1_dVd = Vgsteff * dT0_dVd; + dfgche1_dVb = Vgsteff * dT0_dVb; T9 = Vdseff / EsatL; fgche2 = 1.0 + T9; dfgche2_dVg = (dVdseff_dVg - T9 * dEsatL_dVg) / EsatL; dfgche2_dVd = (dVdseff_dVd - T9 * dEsatL_dVd) / EsatL; dfgche2_dVb = (dVdseff_dVb - T9 * dEsatL_dVb) / EsatL; - + gche = beta * fgche1 / fgche2; dgche_dVg = (beta * dfgche1_dVg + fgche1 * dbeta_dVg - - gche * dfgche2_dVg) / fgche2; + - gche * dfgche2_dVg) / fgche2; dgche_dVd = (beta * dfgche1_dVd + fgche1 * dbeta_dVd - - gche * dfgche2_dVd) / fgche2; + - gche * dfgche2_dVd) / fgche2; dgche_dVb = (beta * dfgche1_dVb + fgche1 * dbeta_dVb - - gche * dfgche2_dVb) / fgche2; + - gche * dfgche2_dVb) / fgche2; T0 = 1.0 + gche * Rds; T9 = Vdseff / T0; Idl = gche * T9; dIdl_dVg = (gche * dVdseff_dVg + T9 * dgche_dVg) / T0 - - Idl * gche / T0 * dRds_dVg ; + - Idl * gche / T0 * dRds_dVg ; - dIdl_dVd = (gche * dVdseff_dVd + T9 * dgche_dVd) / T0; - dIdl_dVb = (gche * dVdseff_dVb + T9 * dgche_dVb - - Idl * dRds_dVb * gche) / T0; + dIdl_dVd = (gche * dVdseff_dVd + T9 * dgche_dVd) / T0; + dIdl_dVb = (gche * dVdseff_dVb + T9 * dgche_dVb + - Idl * dRds_dVb * gche) / T0; T9 = diffVds / Va; T0 = 1.0 + T9; Idsa = Idl * T0; dIdsa_dVg = T0 * dIdl_dVg - Idl * (dVdseff_dVg + T9 * dVa_dVg) / Va; dIdsa_dVd = T0 * dIdl_dVd + Idl * (1.0 - dVdseff_dVd - - T9 * dVa_dVd) / Va; + - T9 * dVa_dVd) / Va; dIdsa_dVb = T0 * dIdl_dVb - Idl * (dVdseff_dVb + T9 * dVa_dVb) / Va; T9 = diffVds / VASCBE; @@ -1225,33 +1225,33 @@ for (; model != NULL; model = model->BSIM3v32nextModel) Gm = T0 * dIdsa_dVg - Idsa * (dVdseff_dVg + T9 * dVASCBE_dVg) / VASCBE; Gds = T0 * dIdsa_dVd + Idsa * (1.0 - dVdseff_dVd - - T9 * dVASCBE_dVd) / VASCBE; + - T9 * dVASCBE_dVd) / VASCBE; Gmb = T0 * dIdsa_dVb - Idsa * (dVdseff_dVb - + T9 * dVASCBE_dVb) / VASCBE; + + T9 * dVASCBE_dVb) / VASCBE; Gds += Gm * dVgsteff_dVd; - Gmb += Gm * dVgsteff_dVb; - Gm *= dVgsteff_dVg; - Gmb *= dVbseff_dVb; + Gmb += Gm * dVgsteff_dVb; + Gm *= dVgsteff_dVg; + Gmb *= dVbseff_dVb; /* Substrate current begins */ tmp = pParam->BSIM3v32alpha0 + pParam->BSIM3v32alpha1 * Leff; if ((tmp <= 0.0) || (pParam->BSIM3v32beta0 <= 0.0)) - { Isub = Gbd = Gbb = Gbg = 0.0; + { Isub = Gbd = Gbb = Gbg = 0.0; } - else - { T2 = tmp / Leff; - if (diffVds > pParam->BSIM3v32beta0 / EXP_THRESHOLD) - { T0 = -pParam->BSIM3v32beta0 / diffVds; - T1 = T2 * diffVds * exp(T0); - T3 = T1 / diffVds * (T0 - 1.0); + else + { T2 = tmp / Leff; + if (diffVds > pParam->BSIM3v32beta0 / EXP_THRESHOLD) + { T0 = -pParam->BSIM3v32beta0 / diffVds; + T1 = T2 * diffVds * exp(T0); + T3 = T1 / diffVds * (T0 - 1.0); dT1_dVg = T3 * dVdseff_dVg; dT1_dVd = T3 * (dVdseff_dVd - 1.0); dT1_dVb = T3 * dVdseff_dVb; } - else - { T3 = T2 * MIN_EXP; - T1 = T3 * diffVds; + else + { T3 = T2 * MIN_EXP; + T1 = T3 * diffVds; dT1_dVg = -T3 * dVdseff_dVg; dT1_dVd = T3 * (1.0 - dVdseff_dVd); dT1_dVb = -T3 * dVdseff_dVb; @@ -1262,59 +1262,59 @@ for (; model != NULL; model = model->BSIM3v32nextModel) Gbb = T1 * dIdsa_dVb + Idsa * dT1_dVb; Gbd += Gbg * dVgsteff_dVd; - Gbb += Gbg * dVgsteff_dVb; - Gbg *= dVgsteff_dVg; - Gbb *= dVbseff_dVb; /* bug fixing */ + Gbb += Gbg * dVgsteff_dVb; + Gbg *= dVgsteff_dVg; + Gbb *= dVbseff_dVb; /* bug fixing */ } - + cdrain = Ids; here->BSIM3v32gds = Gds; here->BSIM3v32gm = Gm; here->BSIM3v32gmbs = Gmb; - + here->BSIM3v32gbbs = Gbb; here->BSIM3v32gbgs = Gbg; here->BSIM3v32gbds = Gbd; here->BSIM3v32csub = Isub; - /* BSIM3v32 thermal noise Qinv calculated from all capMod + /* BSIM3v32 thermal noise Qinv calculated from all capMod * 0, 1, 2 & 3 stored in here->BSIM3v32qinv 1/1998 */ if ((model->BSIM3v32xpart < 0) || (!ChargeComputationNeeded)) - { qgate = qdrn = qsrc = qbulk = 0.0; + { qgate = qdrn = qsrc = qbulk = 0.0; here->BSIM3v32cggb = here->BSIM3v32cgsb = here->BSIM3v32cgdb = 0.0; here->BSIM3v32cdgb = here->BSIM3v32cdsb = here->BSIM3v32cddb = 0.0; here->BSIM3v32cbgb = here->BSIM3v32cbsb = here->BSIM3v32cbdb = 0.0; - here->BSIM3v32cqdb = here->BSIM3v32cqsb = here->BSIM3v32cqgb + here->BSIM3v32cqdb = here->BSIM3v32cqsb = here->BSIM3v32cqgb = here->BSIM3v32cqbb = 0.0; here->BSIM3v32gtau = 0.0; goto finished; } - else if (model->BSIM3v32capMod == 0) - { + else if (model->BSIM3v32capMod == 0) + { if (Vbseff < 0.0) - { Vbseff = Vbs; + { Vbseff = Vbs; dVbseff_dVb = 1.0; } - else - { Vbseff = pParam->BSIM3v32phi - Phis; + else + { Vbseff = pParam->BSIM3v32phi - Phis; dVbseff_dVb = -dPhis_dVb; } Vfb = pParam->BSIM3v32vfbcv; - Vth = Vfb + pParam->BSIM3v32phi + pParam->BSIM3v32k1ox * sqrtPhis; + Vth = Vfb + pParam->BSIM3v32phi + pParam->BSIM3v32k1ox * sqrtPhis; Vgst = Vgs_eff - Vth; - dVth_dVb = pParam->BSIM3v32k1ox * dsqrtPhis_dVb; + dVth_dVb = pParam->BSIM3v32k1ox * dsqrtPhis_dVb; dVgst_dVb = -dVth_dVb; - dVgst_dVg = dVgs_eff_dVg; + dVgst_dVg = dVgs_eff_dVg; CoxWL = model->BSIM3v32cox * pParam->BSIM3v32weffCV * pParam->BSIM3v32leffCV; Arg1 = Vgs_eff - Vbseff - Vfb; if (Arg1 <= 0.0) - { qgate = CoxWL * Arg1; + { qgate = CoxWL * Arg1; qbulk = -qgate; qdrn = 0.0; @@ -1331,18 +1331,18 @@ for (; model != NULL; model = model->BSIM3v32nextModel) here->BSIM3v32cbsb = -here->BSIM3v32cgsb; here->BSIM3v32qinv = 0.0; } - else if (Vgst <= 0.0) - { T1 = 0.5 * pParam->BSIM3v32k1ox; - T2 = sqrt(T1 * T1 + Arg1); - qgate = CoxWL * pParam->BSIM3v32k1ox * (T2 - T1); + else if (Vgst <= 0.0) + { T1 = 0.5 * pParam->BSIM3v32k1ox; + T2 = sqrt(T1 * T1 + Arg1); + qgate = CoxWL * pParam->BSIM3v32k1ox * (T2 - T1); qbulk = -qgate; qdrn = 0.0; - T0 = CoxWL * T1 / T2; - here->BSIM3v32cggb = T0 * dVgs_eff_dVg; - here->BSIM3v32cgdb = 0.0; + T0 = CoxWL * T1 / T2; + here->BSIM3v32cggb = T0 * dVgs_eff_dVg; + here->BSIM3v32cgdb = 0.0; here->BSIM3v32cgsb = T0 * (dVbseff_dVb - dVgs_eff_dVg); - + here->BSIM3v32cdgb = 0.0; here->BSIM3v32cddb = 0.0; here->BSIM3v32cdsb = 0.0; @@ -1352,63 +1352,63 @@ for (; model != NULL; model = model->BSIM3v32nextModel) here->BSIM3v32cbsb = -here->BSIM3v32cgsb; here->BSIM3v32qinv = 0.0; } - else - { One_Third_CoxWL = CoxWL / 3.0; + else + { One_Third_CoxWL = CoxWL / 3.0; Two_Third_CoxWL = 2.0 * One_Third_CoxWL; AbulkCV = Abulk0 * pParam->BSIM3v32abulkCVfactor; dAbulkCV_dVb = pParam->BSIM3v32abulkCVfactor * dAbulk0_dVb; - Vdsat = Vgst / AbulkCV; - dVdsat_dVg = dVgs_eff_dVg / AbulkCV; - dVdsat_dVb = - (Vdsat * dAbulkCV_dVb + dVth_dVb)/ AbulkCV; + Vdsat = Vgst / AbulkCV; + dVdsat_dVg = dVgs_eff_dVg / AbulkCV; + dVdsat_dVb = - (Vdsat * dAbulkCV_dVb + dVth_dVb)/ AbulkCV; if (model->BSIM3v32xpart > 0.5) - { /* 0/100 Charge partition model */ - if (Vdsat <= Vds) - { /* saturation region */ - T1 = Vdsat / 3.0; - qgate = CoxWL * (Vgs_eff - Vfb - - pParam->BSIM3v32phi - T1); - T2 = -Two_Third_CoxWL * Vgst; - qbulk = -(qgate + T2); - qdrn = 0.0; + { /* 0/100 Charge partition model */ + if (Vdsat <= Vds) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v32phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.0; - here->BSIM3v32cggb = One_Third_CoxWL * (3.0 - - dVdsat_dVg) * dVgs_eff_dVg; - T2 = -One_Third_CoxWL * dVdsat_dVb; - here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T2); + here->BSIM3v32cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T2); here->BSIM3v32cgdb = 0.0; - + here->BSIM3v32cdgb = 0.0; here->BSIM3v32cddb = 0.0; here->BSIM3v32cdsb = 0.0; - here->BSIM3v32cbgb = -(here->BSIM3v32cggb - - Two_Third_CoxWL * dVgs_eff_dVg); - T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); - here->BSIM3v32cbsb = -(here->BSIM3v32cbgb + T3); + here->BSIM3v32cbgb = -(here->BSIM3v32cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM3v32cbsb = -(here->BSIM3v32cbgb + T3); here->BSIM3v32cbdb = 0.0; here->BSIM3v32qinv = -(qgate + qbulk); - } - else - { /* linear region */ - Alphaz = Vgst / Vdsat; - T1 = 2.0 * Vdsat - Vds; - T2 = Vds / (3.0 * T1); - T3 = T2 * Vds; - T9 = 0.25 * CoxWL; - T4 = T9 * Alphaz; - T7 = 2.0 * Vds - T1 - 3.0 * T3; - T8 = T3 - T1 - 2.0 * Vds; - qgate = CoxWL * (Vgs_eff - Vfb - - pParam->BSIM3v32phi - 0.5 * (Vds - T3)); - T10 = T4 * T8; - qdrn = T4 * T7; - qbulk = -(qgate + qdrn + T10); - + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + T7 = 2.0 * Vds - T1 - 3.0 * T3; + T8 = T3 - T1 - 2.0 * Vds; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v32phi - 0.5 * (Vds - T3)); + T10 = T4 * T8; + qdrn = T4 * T7; + qbulk = -(qgate + qdrn + T10); + T5 = T3 / T1; here->BSIM3v32cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) - * dVgs_eff_dVg; + * dVgs_eff_dVg; T11 = -CoxWL * T5 * dVdsat_dVb; here->BSIM3v32cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T11 @@ -1420,7 +1420,7 @@ for (; model != NULL; model = model->BSIM3v32nextModel) T8 = T9 * T8; T9 = 2.0 * T4 * (1.0 - 3.0 * T5); here->BSIM3v32cdgb = (T7 * dAlphaz_dVg - T9 - * dVdsat_dVg) * dVgs_eff_dVg; + * dVdsat_dVg) * dVgs_eff_dVg; T12 = T7 * dAlphaz_dVb - T9 * dVdsat_dVb; here->BSIM3v32cddb = T4 * (3.0 - 6.0 * T2 - 3.0 * T5); here->BSIM3v32cdsb = -(here->BSIM3v32cdgb + T12 @@ -1428,200 +1428,200 @@ for (; model != NULL; model = model->BSIM3v32nextModel) T9 = 2.0 * T4 * (1.0 + T5); T10 = (T8 * dAlphaz_dVg - T9 * dVdsat_dVg) - * dVgs_eff_dVg; + * dVgs_eff_dVg; T11 = T8 * dAlphaz_dVb - T9 * dVdsat_dVb; - T12 = T4 * (2.0 * T2 + T5 - 1.0); + T12 = T4 * (2.0 * T2 + T5 - 1.0); T0 = -(T10 + T11 + T12); here->BSIM3v32cbgb = -(here->BSIM3v32cggb - + here->BSIM3v32cdgb + T10); - here->BSIM3v32cbdb = -(here->BSIM3v32cgdb - + here->BSIM3v32cddb + T12); + + here->BSIM3v32cdgb + T10); + here->BSIM3v32cbdb = -(here->BSIM3v32cgdb + + here->BSIM3v32cddb + T12); here->BSIM3v32cbsb = -(here->BSIM3v32cgsb - + here->BSIM3v32cdsb + T0); + + here->BSIM3v32cdsb + T0); here->BSIM3v32qinv = -(qgate + qbulk); } } - else if (model->BSIM3v32xpart < 0.5) - { /* 40/60 Charge partition model */ - if (Vds >= Vdsat) - { /* saturation region */ - T1 = Vdsat / 3.0; - qgate = CoxWL * (Vgs_eff - Vfb - - pParam->BSIM3v32phi - T1); - T2 = -Two_Third_CoxWL * Vgst; - qbulk = -(qgate + T2); - qdrn = 0.4 * T2; + else if (model->BSIM3v32xpart < 0.5) + { /* 40/60 Charge partition model */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v32phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.4 * T2; - here->BSIM3v32cggb = One_Third_CoxWL * (3.0 - - dVdsat_dVg) * dVgs_eff_dVg; - T2 = -One_Third_CoxWL * dVdsat_dVb; - here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T2); - here->BSIM3v32cgdb = 0.0; - - T3 = 0.4 * Two_Third_CoxWL; + here->BSIM3v32cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T2); + here->BSIM3v32cgdb = 0.0; + + T3 = 0.4 * Two_Third_CoxWL; here->BSIM3v32cdgb = -T3 * dVgs_eff_dVg; here->BSIM3v32cddb = 0.0; - T4 = T3 * dVth_dVb; + T4 = T3 * dVth_dVb; here->BSIM3v32cdsb = -(T4 + here->BSIM3v32cdgb); - here->BSIM3v32cbgb = -(here->BSIM3v32cggb - - Two_Third_CoxWL * dVgs_eff_dVg); - T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); - here->BSIM3v32cbsb = -(here->BSIM3v32cbgb + T3); + here->BSIM3v32cbgb = -(here->BSIM3v32cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM3v32cbsb = -(here->BSIM3v32cbgb + T3); here->BSIM3v32cbdb = 0.0; here->BSIM3v32qinv = -(qgate + qbulk); - } - else - { /* linear region */ - Alphaz = Vgst / Vdsat; - T1 = 2.0 * Vdsat - Vds; - T2 = Vds / (3.0 * T1); - T3 = T2 * Vds; - T9 = 0.25 * CoxWL; - T4 = T9 * Alphaz; - qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM3v32phi - - 0.5 * (Vds - T3)); + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM3v32phi + - 0.5 * (Vds - T3)); - T5 = T3 / T1; + T5 = T3 / T1; here->BSIM3v32cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) - * dVgs_eff_dVg; + * dVgs_eff_dVg; tmp = -CoxWL * T5 * dVdsat_dVb; here->BSIM3v32cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); - here->BSIM3v32cgsb = -(here->BSIM3v32cggb - + here->BSIM3v32cgdb + tmp); + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + + here->BSIM3v32cgdb + tmp); - T6 = 1.0 / Vdsat; + T6 = 1.0 / Vdsat; dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); - T6 = 8.0 * Vdsat * Vdsat - 6.0 * Vdsat * Vds - + 1.2 * Vds * Vds; - T8 = T2 / T1; - T7 = Vds - T1 - T8 * T6; - qdrn = T4 * T7; - T7 *= T9; - tmp = T8 / T1; - tmp1 = T4 * (2.0 - 4.0 * tmp * T6 - + T8 * (16.0 * Vdsat - 6.0 * Vds)); + T6 = 8.0 * Vdsat * Vdsat - 6.0 * Vdsat * Vds + + 1.2 * Vds * Vds; + T8 = T2 / T1; + T7 = Vds - T1 - T8 * T6; + qdrn = T4 * T7; + T7 *= T9; + tmp = T8 / T1; + tmp1 = T4 * (2.0 - 4.0 * tmp * T6 + + T8 * (16.0 * Vdsat - 6.0 * Vds)); here->BSIM3v32cdgb = (T7 * dAlphaz_dVg - tmp1 - * dVdsat_dVg) * dVgs_eff_dVg; + * dVdsat_dVg) * dVgs_eff_dVg; T10 = T7 * dAlphaz_dVb - tmp1 * dVdsat_dVb; here->BSIM3v32cddb = T4 * (2.0 - (1.0 / (3.0 * T1 - * T1) + 2.0 * tmp) * T6 + T8 - * (6.0 * Vdsat - 2.4 * Vds)); - here->BSIM3v32cdsb = -(here->BSIM3v32cdgb - + T10 + here->BSIM3v32cddb); + * T1) + 2.0 * tmp) * T6 + T8 + * (6.0 * Vdsat - 2.4 * Vds)); + here->BSIM3v32cdsb = -(here->BSIM3v32cdgb + + T10 + here->BSIM3v32cddb); - T7 = 2.0 * (T1 + T3); - qbulk = -(qgate - T4 * T7); - T7 *= T9; - T0 = 4.0 * T4 * (1.0 - T5); - T12 = (-T7 * dAlphaz_dVg - here->BSIM3v32cdgb - - T0 * dVdsat_dVg) * dVgs_eff_dVg; - T11 = -T7 * dAlphaz_dVb - T10 - T0 * dVdsat_dVb; - T10 = -4.0 * T4 * (T2 - 0.5 + 0.5 * T5) - - here->BSIM3v32cddb; + T7 = 2.0 * (T1 + T3); + qbulk = -(qgate - T4 * T7); + T7 *= T9; + T0 = 4.0 * T4 * (1.0 - T5); + T12 = (-T7 * dAlphaz_dVg - here->BSIM3v32cdgb + - T0 * dVdsat_dVg) * dVgs_eff_dVg; + T11 = -T7 * dAlphaz_dVb - T10 - T0 * dVdsat_dVb; + T10 = -4.0 * T4 * (T2 - 0.5 + 0.5 * T5) + - here->BSIM3v32cddb; tmp = -(T10 + T11 + T12); - here->BSIM3v32cbgb = -(here->BSIM3v32cggb - + here->BSIM3v32cdgb + T12); + here->BSIM3v32cbgb = -(here->BSIM3v32cggb + + here->BSIM3v32cdgb + T12); here->BSIM3v32cbdb = -(here->BSIM3v32cgdb - + here->BSIM3v32cddb + T10); /* bug fix */ + + here->BSIM3v32cddb + T10); /* bug fix */ here->BSIM3v32cbsb = -(here->BSIM3v32cgsb - + here->BSIM3v32cdsb + tmp); + + here->BSIM3v32cdsb + tmp); here->BSIM3v32qinv = -(qgate + qbulk); } } - else - { /* 50/50 partitioning */ - if (Vds >= Vdsat) - { /* saturation region */ - T1 = Vdsat / 3.0; - qgate = CoxWL * (Vgs_eff - Vfb - - pParam->BSIM3v32phi - T1); - T2 = -Two_Third_CoxWL * Vgst; - qbulk = -(qgate + T2); - qdrn = 0.5 * T2; + else + { /* 50/50 partitioning */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v32phi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.5 * T2; + + here->BSIM3v32cggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T2); + here->BSIM3v32cgdb = 0.0; - here->BSIM3v32cggb = One_Third_CoxWL * (3.0 - - dVdsat_dVg) * dVgs_eff_dVg; - T2 = -One_Third_CoxWL * dVdsat_dVb; - here->BSIM3v32cgsb = -(here->BSIM3v32cggb + T2); - here->BSIM3v32cgdb = 0.0; - here->BSIM3v32cdgb = -One_Third_CoxWL * dVgs_eff_dVg; here->BSIM3v32cddb = 0.0; - T4 = One_Third_CoxWL * dVth_dVb; + T4 = One_Third_CoxWL * dVth_dVb; here->BSIM3v32cdsb = -(T4 + here->BSIM3v32cdgb); - here->BSIM3v32cbgb = -(here->BSIM3v32cggb - - Two_Third_CoxWL * dVgs_eff_dVg); - T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); - here->BSIM3v32cbsb = -(here->BSIM3v32cbgb + T3); + here->BSIM3v32cbgb = -(here->BSIM3v32cggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM3v32cbsb = -(here->BSIM3v32cbgb + T3); here->BSIM3v32cbdb = 0.0; here->BSIM3v32qinv = -(qgate + qbulk); - } - else - { /* linear region */ - Alphaz = Vgst / Vdsat; - T1 = 2.0 * Vdsat - Vds; - T2 = Vds / (3.0 * T1); - T3 = T2 * Vds; - T9 = 0.25 * CoxWL; - T4 = T9 * Alphaz; - qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM3v32phi - - 0.5 * (Vds - T3)); + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM3v32phi + - 0.5 * (Vds - T3)); - T5 = T3 / T1; + T5 = T3 / T1; here->BSIM3v32cggb = CoxWL * (1.0 - T5 * dVdsat_dVg) - * dVgs_eff_dVg; + * dVgs_eff_dVg; tmp = -CoxWL * T5 * dVdsat_dVb; here->BSIM3v32cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); - here->BSIM3v32cgsb = -(here->BSIM3v32cggb - + here->BSIM3v32cgdb + tmp); + here->BSIM3v32cgsb = -(here->BSIM3v32cggb + + here->BSIM3v32cgdb + tmp); - T6 = 1.0 / Vdsat; + T6 = 1.0 / Vdsat; dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); - T7 = T1 + T3; - qdrn = -T4 * T7; - qbulk = - (qgate + qdrn + qdrn); - T7 *= T9; - T0 = T4 * (2.0 * T5 - 2.0); + T7 = T1 + T3; + qdrn = -T4 * T7; + qbulk = - (qgate + qdrn + qdrn); + T7 *= T9; + T0 = T4 * (2.0 * T5 - 2.0); here->BSIM3v32cdgb = (T0 * dVdsat_dVg - T7 - * dAlphaz_dVg) * dVgs_eff_dVg; - T12 = T0 * dVdsat_dVb - T7 * dAlphaz_dVb; + * dAlphaz_dVg) * dVgs_eff_dVg; + T12 = T0 * dVdsat_dVb - T7 * dAlphaz_dVb; here->BSIM3v32cddb = T4 * (1.0 - 2.0 * T2 - T5); here->BSIM3v32cdsb = -(here->BSIM3v32cdgb + T12 + here->BSIM3v32cddb); here->BSIM3v32cbgb = -(here->BSIM3v32cggb - + 2.0 * here->BSIM3v32cdgb); + + 2.0 * here->BSIM3v32cdgb); here->BSIM3v32cbdb = -(here->BSIM3v32cgdb - + 2.0 * here->BSIM3v32cddb); + + 2.0 * here->BSIM3v32cddb); here->BSIM3v32cbsb = -(here->BSIM3v32cgsb - + 2.0 * here->BSIM3v32cdsb); + + 2.0 * here->BSIM3v32cdsb); here->BSIM3v32qinv = -(qgate + qbulk); } - } - } - } - else - { if (Vbseff < 0.0) - { VbseffCV = Vbseff; + } + } + } + else + { if (Vbseff < 0.0) + { VbseffCV = Vbseff; dVbseffCV_dVb = 1.0; } - else - { VbseffCV = pParam->BSIM3v32phi - Phis; + else + { VbseffCV = pParam->BSIM3v32phi - Phis; dVbseffCV_dVb = -dPhis_dVb; } CoxWL = model->BSIM3v32cox * pParam->BSIM3v32weffCV - * pParam->BSIM3v32leffCV; + * pParam->BSIM3v32leffCV; /* Seperate VgsteffCV with noff and voffcv */ noff = n * pParam->BSIM3v32noff; @@ -1655,123 +1655,123 @@ for (; model != NULL; model = model->BSIM3v32nextModel) dVgsteff_dVg *= dVgs_eff_dVg; } /* End of VgsteffCV */ - if (model->BSIM3v32capMod == 1) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - Vfb = here->BSIM3v32vfbzb; - break; - case BSIM3v32V32: - Vfb = here->BSIM3v32vfbzb; - dVfb_dVb = dVfb_dVd = 0.0; - break; - default: - Vfb = Vth - pParam->BSIM3v32phi - pParam->BSIM3v32k1ox * sqrtPhis; - dVfb_dVb = dVth_dVb - pParam->BSIM3v32k1ox * dsqrtPhis_dVb; - dVfb_dVd = dVth_dVd; - } + if (model->BSIM3v32capMod == 1) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Vfb = here->BSIM3v32vfbzb; + break; + case BSIM3v32V32: + Vfb = here->BSIM3v32vfbzb; + dVfb_dVb = dVfb_dVd = 0.0; + break; + default: + Vfb = Vth - pParam->BSIM3v32phi - pParam->BSIM3v32k1ox * sqrtPhis; + dVfb_dVb = dVth_dVb - pParam->BSIM3v32k1ox * dsqrtPhis_dVb; + dVfb_dVd = dVth_dVd; + } Arg1 = Vgs_eff - VbseffCV - Vfb - Vgsteff; if (Arg1 <= 0.0) - { qgate = CoxWL * Arg1; + { qgate = CoxWL * Arg1; Cgg = CoxWL * (dVgs_eff_dVg - dVgsteff_dVg); - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - Cgd = -CoxWL * dVgsteff_dVd; - Cgb = -CoxWL * (dVbseffCV_dVb + dVgsteff_dVb); - break; - case BSIM3v32V32: - default: - Cgd = -CoxWL * (dVfb_dVd + dVgsteff_dVd); - Cgb = -CoxWL * (dVfb_dVb + dVbseffCV_dVb + dVgsteff_dVb); - } + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Cgd = -CoxWL * dVgsteff_dVd; + Cgb = -CoxWL * (dVbseffCV_dVb + dVgsteff_dVb); + break; + case BSIM3v32V32: + default: + Cgd = -CoxWL * (dVfb_dVd + dVgsteff_dVd); + Cgb = -CoxWL * (dVfb_dVb + dVbseffCV_dVb + dVgsteff_dVb); + } } - else - { T0 = 0.5 * pParam->BSIM3v32k1ox; - T1 = sqrt(T0 * T0 + Arg1); + else + { T0 = 0.5 * pParam->BSIM3v32k1ox; + T1 = sqrt(T0 * T0 + Arg1); T2 = CoxWL * T0 / T1; - + qgate = CoxWL * pParam->BSIM3v32k1ox * (T1 - T0); Cgg = T2 * (dVgs_eff_dVg - dVgsteff_dVg); - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - Cgd = -T2 * dVgsteff_dVd; - Cgb = -T2 * (dVbseffCV_dVb + dVgsteff_dVb); - break; - case BSIM3v32V32: - default: - Cgd = -T2 * (dVfb_dVd + dVgsteff_dVd); - Cgb = -T2 * (dVfb_dVb + dVbseffCV_dVb + dVgsteff_dVb); - } + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Cgd = -T2 * dVgsteff_dVd; + Cgb = -T2 * (dVbseffCV_dVb + dVgsteff_dVb); + break; + case BSIM3v32V32: + default: + Cgd = -T2 * (dVfb_dVd + dVgsteff_dVd); + Cgb = -T2 * (dVfb_dVb + dVbseffCV_dVb + dVgsteff_dVb); + } } - qbulk = -qgate; - Cbg = -Cgg; - Cbd = -Cgd; - Cbb = -Cgb; + qbulk = -qgate; + Cbg = -Cgg; + Cbd = -Cgd; + Cbb = -Cgb; One_Third_CoxWL = CoxWL / 3.0; Two_Third_CoxWL = 2.0 * One_Third_CoxWL; AbulkCV = Abulk0 * pParam->BSIM3v32abulkCVfactor; dAbulkCV_dVb = pParam->BSIM3v32abulkCVfactor * dAbulk0_dVb; - VdsatCV = Vgsteff / AbulkCV; + VdsatCV = Vgsteff / AbulkCV; if (VdsatCV < Vds) - { dVdsatCV_dVg = 1.0 / AbulkCV; - dVdsatCV_dVb = -VdsatCV * dAbulkCV_dVb / AbulkCV; - T0 = Vgsteff - VdsatCV / 3.0; + { dVdsatCV_dVg = 1.0 / AbulkCV; + dVdsatCV_dVb = -VdsatCV * dAbulkCV_dVb / AbulkCV; + T0 = Vgsteff - VdsatCV / 3.0; dT0_dVg = 1.0 - dVdsatCV_dVg / 3.0; dT0_dVb = -dVdsatCV_dVb / 3.0; qgate += CoxWL * T0; - Cgg1 = CoxWL * dT0_dVg; + Cgg1 = CoxWL * dT0_dVg; Cgb1 = CoxWL * dT0_dVb + Cgg1 * dVgsteff_dVb; Cgd1 = Cgg1 * dVgsteff_dVd; - Cgg1 *= dVgsteff_dVg; - Cgg += Cgg1; - Cgb += Cgb1; - Cgd += Cgd1; + Cgg1 *= dVgsteff_dVg; + Cgg += Cgg1; + Cgb += Cgb1; + Cgd += Cgd1; - T0 = VdsatCV - Vgsteff; - dT0_dVg = dVdsatCV_dVg - 1.0; - dT0_dVb = dVdsatCV_dVb; + T0 = VdsatCV - Vgsteff; + dT0_dVg = dVdsatCV_dVg - 1.0; + dT0_dVb = dVdsatCV_dVb; qbulk += One_Third_CoxWL * T0; Cbg1 = One_Third_CoxWL * dT0_dVg; - Cbb1 = One_Third_CoxWL * dT0_dVb + Cbg1 * dVgsteff_dVb; - Cbd1 = Cbg1 * dVgsteff_dVd; - Cbg1 *= dVgsteff_dVg; - Cbg += Cbg1; - Cbb += Cbb1; + Cbb1 = One_Third_CoxWL * dT0_dVb + Cbg1 * dVgsteff_dVb; + Cbd1 = Cbg1 * dVgsteff_dVd; + Cbg1 *= dVgsteff_dVg; + Cbg += Cbg1; + Cbb += Cbb1; Cbd += Cbd1; if (model->BSIM3v32xpart > 0.5) - T0 = -Two_Third_CoxWL; + T0 = -Two_Third_CoxWL; else if (model->BSIM3v32xpart < 0.5) - T0 = -0.4 * CoxWL; + T0 = -0.4 * CoxWL; else - T0 = -One_Third_CoxWL; + T0 = -One_Third_CoxWL; qsrc = T0 * Vgsteff; Csg = T0 * dVgsteff_dVg; Csb = T0 * dVgsteff_dVb; Csd = T0 * dVgsteff_dVd; - Cgb *= dVbseff_dVb; - Cbb *= dVbseff_dVb; - Csb *= dVbseff_dVb; + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; } - else - { T0 = AbulkCV * Vds; + else + { T0 = AbulkCV * Vds; T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1.e-20); - T2 = Vds / T1; - T3 = T0 * T2; + T2 = Vds / T1; + T3 = T0 * T2; dT3_dVg = -12.0 * T2 * T2 * AbulkCV; dT3_dVd = 6.0 * T0 * (4.0 * Vgsteff - T0) / T1 / T1 - 0.5; dT3_dVb = 12.0 * T2 * T2 * dAbulkCV_dVb * Vgsteff; @@ -1780,229 +1780,229 @@ for (; model != NULL; model = model->BSIM3v32nextModel) Cgg1 = CoxWL * (1.0 + dT3_dVg); Cgb1 = CoxWL * dT3_dVb + Cgg1 * dVgsteff_dVb; Cgd1 = CoxWL * dT3_dVd + Cgg1 * dVgsteff_dVd; - Cgg1 *= dVgsteff_dVg; - Cgg += Cgg1; - Cgb += Cgb1; - Cgd += Cgd1; + Cgg1 *= dVgsteff_dVg; + Cgg += Cgg1; + Cgb += Cgb1; + Cgd += Cgd1; qbulk += CoxWL * (1.0 - AbulkCV) * (0.5 * Vds - T3); - Cbg1 = -CoxWL * ((1.0 - AbulkCV) * dT3_dVg); - Cbb1 = -CoxWL * ((1.0 - AbulkCV) * dT3_dVb - + (0.5 * Vds - T3) * dAbulkCV_dVb) - + Cbg1 * dVgsteff_dVb; - Cbd1 = -CoxWL * (1.0 - AbulkCV) * dT3_dVd - + Cbg1 * dVgsteff_dVd; - Cbg1 *= dVgsteff_dVg; - Cbg += Cbg1; - Cbb += Cbb1; - Cbd += Cbd1; + Cbg1 = -CoxWL * ((1.0 - AbulkCV) * dT3_dVg); + Cbb1 = -CoxWL * ((1.0 - AbulkCV) * dT3_dVb + + (0.5 * Vds - T3) * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb; + Cbd1 = -CoxWL * (1.0 - AbulkCV) * dT3_dVd + + Cbg1 * dVgsteff_dVd; + Cbg1 *= dVgsteff_dVg; + Cbg += Cbg1; + Cbb += Cbb1; + Cbd += Cbd1; if (model->BSIM3v32xpart > 0.5) - { /* 0/100 Charge petition model */ - T1 = T1 + T1; + { /* 0/100 Charge petition model */ + T1 = T1 + T1; qsrc = -CoxWL * (0.5 * Vgsteff + 0.25 * T0 - - T0 * T0 / T1); - Csg = -CoxWL * (0.5 + 24.0 * T0 * Vds / T1 / T1 - * AbulkCV); + - T0 * T0 / T1); + Csg = -CoxWL * (0.5 + 24.0 * T0 * Vds / T1 / T1 + * AbulkCV); Csb = -CoxWL * (0.25 * Vds * dAbulkCV_dVb - - 12.0 * T0 * Vds / T1 / T1 * (4.0 * Vgsteff - T0) - * dAbulkCV_dVb) + Csg * dVgsteff_dVb; - Csd = -CoxWL * (0.25 * AbulkCV - 12.0 * AbulkCV * T0 - / T1 / T1 * (4.0 * Vgsteff - T0)) - + Csg * dVgsteff_dVd; - Csg *= dVgsteff_dVg; + - 12.0 * T0 * Vds / T1 / T1 * (4.0 * Vgsteff - T0) + * dAbulkCV_dVb) + Csg * dVgsteff_dVb; + Csd = -CoxWL * (0.25 * AbulkCV - 12.0 * AbulkCV * T0 + / T1 / T1 * (4.0 * Vgsteff - T0)) + + Csg * dVgsteff_dVd; + Csg *= dVgsteff_dVg; } - else if (model->BSIM3v32xpart < 0.5) - { /* 40/60 Charge petition model */ - T1 = T1 / 12.0; - T2 = 0.5 * CoxWL / (T1 * T1); - T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff - * (Vgsteff - 4.0 * T0 / 3.0)) - - 2.0 * T0 * T0 * T0 / 15.0; - qsrc = -T2 * T3; - T4 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) - + 0.4 * T0 * T0; - Csg = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 - * Vgsteff - 8.0 * T0 / 3.0) - + 2.0 * T0 * T0 / 3.0); - Csb = (qsrc / T1 * Vds + T2 * T4 * Vds) * dAbulkCV_dVb - + Csg * dVgsteff_dVb; - Csd = (qsrc / T1 + T2 * T4) * AbulkCV - + Csg * dVgsteff_dVd; - Csg *= dVgsteff_dVg; + else if (model->BSIM3v32xpart < 0.5) + { /* 40/60 Charge petition model */ + T1 = T1 / 12.0; + T2 = 0.5 * CoxWL / (T1 * T1); + T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff + * (Vgsteff - 4.0 * T0 / 3.0)) + - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T2 * T3; + T4 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) + + 0.4 * T0 * T0; + Csg = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 + * Vgsteff - 8.0 * T0 / 3.0) + + 2.0 * T0 * T0 / 3.0); + Csb = (qsrc / T1 * Vds + T2 * T4 * Vds) * dAbulkCV_dVb + + Csg * dVgsteff_dVb; + Csd = (qsrc / T1 + T2 * T4) * AbulkCV + + Csg * dVgsteff_dVd; + Csg *= dVgsteff_dVg; } - else - { /* 50/50 Charge petition model */ + else + { /* 50/50 Charge petition model */ qsrc = -0.5 * (qgate + qbulk); Csg = -0.5 * (Cgg1 + Cbg1); - Csb = -0.5 * (Cgb1 + Cbb1); - Csd = -0.5 * (Cgd1 + Cbd1); + Csb = -0.5 * (Cgb1 + Cbb1); + Csd = -0.5 * (Cgd1 + Cbd1); } - Cgb *= dVbseff_dVb; - Cbb *= dVbseff_dVb; - Csb *= dVbseff_dVb; + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; } qdrn = -(qgate + qbulk + qsrc); here->BSIM3v32cggb = Cgg; - here->BSIM3v32cgsb = -(Cgg + Cgd + Cgb); - here->BSIM3v32cgdb = Cgd; + here->BSIM3v32cgsb = -(Cgg + Cgd + Cgb); + here->BSIM3v32cgdb = Cgd; here->BSIM3v32cdgb = -(Cgg + Cbg + Csg); - here->BSIM3v32cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb - + Csg + Csd + Csb); - here->BSIM3v32cddb = -(Cgd + Cbd + Csd); + here->BSIM3v32cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM3v32cddb = -(Cgd + Cbd + Csd); here->BSIM3v32cbgb = Cbg; - here->BSIM3v32cbsb = -(Cbg + Cbd + Cbb); - here->BSIM3v32cbdb = Cbd; + here->BSIM3v32cbsb = -(Cbg + Cbd + Cbb); + here->BSIM3v32cbdb = Cbd; here->BSIM3v32qinv = -(qgate + qbulk); - } + } - else if (model->BSIM3v32capMod == 2) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - Vfb = here->BSIM3v32vfbzb; - break; - case BSIM3v32V32: - Vfb = here->BSIM3v32vfbzb; - dVfb_dVb = dVfb_dVd = 0.0; - break; - default: /* old code prior to v3.2 */ - Vfb = Vth - pParam->BSIM3v32phi - pParam->BSIM3v32k1ox * sqrtPhis; - dVfb_dVb = dVth_dVb - pParam->BSIM3v32k1ox * dsqrtPhis_dVb; - dVfb_dVd = dVth_dVd; - } + else if (model->BSIM3v32capMod == 2) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Vfb = here->BSIM3v32vfbzb; + break; + case BSIM3v32V32: + Vfb = here->BSIM3v32vfbzb; + dVfb_dVb = dVfb_dVd = 0.0; + break; + default: /* old code prior to v3.2 */ + Vfb = Vth - pParam->BSIM3v32phi - pParam->BSIM3v32k1ox * sqrtPhis; + dVfb_dVb = dVth_dVb - pParam->BSIM3v32k1ox * dsqrtPhis_dVb; + dVfb_dVd = dVth_dVd; + } V3 = Vfb - Vgs_eff + VbseffCV - DELTA_3; - if (Vfb <= 0.0) - { T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * Vfb); - T2 = -DELTA_3 / T0; - } - else - { T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * Vfb); - T2 = DELTA_3 / T0; - } + if (Vfb <= 0.0) + { T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * Vfb); + T2 = -DELTA_3 / T0; + } + else + { T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * Vfb); + T2 = DELTA_3 / T0; + } - T1 = 0.5 * (1.0 + V3 / T0); - Vfbeff = Vfb - 0.5 * (V3 + T0); - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - /* Do nothing */ - break; - case BSIM3v32V32: - default: - dVfbeff_dVd = (1.0 - T1 - T2) * dVfb_dVd; - } - dVfbeff_dVg = T1 * dVgs_eff_dVg; - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - dVfbeff_dVb = -T1 * dVbseffCV_dVb; - break; - case BSIM3v32V32: - default: - dVfbeff_dVb = (1.0 - T1 - T2) * dVfb_dVb - T1 * dVbseffCV_dVb; - } - Qac0 = CoxWL * (Vfbeff - Vfb); - dQac0_dVg = CoxWL * dVfbeff_dVg; - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - /* Do nothing */ - break; - case BSIM3v32V32: - default: - dQac0_dVd = CoxWL * (dVfbeff_dVd - dVfb_dVd); - } - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - dQac0_dVb = CoxWL * dVfbeff_dVb; - break; - case BSIM3v32V32: - default: - dQac0_dVb = CoxWL * (dVfbeff_dVb - dVfb_dVb); - } + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = Vfb - 0.5 * (V3 + T0); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + /* Do nothing */ + break; + case BSIM3v32V32: + default: + dVfbeff_dVd = (1.0 - T1 - T2) * dVfb_dVd; + } + dVfbeff_dVg = T1 * dVgs_eff_dVg; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + dVfbeff_dVb = -T1 * dVbseffCV_dVb; + break; + case BSIM3v32V32: + default: + dVfbeff_dVb = (1.0 - T1 - T2) * dVfb_dVb - T1 * dVbseffCV_dVb; + } + Qac0 = CoxWL * (Vfbeff - Vfb); + dQac0_dVg = CoxWL * dVfbeff_dVg; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + /* Do nothing */ + break; + case BSIM3v32V32: + default: + dQac0_dVd = CoxWL * (dVfbeff_dVd - dVfb_dVd); + } + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + dQac0_dVb = CoxWL * dVfbeff_dVb; + break; + case BSIM3v32V32: + default: + dQac0_dVb = CoxWL * (dVfbeff_dVb - dVfb_dVb); + } T0 = 0.5 * pParam->BSIM3v32k1ox; - T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; + T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; if (pParam->BSIM3v32k1ox == 0.0) { T1 = 0.0; T2 = 0.0; } - else if (T3 < 0.0) - { T1 = T0 + T3 / pParam->BSIM3v32k1ox; + else if (T3 < 0.0) + { T1 = T0 + T3 / pParam->BSIM3v32k1ox; T2 = CoxWL; - } - else - { T1 = sqrt(T0 * T0 + T3); + } + else + { T1 = sqrt(T0 * T0 + T3); T2 = CoxWL * T0 / T1; - } + } - Qsub0 = CoxWL * pParam->BSIM3v32k1ox * (T1 - T0); + Qsub0 = CoxWL * pParam->BSIM3v32k1ox * (T1 - T0); dQsub0_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg - dVgsteff_dVg); - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - dQsub0_dVd = -T2 * dVgsteff_dVd; - break; - case BSIM3v32V32: - default: - dQsub0_dVd = -T2 * (dVfbeff_dVd + dVgsteff_dVd); - } - dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + dQsub0_dVd = -T2 * dVgsteff_dVd; + break; + case BSIM3v32V32: + default: + dQsub0_dVd = -T2 * (dVfbeff_dVd + dVgsteff_dVd); + } + dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + dVgsteff_dVb); AbulkCV = Abulk0 * pParam->BSIM3v32abulkCVfactor; dAbulkCV_dVb = pParam->BSIM3v32abulkCVfactor * dAbulk0_dVb; - VdsatCV = Vgsteff / AbulkCV; + VdsatCV = Vgsteff / AbulkCV; - V4 = VdsatCV - Vds - DELTA_4; - T0 = sqrt(V4 * V4 + 4.0 * DELTA_4 * VdsatCV); - VdseffCV = VdsatCV - 0.5 * (V4 + T0); - T1 = 0.5 * (1.0 + V4 / T0); - T2 = DELTA_4 / T0; - T3 = (1.0 - T1 - T2) / AbulkCV; - dVdseffCV_dVg = T3; - dVdseffCV_dVd = T1; - dVdseffCV_dVb = -T3 * VdsatCV * dAbulkCV_dVb; - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - /* Added to eliminate non-zero VdseffCV at Vds=0.0 */ - if (Vds == 0.0) - { - VdseffCV = 0.0; - dVdseffCV_dVg = 0.0; - dVdseffCV_dVb = 0.0; - } - break; - case BSIM3v32V32: - default: - /* Do nothing */ - break; - } + V4 = VdsatCV - Vds - DELTA_4; + T0 = sqrt(V4 * V4 + 4.0 * DELTA_4 * VdsatCV); + VdseffCV = VdsatCV - 0.5 * (V4 + T0); + T1 = 0.5 * (1.0 + V4 / T0); + T2 = DELTA_4 / T0; + T3 = (1.0 - T1 - T2) / AbulkCV; + dVdseffCV_dVg = T3; + dVdseffCV_dVd = T1; + dVdseffCV_dVb = -T3 * VdsatCV * dAbulkCV_dVb; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + /* Added to eliminate non-zero VdseffCV at Vds=0.0 */ + if (Vds == 0.0) + { + VdseffCV = 0.0; + dVdseffCV_dVg = 0.0; + dVdseffCV_dVb = 0.0; + } + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } - T0 = AbulkCV * VdseffCV; + T0 = AbulkCV * VdseffCV; T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1e-20); - T2 = VdseffCV / T1; - T3 = T0 * T2; + T2 = VdseffCV / T1; + T3 = T0 * T2; T4 = (1.0 - 12.0 * T2 * T2 * AbulkCV); T5 = (6.0 * T0 * (4.0 * Vgsteff - T0) / (T1 * T1) - 0.5); @@ -2013,129 +2013,129 @@ for (; model != NULL; model = model->BSIM3v32nextModel) Cgg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); Cgd1 = CoxWL * T5 * dVdseffCV_dVd + Cgg1 * dVgsteff_dVd; Cgb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) - + Cgg1 * dVgsteff_dVb; - Cgg1 *= dVgsteff_dVg; + + Cgg1 * dVgsteff_dVb; + Cgg1 *= dVgsteff_dVg; - T7 = 1.0 - AbulkCV; + T7 = 1.0 - AbulkCV; qbulk = CoxWL * T7 * (0.5 * VdseffCV - T3); - T4 = -T7 * (T4 - 1.0); - T5 = -T7 * T5; - T6 = -(T7 * T6 + (0.5 * VdseffCV - T3)); + T4 = -T7 * (T4 - 1.0); + T5 = -T7 * T5; + T6 = -(T7 * T6 + (0.5 * VdseffCV - T3)); Cbg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); Cbd1 = CoxWL * T5 * dVdseffCV_dVd + Cbg1 * dVgsteff_dVd; Cbb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) - + Cbg1 * dVgsteff_dVb; - Cbg1 *= dVgsteff_dVg; + + Cbg1 * dVgsteff_dVb; + Cbg1 *= dVgsteff_dVg; if (model->BSIM3v32xpart > 0.5) - { /* 0/100 Charge petition model */ - T1 = T1 + T1; + { /* 0/100 Charge petition model */ + T1 = T1 + T1; qsrc = -CoxWL * (0.5 * Vgsteff + 0.25 * T0 - - T0 * T0 / T1); - T7 = (4.0 * Vgsteff - T0) / (T1 * T1); - T4 = -(0.5 + 24.0 * T0 * T0 / (T1 * T1)); - T5 = -(0.25 * AbulkCV - 12.0 * AbulkCV * T0 * T7); + - T0 * T0 / T1); + T7 = (4.0 * Vgsteff - T0) / (T1 * T1); + T4 = -(0.5 + 24.0 * T0 * T0 / (T1 * T1)); + T5 = -(0.25 * AbulkCV - 12.0 * AbulkCV * T0 * T7); T6 = -(0.25 * VdseffCV - 12.0 * T0 * VdseffCV * T7); Csg = CoxWL * (T4 + T5 * dVdseffCV_dVg); Csd = CoxWL * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; Csb = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) - + Csg * dVgsteff_dVb; - Csg *= dVgsteff_dVg; + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; } - else if (model->BSIM3v32xpart < 0.5) - { /* 40/60 Charge petition model */ - T1 = T1 / 12.0; - T2 = 0.5 * CoxWL / (T1 * T1); - T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff - * (Vgsteff - 4.0 * T0 / 3.0)) - - 2.0 * T0 * T0 * T0 / 15.0; - qsrc = -T2 * T3; - T7 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) - + 0.4 * T0 * T0; - T4 = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 - * Vgsteff - 8.0 * T0 / 3.0) - + 2.0 * T0 * T0 / 3.0); - T5 = (qsrc / T1 + T2 * T7) * AbulkCV; - T6 = (qsrc / T1 * VdseffCV + T2 * T7 * VdseffCV); + else if (model->BSIM3v32xpart < 0.5) + { /* 40/60 Charge petition model */ + T1 = T1 / 12.0; + T2 = 0.5 * CoxWL / (T1 * T1); + T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff + * (Vgsteff - 4.0 * T0 / 3.0)) + - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T2 * T3; + T7 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) + + 0.4 * T0 * T0; + T4 = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 + * Vgsteff - 8.0 * T0 / 3.0) + + 2.0 * T0 * T0 / 3.0); + T5 = (qsrc / T1 + T2 * T7) * AbulkCV; + T6 = (qsrc / T1 * VdseffCV + T2 * T7 * VdseffCV); Csg = (T4 + T5 * dVdseffCV_dVg); Csd = T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; Csb = (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) - + Csg * dVgsteff_dVb; - Csg *= dVgsteff_dVg; + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; } - else - { /* 50/50 Charge petition model */ + else + { /* 50/50 Charge petition model */ qsrc = -0.5 * (qgate + qbulk); Csg = -0.5 * (Cgg1 + Cbg1); - Csb = -0.5 * (Cgb1 + Cbb1); - Csd = -0.5 * (Cgd1 + Cbd1); + Csb = -0.5 * (Cgb1 + Cbb1); + Csd = -0.5 * (Cgd1 + Cbd1); } - qgate += Qac0 + Qsub0; - qbulk -= (Qac0 + Qsub0); + qgate += Qac0 + Qsub0; + qbulk -= (Qac0 + Qsub0); qdrn = -(qgate + qbulk + qsrc); - Cgg = dQac0_dVg + dQsub0_dVg + Cgg1; - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - Cgd = dQsub0_dVd + Cgd1; - break; - case BSIM3v32V32: - default: - Cgd = dQac0_dVd + dQsub0_dVd + Cgd1; - } - Cgb = dQac0_dVb + dQsub0_dVb + Cgb1; + Cgg = dQac0_dVg + dQsub0_dVg + Cgg1; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Cgd = dQsub0_dVd + Cgd1; + break; + case BSIM3v32V32: + default: + Cgd = dQac0_dVd + dQsub0_dVd + Cgd1; + } + Cgb = dQac0_dVb + dQsub0_dVb + Cgb1; - Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - Cbd = Cbd1 - dQsub0_dVd; - break; - case BSIM3v32V32: - default: - Cbd = Cbd1 - dQac0_dVd - dQsub0_dVd; - } - Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + Cbd = Cbd1 - dQsub0_dVd; + break; + case BSIM3v32V32: + default: + Cbd = Cbd1 - dQac0_dVd - dQsub0_dVd; + } + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; - Cgb *= dVbseff_dVb; - Cbb *= dVbseff_dVb; - Csb *= dVbseff_dVb; + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; here->BSIM3v32cggb = Cgg; - here->BSIM3v32cgsb = -(Cgg + Cgd + Cgb); - here->BSIM3v32cgdb = Cgd; + here->BSIM3v32cgsb = -(Cgg + Cgd + Cgb); + here->BSIM3v32cgdb = Cgd; here->BSIM3v32cdgb = -(Cgg + Cbg + Csg); - here->BSIM3v32cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb - + Csg + Csd + Csb); - here->BSIM3v32cddb = -(Cgd + Cbd + Csd); + here->BSIM3v32cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM3v32cddb = -(Cgd + Cbd + Csd); here->BSIM3v32cbgb = Cbg; - here->BSIM3v32cbsb = -(Cbg + Cbd + Cbb); - here->BSIM3v32cbdb = Cbd; + here->BSIM3v32cbsb = -(Cbg + Cbd + Cbb); + here->BSIM3v32cbdb = Cbd; here->BSIM3v32qinv = qinoi; - } + } /* New Charge-Thickness capMod (CTM) begins */ - else if (model->BSIM3v32capMod == 3) - { V3 = here->BSIM3v32vfbzb - Vgs_eff + VbseffCV - DELTA_3; - if (here->BSIM3v32vfbzb <= 0.0) - { T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * here->BSIM3v32vfbzb); - T2 = -DELTA_3 / T0; - } - else - { T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * here->BSIM3v32vfbzb); - T2 = DELTA_3 / T0; - } + else if (model->BSIM3v32capMod == 3) + { V3 = here->BSIM3v32vfbzb - Vgs_eff + VbseffCV - DELTA_3; + if (here->BSIM3v32vfbzb <= 0.0) + { T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * here->BSIM3v32vfbzb); + T2 = -DELTA_3 / T0; + } + else + { T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * here->BSIM3v32vfbzb); + T2 = DELTA_3 / T0; + } - T1 = 0.5 * (1.0 + V3 / T0); - Vfbeff = here->BSIM3v32vfbzb - 0.5 * (V3 + T0); - dVfbeff_dVg = T1 * dVgs_eff_dVg; - dVfbeff_dVb = -T1 * dVbseffCV_dVb; + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = here->BSIM3v32vfbzb - 0.5 * (V3 + T0); + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = -T1 * dVbseffCV_dVb; Cox = model->BSIM3v32cox; Tox = 1.0e8 * model->BSIM3v32tox; @@ -2180,8 +2180,8 @@ for (; model != NULL; model = model->BSIM3v32nextModel) QovCox = Qac0 / Coxeff; dQac0_dVg = CoxWLcen * dVfbeff_dVg + QovCox * dCoxeff_dVg; - dQac0_dVb = CoxWLcen * dVfbeff_dVb - + QovCox * dCoxeff_dVb; + dQac0_dVb = CoxWLcen * dVfbeff_dVb + + QovCox * dCoxeff_dVb; T0 = 0.5 * pParam->BSIM3v32k1ox; T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; @@ -2206,138 +2206,138 @@ for (; model != NULL; model = model->BSIM3v32nextModel) dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + dVgsteff_dVb) + QovCox * dCoxeff_dVb; - /* Gate-bias dependent delta Phis begins */ - if (pParam->BSIM3v32k1ox <= 0.0) - { Denomi = 0.25 * pParam->BSIM3v32moin * Vtm; + /* Gate-bias dependent delta Phis begins */ + if (pParam->BSIM3v32k1ox <= 0.0) + { Denomi = 0.25 * pParam->BSIM3v32moin * Vtm; T0 = 0.5 * pParam->BSIM3v32sqrtPhi; - } - else - { Denomi = pParam->BSIM3v32moin * Vtm - * pParam->BSIM3v32k1ox * pParam->BSIM3v32k1ox; + } + else + { Denomi = pParam->BSIM3v32moin * Vtm + * pParam->BSIM3v32k1ox * pParam->BSIM3v32k1ox; T0 = pParam->BSIM3v32k1ox * pParam->BSIM3v32sqrtPhi; - } + } T1 = 2.0 * T0 + Vgsteff; - DeltaPhi = Vtm * log(1.0 + T1 * Vgsteff / Denomi); - dDeltaPhi_dVg = 2.0 * Vtm * (T1 -T0) / (Denomi + T1 * Vgsteff); - dDeltaPhi_dVd = dDeltaPhi_dVg * dVgsteff_dVd; - dDeltaPhi_dVb = dDeltaPhi_dVg * dVgsteff_dVb; - /* End of delta Phis */ + DeltaPhi = Vtm * log(1.0 + T1 * Vgsteff / Denomi); + dDeltaPhi_dVg = 2.0 * Vtm * (T1 -T0) / (Denomi + T1 * Vgsteff); + dDeltaPhi_dVd = dDeltaPhi_dVg * dVgsteff_dVd; + dDeltaPhi_dVb = dDeltaPhi_dVg * dVgsteff_dVb; + /* End of delta Phis */ T3 = 4.0 * (Vth - here->BSIM3v32vfbzb - pParam->BSIM3v32phi); Tox += Tox; if (T3 >= 0.0) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - T0 = (Vgsteff + T3) / Tox; - dT0_dVd = (dVgsteff_dVd + 4.0 * dVth_dVd) / Tox; - dT0_dVb = (dVgsteff_dVb + 4.0 * dVth_dVb) / Tox; - break; - case BSIM3v32V32: - default: - T0 = (Vgsteff + T3) / Tox; - } + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + T0 = (Vgsteff + T3) / Tox; + dT0_dVd = (dVgsteff_dVd + 4.0 * dVth_dVd) / Tox; + dT0_dVb = (dVgsteff_dVb + 4.0 * dVth_dVb) / Tox; + break; + case BSIM3v32V32: + default: + T0 = (Vgsteff + T3) / Tox; + } } else - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - T0 = (Vgsteff + 1.0e-20) / Tox; - dT0_dVd = dVgsteff_dVd / Tox; - dT0_dVb = dVgsteff_dVb / Tox; - break; - case BSIM3v32V32: - default: - T0 = (Vgsteff + 1.0e-20) / Tox; - } + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + T0 = (Vgsteff + 1.0e-20) / Tox; + dT0_dVd = dVgsteff_dVd / Tox; + dT0_dVb = dVgsteff_dVb / Tox; + break; + case BSIM3v32V32: + default: + T0 = (Vgsteff + 1.0e-20) / Tox; + } } tmp = exp(0.7 * log(T0)); T1 = 1.0 + tmp; T2 = 0.7 * tmp / (T0 * Tox); Tcen = 1.9e-9 / T1; dTcen_dVg = -1.9e-9 * T2 / T1 /T1; - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - dTcen_dVd = Tox * dTcen_dVg; - dTcen_dVb = dTcen_dVd * dT0_dVb; - dTcen_dVd *= dT0_dVd; - break; - case BSIM3v32V32: - default: - dTcen_dVd = dTcen_dVg * (4.0 * dVth_dVd + dVgsteff_dVd); - dTcen_dVb = dTcen_dVg * (4.0 * dVth_dVb + dVgsteff_dVb); - } + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + dTcen_dVd = Tox * dTcen_dVg; + dTcen_dVb = dTcen_dVd * dT0_dVb; + dTcen_dVd *= dT0_dVd; + break; + case BSIM3v32V32: + default: + dTcen_dVd = dTcen_dVg * (4.0 * dVth_dVd + dVgsteff_dVd); + dTcen_dVb = dTcen_dVg * (4.0 * dVth_dVb + dVgsteff_dVb); + } dTcen_dVg *= dVgsteff_dVg; - Ccen = EPSSI / Tcen; - T0 = Cox / (Cox + Ccen); - Coxeff = T0 * Ccen; - T1 = -Ccen / Tcen; - dCoxeff_dVg = T0 * T0 * T1; - dCoxeff_dVd = dCoxeff_dVg * dTcen_dVd; - dCoxeff_dVb = dCoxeff_dVg * dTcen_dVb; - dCoxeff_dVg *= dTcen_dVg; - CoxWLcen = CoxWL * Coxeff / Cox; + Ccen = EPSSI / Tcen; + T0 = Cox / (Cox + Ccen); + Coxeff = T0 * Ccen; + T1 = -Ccen / Tcen; + dCoxeff_dVg = T0 * T0 * T1; + dCoxeff_dVd = dCoxeff_dVg * dTcen_dVd; + dCoxeff_dVb = dCoxeff_dVg * dTcen_dVb; + dCoxeff_dVg *= dTcen_dVg; + CoxWLcen = CoxWL * Coxeff / Cox; - AbulkCV = Abulk0 * pParam->BSIM3v32abulkCVfactor; - dAbulkCV_dVb = pParam->BSIM3v32abulkCVfactor * dAbulk0_dVb; - VdsatCV = (Vgsteff - DeltaPhi) / AbulkCV; - V4 = VdsatCV - Vds - DELTA_4; - T0 = sqrt(V4 * V4 + 4.0 * DELTA_4 * VdsatCV); - VdseffCV = VdsatCV - 0.5 * (V4 + T0); - T1 = 0.5 * (1.0 + V4 / T0); - T2 = DELTA_4 / T0; - T3 = (1.0 - T1 - T2) / AbulkCV; - T4 = T3 * ( 1.0 - dDeltaPhi_dVg); - dVdseffCV_dVg = T4; - dVdseffCV_dVd = T1; - dVdseffCV_dVb = -T3 * VdsatCV * dAbulkCV_dVb; - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - /* Added to eliminate non-zero VdseffCV at Vds=0.0 */ - if (Vds == 0.0) - { - VdseffCV = 0.0; - dVdseffCV_dVg = 0.0; - dVdseffCV_dVb = 0.0; - } - break; - case BSIM3v32V32: - default: - /* Do nothing */ - break; - } + AbulkCV = Abulk0 * pParam->BSIM3v32abulkCVfactor; + dAbulkCV_dVb = pParam->BSIM3v32abulkCVfactor * dAbulk0_dVb; + VdsatCV = (Vgsteff - DeltaPhi) / AbulkCV; + V4 = VdsatCV - Vds - DELTA_4; + T0 = sqrt(V4 * V4 + 4.0 * DELTA_4 * VdsatCV); + VdseffCV = VdsatCV - 0.5 * (V4 + T0); + T1 = 0.5 * (1.0 + V4 / T0); + T2 = DELTA_4 / T0; + T3 = (1.0 - T1 - T2) / AbulkCV; + T4 = T3 * ( 1.0 - dDeltaPhi_dVg); + dVdseffCV_dVg = T4; + dVdseffCV_dVd = T1; + dVdseffCV_dVb = -T3 * VdsatCV * dAbulkCV_dVb; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + /* Added to eliminate non-zero VdseffCV at Vds=0.0 */ + if (Vds == 0.0) + { + VdseffCV = 0.0; + dVdseffCV_dVg = 0.0; + dVdseffCV_dVb = 0.0; + } + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } T0 = AbulkCV * VdseffCV; - T1 = Vgsteff - DeltaPhi; + T1 = Vgsteff - DeltaPhi; T2 = 12.0 * (T1 - 0.5 * T0 + 1.0e-20); T3 = T0 / T2; T4 = 1.0 - 12.0 * T3 * T3; T5 = AbulkCV * (6.0 * T0 * (4.0 * T1 - T0) / (T2 * T2) - 0.5); - T6 = T5 * VdseffCV / AbulkCV; + T6 = T5 * VdseffCV / AbulkCV; qgate = qinoi = CoxWLcen * (T1 - T0 * (0.5 - T3)); - QovCox = qgate / Coxeff; - Cgg1 = CoxWLcen * (T4 * (1.0 - dDeltaPhi_dVg) - + T5 * dVdseffCV_dVg); - Cgd1 = CoxWLcen * T5 * dVdseffCV_dVd + Cgg1 - * dVgsteff_dVd + QovCox * dCoxeff_dVd; - Cgb1 = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) - + Cgg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; - Cgg1 = Cgg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; + QovCox = qgate / Coxeff; + Cgg1 = CoxWLcen * (T4 * (1.0 - dDeltaPhi_dVg) + + T5 * dVdseffCV_dVg); + Cgd1 = CoxWLcen * T5 * dVdseffCV_dVd + Cgg1 + * dVgsteff_dVd + QovCox * dCoxeff_dVd; + Cgb1 = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cgg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Cgg1 = Cgg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; T7 = 1.0 - AbulkCV; @@ -2347,95 +2347,95 @@ for (; model != NULL; model = model->BSIM3v32nextModel) T11 = -T7 * T5 / AbulkCV; T12 = -(T9 * T1 / AbulkCV + VdseffCV * (0.5 - T0 / T2)); - qbulk = CoxWLcen * T7 * (0.5 * VdseffCV - T0 * VdseffCV / T2); - QovCox = qbulk / Coxeff; - Cbg1 = CoxWLcen * (T10 + T11 * dVdseffCV_dVg); - Cbd1 = CoxWLcen * T11 * dVdseffCV_dVd + Cbg1 - * dVgsteff_dVd + QovCox * dCoxeff_dVd; - Cbb1 = CoxWLcen * (T11 * dVdseffCV_dVb + T12 * dAbulkCV_dVb) - + Cbg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; - Cbg1 = Cbg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; + qbulk = CoxWLcen * T7 * (0.5 * VdseffCV - T0 * VdseffCV / T2); + QovCox = qbulk / Coxeff; + Cbg1 = CoxWLcen * (T10 + T11 * dVdseffCV_dVg); + Cbd1 = CoxWLcen * T11 * dVdseffCV_dVd + Cbg1 + * dVgsteff_dVd + QovCox * dCoxeff_dVd; + Cbb1 = CoxWLcen * (T11 * dVdseffCV_dVb + T12 * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Cbg1 = Cbg1 * dVgsteff_dVg + QovCox * dCoxeff_dVg; if (model->BSIM3v32xpart > 0.5) - { /* 0/100 partition */ - qsrc = -CoxWLcen * (T1 / 2.0 + T0 / 4.0 - - 0.5 * T0 * T0 / T2); - QovCox = qsrc / Coxeff; - T2 += T2; - T3 = T2 * T2; - T7 = -(0.25 - 12.0 * T0 * (4.0 * T1 - T0) / T3); - T4 = -(0.5 + 24.0 * T0 * T0 / T3) * (1.0 - dDeltaPhi_dVg); - T5 = T7 * AbulkCV; - T6 = T7 * VdseffCV; + { /* 0/100 partition */ + qsrc = -CoxWLcen * (T1 / 2.0 + T0 / 4.0 + - 0.5 * T0 * T0 / T2); + QovCox = qsrc / Coxeff; + T2 += T2; + T3 = T2 * T2; + T7 = -(0.25 - 12.0 * T0 * (4.0 * T1 - T0) / T3); + T4 = -(0.5 + 24.0 * T0 * T0 / T3) * (1.0 - dDeltaPhi_dVg); + T5 = T7 * AbulkCV; + T6 = T7 * VdseffCV; - Csg = CoxWLcen * (T4 + T5 * dVdseffCV_dVg); - Csd = CoxWLcen * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd - + QovCox * dCoxeff_dVd; - Csb = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) - + Csg * dVgsteff_dVb + QovCox * dCoxeff_dVb; - Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; + Csg = CoxWLcen * (T4 + T5 * dVdseffCV_dVg); + Csd = CoxWLcen * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd + + QovCox * dCoxeff_dVd; + Csb = CoxWLcen * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb + QovCox * dCoxeff_dVb; + Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; } - else if (model->BSIM3v32xpart < 0.5) - { /* 40/60 partition */ - T2 = T2 / 12.0; - T3 = 0.5 * CoxWLcen / (T2 * T2); - T4 = T1 * (2.0 * T0 * T0 / 3.0 + T1 * (T1 - 4.0 + else if (model->BSIM3v32xpart < 0.5) + { /* 40/60 partition */ + T2 = T2 / 12.0; + T3 = 0.5 * CoxWLcen / (T2 * T2); + T4 = T1 * (2.0 * T0 * T0 / 3.0 + T1 * (T1 - 4.0 * T0 / 3.0)) - 2.0 * T0 * T0 * T0 / 15.0; - qsrc = -T3 * T4; - QovCox = qsrc / Coxeff; - T8 = 4.0 / 3.0 * T1 * (T1 - T0) + 0.4 * T0 * T0; - T5 = -2.0 * qsrc / T2 - T3 * (T1 * (3.0 * T1 - 8.0 - * T0 / 3.0) + 2.0 * T0 * T0 / 3.0); - T6 = AbulkCV * (qsrc / T2 + T3 * T8); - T7 = T6 * VdseffCV / AbulkCV; + qsrc = -T3 * T4; + QovCox = qsrc / Coxeff; + T8 = 4.0 / 3.0 * T1 * (T1 - T0) + 0.4 * T0 * T0; + T5 = -2.0 * qsrc / T2 - T3 * (T1 * (3.0 * T1 - 8.0 + * T0 / 3.0) + 2.0 * T0 * T0 / 3.0); + T6 = AbulkCV * (qsrc / T2 + T3 * T8); + T7 = T6 * VdseffCV / AbulkCV; - Csg = T5 * (1.0 - dDeltaPhi_dVg) + T6 * dVdseffCV_dVg; - Csd = Csg * dVgsteff_dVd + T6 * dVdseffCV_dVd - + QovCox * dCoxeff_dVd; - Csb = Csg * dVgsteff_dVb + T6 * dVdseffCV_dVb - + T7 * dAbulkCV_dVb + QovCox * dCoxeff_dVb; - Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; + Csg = T5 * (1.0 - dDeltaPhi_dVg) + T6 * dVdseffCV_dVg; + Csd = Csg * dVgsteff_dVd + T6 * dVdseffCV_dVd + + QovCox * dCoxeff_dVd; + Csb = Csg * dVgsteff_dVb + T6 * dVdseffCV_dVb + + T7 * dAbulkCV_dVb + QovCox * dCoxeff_dVb; + Csg = Csg * dVgsteff_dVg + QovCox * dCoxeff_dVg; } - else - { /* 50/50 partition */ + else + { /* 50/50 partition */ qsrc = -0.5 * qgate; Csg = -0.5 * Cgg1; - Csd = -0.5 * Cgd1; - Csb = -0.5 * Cgb1; + Csd = -0.5 * Cgd1; + Csb = -0.5 * Cgb1; } - qgate += Qac0 + Qsub0 - qbulk; - qbulk -= (Qac0 + Qsub0); + qgate += Qac0 + Qsub0 - qbulk; + qbulk -= (Qac0 + Qsub0); qdrn = -(qgate + qbulk + qsrc); - Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; - Cbd = Cbd1 - dQsub0_dVd; - Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + Cbd = Cbd1 - dQsub0_dVd; + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; Cgg = Cgg1 - Cbg; Cgd = Cgd1 - Cbd; Cgb = Cgb1 - Cbb; - Cgb *= dVbseff_dVb; - Cbb *= dVbseff_dVb; - Csb *= dVbseff_dVb; + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; here->BSIM3v32cggb = Cgg; - here->BSIM3v32cgsb = -(Cgg + Cgd + Cgb); - here->BSIM3v32cgdb = Cgd; + here->BSIM3v32cgsb = -(Cgg + Cgd + Cgb); + here->BSIM3v32cgdb = Cgd; here->BSIM3v32cdgb = -(Cgg + Cbg + Csg); - here->BSIM3v32cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb - + Csg + Csd + Csb); - here->BSIM3v32cddb = -(Cgd + Cbd + Csd); + here->BSIM3v32cdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM3v32cddb = -(Cgd + Cbd + Csd); here->BSIM3v32cbgb = Cbg; - here->BSIM3v32cbsb = -(Cbg + Cbd + Cbb); - here->BSIM3v32cbdb = Cbd; + here->BSIM3v32cbsb = -(Cbg + Cbd + Cbb); + here->BSIM3v32cbdb = Cbd; here->BSIM3v32qinv = -qinoi; - } /* End of CTM */ + } /* End of CTM */ } -finished: - /* Returning Values to Calling Routine */ +finished: + /* Returning Values to Calling Routine */ /* * COMPUTE EQUIVALENT DRAIN CURRENT SOURCE */ @@ -2446,197 +2446,197 @@ finished: here->BSIM3v32cd = cdrain; if (ChargeComputationNeeded) - { /* charge storage elements + { /* charge storage elements * bulk-drain and bulk-source depletion capacitances * czbd : zero bias drain junction capacitance * czbs : zero bias source junction capacitance * czbdsw: zero bias drain junction sidewall capacitance - along field oxide + along field oxide * czbssw: zero bias source junction sidewall capacitance - along field oxide - * czbdswg: zero bias drain junction sidewall capacitance - along gate side - * czbsswg: zero bias source junction sidewall capacitance - along gate side + along field oxide + * czbdswg: zero bias drain junction sidewall capacitance + along gate side + * czbsswg: zero bias source junction sidewall capacitance + along gate side */ - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - czbd = model->BSIM3v32unitAreaTempJctCap * here->BSIM3v32drainArea; /*bug fix */ - czbs = model->BSIM3v32unitAreaTempJctCap * here->BSIM3v32sourceArea; - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - czbd = model->BSIM3v32unitAreaJctCap * here->BSIM3v32drainArea; - czbs = model->BSIM3v32unitAreaJctCap * here->BSIM3v32sourceArea; - } + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + czbd = model->BSIM3v32unitAreaTempJctCap * here->BSIM3v32drainArea; /*bug fix */ + czbs = model->BSIM3v32unitAreaTempJctCap * here->BSIM3v32sourceArea; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + czbd = model->BSIM3v32unitAreaJctCap * here->BSIM3v32drainArea; + czbs = model->BSIM3v32unitAreaJctCap * here->BSIM3v32sourceArea; + } if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - czbdswg = model->BSIM3v32unitLengthGateSidewallTempJctCap - * here->BSIM3v32drainPerimeter; - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - czbdswg = model->BSIM3v32unitLengthGateSidewallJctCap - * here->BSIM3v32drainPerimeter; - } + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + czbdswg = model->BSIM3v32unitLengthGateSidewallTempJctCap + * here->BSIM3v32drainPerimeter; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + czbdswg = model->BSIM3v32unitLengthGateSidewallJctCap + * here->BSIM3v32drainPerimeter; + } czbdsw = 0.0; } else { - czbdsw = model->BSIM3v32unitLengthSidewallTempJctCap - * (here->BSIM3v32drainPerimeter - pParam->BSIM3v32weff); - czbdswg = model->BSIM3v32unitLengthGateSidewallTempJctCap - * pParam->BSIM3v32weff; + czbdsw = model->BSIM3v32unitLengthSidewallTempJctCap + * (here->BSIM3v32drainPerimeter - pParam->BSIM3v32weff); + czbdswg = model->BSIM3v32unitLengthGateSidewallTempJctCap + * pParam->BSIM3v32weff; } if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff) { - czbssw = 0.0; - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - czbsswg = model->BSIM3v32unitLengthGateSidewallTempJctCap - * here->BSIM3v32sourcePerimeter; - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - czbsswg = model->BSIM3v32unitLengthGateSidewallJctCap - * here->BSIM3v32sourcePerimeter; - } + czbssw = 0.0; + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + czbsswg = model->BSIM3v32unitLengthGateSidewallTempJctCap + * here->BSIM3v32sourcePerimeter; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + czbsswg = model->BSIM3v32unitLengthGateSidewallJctCap + * here->BSIM3v32sourcePerimeter; + } } else { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - czbssw = model->BSIM3v32unitLengthSidewallTempJctCap - * (here->BSIM3v32sourcePerimeter - pParam->BSIM3v32weff); - czbsswg = model->BSIM3v32unitLengthGateSidewallTempJctCap - * pParam->BSIM3v32weff; - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - czbssw = model->BSIM3v32unitLengthSidewallJctCap - * (here->BSIM3v32sourcePerimeter - pParam->BSIM3v32weff); - czbsswg = model->BSIM3v32unitLengthGateSidewallJctCap - * pParam->BSIM3v32weff; - } + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + czbssw = model->BSIM3v32unitLengthSidewallTempJctCap + * (here->BSIM3v32sourcePerimeter - pParam->BSIM3v32weff); + czbsswg = model->BSIM3v32unitLengthGateSidewallTempJctCap + * pParam->BSIM3v32weff; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + czbssw = model->BSIM3v32unitLengthSidewallJctCap + * (here->BSIM3v32sourcePerimeter - pParam->BSIM3v32weff); + czbsswg = model->BSIM3v32unitLengthGateSidewallJctCap + * pParam->BSIM3v32weff; + } } MJ = model->BSIM3v32bulkJctBotGradingCoeff; MJSW = model->BSIM3v32bulkJctSideGradingCoeff; - MJSWG = model->BSIM3v32bulkJctGateSideGradingCoeff; + MJSWG = model->BSIM3v32bulkJctGateSideGradingCoeff; /* Source Bulk Junction */ - if (vbs == 0.0) - { *(ckt->CKTstate0 + here->BSIM3v32qbs) = 0.0; + if (vbs == 0.0) + { *(ckt->CKTstate0 + here->BSIM3v32qbs) = 0.0; here->BSIM3v32capbs = czbs + czbssw + czbsswg; - } - else if (vbs < 0.0) - { if (czbs > 0.0) - { arg = 1.0 - vbs / model->BSIM3v32PhiB; - if (MJ == 0.5) + } + else if (vbs < 0.0) + { if (czbs > 0.0) + { arg = 1.0 - vbs / model->BSIM3v32PhiB; + if (MJ == 0.5) sarg = 1.0 / sqrt(arg); - else + else sarg = exp(-MJ * log(arg)); - *(ckt->CKTstate0 + here->BSIM3v32qbs) = model->BSIM3v32PhiB * czbs - * (1.0 - arg * sarg) / (1.0 - MJ); - here->BSIM3v32capbs = czbs * sarg; - } - else - { *(ckt->CKTstate0 + here->BSIM3v32qbs) = 0.0; - here->BSIM3v32capbs = 0.0; - } - if (czbssw > 0.0) - { arg = 1.0 - vbs / model->BSIM3v32PhiBSW; - if (MJSW == 0.5) + *(ckt->CKTstate0 + here->BSIM3v32qbs) = model->BSIM3v32PhiB * czbs + * (1.0 - arg * sarg) / (1.0 - MJ); + here->BSIM3v32capbs = czbs * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM3v32qbs) = 0.0; + here->BSIM3v32capbs = 0.0; + } + if (czbssw > 0.0) + { arg = 1.0 - vbs / model->BSIM3v32PhiBSW; + if (MJSW == 0.5) sarg = 1.0 / sqrt(arg); - else + else sarg = exp(-MJSW * log(arg)); *(ckt->CKTstate0 + here->BSIM3v32qbs) += model->BSIM3v32PhiBSW * czbssw - * (1.0 - arg * sarg) / (1.0 - MJSW); + * (1.0 - arg * sarg) / (1.0 - MJSW); here->BSIM3v32capbs += czbssw * sarg; - } - if (czbsswg > 0.0) - { arg = 1.0 - vbs / model->BSIM3v32PhiBSWG; - if (MJSWG == 0.5) + } + if (czbsswg > 0.0) + { arg = 1.0 - vbs / model->BSIM3v32PhiBSWG; + if (MJSWG == 0.5) sarg = 1.0 / sqrt(arg); - else + else sarg = exp(-MJSWG * log(arg)); *(ckt->CKTstate0 + here->BSIM3v32qbs) += model->BSIM3v32PhiBSWG * czbsswg - * (1.0 - arg * sarg) / (1.0 - MJSWG); + * (1.0 - arg * sarg) / (1.0 - MJSWG); here->BSIM3v32capbs += czbsswg * sarg; - } + } } - else - { T0 = czbs + czbssw + czbsswg; - T1 = vbs * (czbs * MJ / model->BSIM3v32PhiB + czbssw * MJSW - / model->BSIM3v32PhiBSW + czbsswg * MJSWG / model->BSIM3v32PhiBSWG); + else + { T0 = czbs + czbssw + czbsswg; + T1 = vbs * (czbs * MJ / model->BSIM3v32PhiB + czbssw * MJSW + / model->BSIM3v32PhiBSW + czbsswg * MJSWG / model->BSIM3v32PhiBSWG); *(ckt->CKTstate0 + here->BSIM3v32qbs) = vbs * (T0 + 0.5 * T1); here->BSIM3v32capbs = T0 + T1; } /* Drain Bulk Junction */ - if (vbd == 0.0) - { *(ckt->CKTstate0 + here->BSIM3v32qbd) = 0.0; + if (vbd == 0.0) + { *(ckt->CKTstate0 + here->BSIM3v32qbd) = 0.0; here->BSIM3v32capbd = czbd + czbdsw + czbdswg; - } - else if (vbd < 0.0) - { if (czbd > 0.0) - { arg = 1.0 - vbd / model->BSIM3v32PhiB; - if (MJ == 0.5) + } + else if (vbd < 0.0) + { if (czbd > 0.0) + { arg = 1.0 - vbd / model->BSIM3v32PhiB; + if (MJ == 0.5) sarg = 1.0 / sqrt(arg); - else + else sarg = exp(-MJ * log(arg)); - *(ckt->CKTstate0 + here->BSIM3v32qbd) = model->BSIM3v32PhiB * czbd - * (1.0 - arg * sarg) / (1.0 - MJ); + *(ckt->CKTstate0 + here->BSIM3v32qbd) = model->BSIM3v32PhiB * czbd + * (1.0 - arg * sarg) / (1.0 - MJ); here->BSIM3v32capbd = czbd * sarg; - } - else - { *(ckt->CKTstate0 + here->BSIM3v32qbd) = 0.0; + } + else + { *(ckt->CKTstate0 + here->BSIM3v32qbd) = 0.0; here->BSIM3v32capbd = 0.0; - } - if (czbdsw > 0.0) - { arg = 1.0 - vbd / model->BSIM3v32PhiBSW; - if (MJSW == 0.5) + } + if (czbdsw > 0.0) + { arg = 1.0 - vbd / model->BSIM3v32PhiBSW; + if (MJSW == 0.5) sarg = 1.0 / sqrt(arg); - else + else sarg = exp(-MJSW * log(arg)); - *(ckt->CKTstate0 + here->BSIM3v32qbd) += model->BSIM3v32PhiBSW * czbdsw - * (1.0 - arg * sarg) / (1.0 - MJSW); + *(ckt->CKTstate0 + here->BSIM3v32qbd) += model->BSIM3v32PhiBSW * czbdsw + * (1.0 - arg * sarg) / (1.0 - MJSW); here->BSIM3v32capbd += czbdsw * sarg; - } - if (czbdswg > 0.0) - { arg = 1.0 - vbd / model->BSIM3v32PhiBSWG; - if (MJSWG == 0.5) + } + if (czbdswg > 0.0) + { arg = 1.0 - vbd / model->BSIM3v32PhiBSWG; + if (MJSWG == 0.5) sarg = 1.0 / sqrt(arg); - else + else sarg = exp(-MJSWG * log(arg)); *(ckt->CKTstate0 + here->BSIM3v32qbd) += model->BSIM3v32PhiBSWG * czbdswg - * (1.0 - arg * sarg) / (1.0 - MJSWG); + * (1.0 - arg * sarg) / (1.0 - MJSWG); here->BSIM3v32capbd += czbdswg * sarg; - } + } } - else - { T0 = czbd + czbdsw + czbdswg; + else + { T0 = czbd + czbdsw + czbdswg; T1 = vbd * (czbd * MJ / model->BSIM3v32PhiB + czbdsw * MJSW / model->BSIM3v32PhiBSW + czbdswg * MJSWG / model->BSIM3v32PhiBSWG); *(ckt->CKTstate0 + here->BSIM3v32qbd) = vbd * (T0 + 0.5 * T1); - here->BSIM3v32capbd = T0 + T1; + here->BSIM3v32capbd = T0 + T1; } } @@ -2644,11 +2644,11 @@ finished: * check convergence */ if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX))) - { if (Check == 1) - { ckt->CKTnoncon++; + { if (Check == 1) + { ckt->CKTnoncon++; #ifndef NEWCONV - } - else + } + else { if (here->BSIM3v32mode >= 0) { Idtot = here->BSIM3v32cd + here->BSIM3v32csub - here->BSIM3v32cbd; } @@ -2665,7 +2665,7 @@ finished: tol = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot)) + ckt->CKTabstol; if (fabs(cbhat - Ibtot) > tol) - { ckt->CKTnoncon++; + { ckt->CKTnoncon++; } } #endif /* NEWCONV */ @@ -2680,8 +2680,8 @@ finished: /* bulk and channel charge plus overlaps */ if (!ChargeComputationNeeded) - goto line850; - + goto line850; + #ifndef NOBYPASS line755: #endif @@ -2698,99 +2698,99 @@ line755: gtau_drift = fabs(here->BSIM3v32tconst * qcheq) * ScalingFactor; T0 = pParam->BSIM3v32leffCV * pParam->BSIM3v32leffCV; gtau_diff = 16.0 * here->BSIM3v32u0temp * model->BSIM3v32vtm / T0 - * ScalingFactor; + * ScalingFactor; here->BSIM3v32gtau = gtau_drift + gtau_diff; } - if (model->BSIM3v32capMod == 0) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - /* code merge -JX */ - cgdo = pParam->BSIM3v32cgdo; - qgdo = pParam->BSIM3v32cgdo * vgd; - cgso = pParam->BSIM3v32cgso; - qgso = pParam->BSIM3v32cgso * vgs; - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - if (vgd < 0.0) - { - cgdo = pParam->BSIM3v32cgdo; - qgdo = pParam->BSIM3v32cgdo * vgd; - } - else - { - cgdo = pParam->BSIM3v32cgdo; - qgdo = pParam->BSIM3v32cgdo * vgd; - } + if (model->BSIM3v32capMod == 0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + /* code merge -JX */ + cgdo = pParam->BSIM3v32cgdo; + qgdo = pParam->BSIM3v32cgdo * vgd; + cgso = pParam->BSIM3v32cgso; + qgso = pParam->BSIM3v32cgso * vgs; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + if (vgd < 0.0) + { + cgdo = pParam->BSIM3v32cgdo; + qgdo = pParam->BSIM3v32cgdo * vgd; + } + else + { + cgdo = pParam->BSIM3v32cgdo; + qgdo = pParam->BSIM3v32cgdo * vgd; + } - if (vgs < 0.0) - { - cgso = pParam->BSIM3v32cgso; - qgso = pParam->BSIM3v32cgso * vgs; - } - else - { - cgso = pParam->BSIM3v32cgso; - qgso = pParam->BSIM3v32cgso * vgs; - } - } - } - else if (model->BSIM3v32capMod == 1) - { if (vgd < 0.0) - { T1 = sqrt(1.0 - 4.0 * vgd / pParam->BSIM3v32ckappa); - cgdo = pParam->BSIM3v32cgdo + pParam->BSIM3v32weffCV - * pParam->BSIM3v32cgdl / T1; - qgdo = pParam->BSIM3v32cgdo * vgd - pParam->BSIM3v32weffCV * 0.5 - * pParam->BSIM3v32cgdl * pParam->BSIM3v32ckappa * (T1 - 1.0); - } - else - { cgdo = pParam->BSIM3v32cgdo + pParam->BSIM3v32weffCV - * pParam->BSIM3v32cgdl; - qgdo = (pParam->BSIM3v32weffCV * pParam->BSIM3v32cgdl - + pParam->BSIM3v32cgdo) * vgd; - } + if (vgs < 0.0) + { + cgso = pParam->BSIM3v32cgso; + qgso = pParam->BSIM3v32cgso * vgs; + } + else + { + cgso = pParam->BSIM3v32cgso; + qgso = pParam->BSIM3v32cgso * vgs; + } + } + } + else if (model->BSIM3v32capMod == 1) + { if (vgd < 0.0) + { T1 = sqrt(1.0 - 4.0 * vgd / pParam->BSIM3v32ckappa); + cgdo = pParam->BSIM3v32cgdo + pParam->BSIM3v32weffCV + * pParam->BSIM3v32cgdl / T1; + qgdo = pParam->BSIM3v32cgdo * vgd - pParam->BSIM3v32weffCV * 0.5 + * pParam->BSIM3v32cgdl * pParam->BSIM3v32ckappa * (T1 - 1.0); + } + else + { cgdo = pParam->BSIM3v32cgdo + pParam->BSIM3v32weffCV + * pParam->BSIM3v32cgdl; + qgdo = (pParam->BSIM3v32weffCV * pParam->BSIM3v32cgdl + + pParam->BSIM3v32cgdo) * vgd; + } - if (vgs < 0.0) - { T1 = sqrt(1.0 - 4.0 * vgs / pParam->BSIM3v32ckappa); - cgso = pParam->BSIM3v32cgso + pParam->BSIM3v32weffCV - * pParam->BSIM3v32cgsl / T1; - qgso = pParam->BSIM3v32cgso * vgs - pParam->BSIM3v32weffCV * 0.5 - * pParam->BSIM3v32cgsl * pParam->BSIM3v32ckappa * (T1 - 1.0); - } - else - { cgso = pParam->BSIM3v32cgso + pParam->BSIM3v32weffCV - * pParam->BSIM3v32cgsl; - qgso = (pParam->BSIM3v32weffCV * pParam->BSIM3v32cgsl - + pParam->BSIM3v32cgso) * vgs; - } - } - else - { T0 = vgd + DELTA_1; - T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); - T2 = 0.5 * (T0 - T1); + if (vgs < 0.0) + { T1 = sqrt(1.0 - 4.0 * vgs / pParam->BSIM3v32ckappa); + cgso = pParam->BSIM3v32cgso + pParam->BSIM3v32weffCV + * pParam->BSIM3v32cgsl / T1; + qgso = pParam->BSIM3v32cgso * vgs - pParam->BSIM3v32weffCV * 0.5 + * pParam->BSIM3v32cgsl * pParam->BSIM3v32ckappa * (T1 - 1.0); + } + else + { cgso = pParam->BSIM3v32cgso + pParam->BSIM3v32weffCV + * pParam->BSIM3v32cgsl; + qgso = (pParam->BSIM3v32weffCV * pParam->BSIM3v32cgsl + + pParam->BSIM3v32cgso) * vgs; + } + } + else + { T0 = vgd + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); - T3 = pParam->BSIM3v32weffCV * pParam->BSIM3v32cgdl; - T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM3v32ckappa); - cgdo = pParam->BSIM3v32cgdo + T3 - T3 * (1.0 - 1.0 / T4) - * (0.5 - 0.5 * T0 / T1); - qgdo = (pParam->BSIM3v32cgdo + T3) * vgd - T3 * (T2 - + 0.5 * pParam->BSIM3v32ckappa * (T4 - 1.0)); + T3 = pParam->BSIM3v32weffCV * pParam->BSIM3v32cgdl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM3v32ckappa); + cgdo = pParam->BSIM3v32cgdo + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgdo = (pParam->BSIM3v32cgdo + T3) * vgd - T3 * (T2 + + 0.5 * pParam->BSIM3v32ckappa * (T4 - 1.0)); - T0 = vgs + DELTA_1; - T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); - T2 = 0.5 * (T0 - T1); - T3 = pParam->BSIM3v32weffCV * pParam->BSIM3v32cgsl; - T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM3v32ckappa); - cgso = pParam->BSIM3v32cgso + T3 - T3 * (1.0 - 1.0 / T4) - * (0.5 - 0.5 * T0 / T1); - qgso = (pParam->BSIM3v32cgso + T3) * vgs - T3 * (T2 - + 0.5 * pParam->BSIM3v32ckappa * (T4 - 1.0)); - } + T0 = vgs + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + T3 = pParam->BSIM3v32weffCV * pParam->BSIM3v32cgsl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM3v32ckappa); + cgso = pParam->BSIM3v32cgso + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgso = (pParam->BSIM3v32cgso + T3) * vgs - T3 * (T2 + + 0.5 * pParam->BSIM3v32ckappa * (T4 - 1.0)); + } here->BSIM3v32cgdo = cgdo; here->BSIM3v32cgso = cgso; @@ -2827,10 +2827,10 @@ line755: qsrc = -(qgate + qbulk + qdrn); ggtg = ggtd = ggtb = ggts = 0.0; - sxpart = 0.6; + sxpart = 0.6; dxpart = 0.4; - ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; - dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; } else { if (qcheq > 0.0) @@ -2841,7 +2841,7 @@ line755: ggtd = here->BSIM3v32gtd = T0 * here->BSIM3v32cqdb; ggts = here->BSIM3v32gts = T0 * here->BSIM3v32cqsb; ggtb = here->BSIM3v32gtb = T0 * here->BSIM3v32cqbb; - gqdef = ScalingFactor * ag0; + gqdef = ScalingFactor * ag0; gcqgb = here->BSIM3v32cqgb * ag0; gcqdb = here->BSIM3v32cqdb * ag0; @@ -2864,44 +2864,44 @@ line755: gcbdb = -here->BSIM3v32capbd * ag0; gcbsb = -here->BSIM3v32capbs * ag0; - CoxWL = model->BSIM3v32cox * pParam->BSIM3v32weffCV + CoxWL = model->BSIM3v32cox * pParam->BSIM3v32weffCV * pParam->BSIM3v32leffCV; - if (fabs(qcheq) <= 1.0e-5 * CoxWL) - { if (model->BSIM3v32xpart < 0.5) - { dxpart = 0.4; - } - else if (model->BSIM3v32xpart > 0.5) - { dxpart = 0.0; - } - else - { dxpart = 0.5; - } - ddxpart_dVd = ddxpart_dVg = ddxpart_dVb - = ddxpart_dVs = 0.0; - } - else - { dxpart = qdrn / qcheq; - Cdd = here->BSIM3v32cddb; - Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb - + here->BSIM3v32cbdb); - ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; - Cdg = here->BSIM3v32cdgb; - Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb - + here->BSIM3v32cbgb); - ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = qdrn / qcheq; + Cdd = here->BSIM3v32cddb; + Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM3v32cdgb; + Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; - Cds = here->BSIM3v32cdsb; - Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb - + here->BSIM3v32cbsb); - ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + Cds = here->BSIM3v32cdsb; + Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; - ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); - } - sxpart = 1.0 - dxpart; - dsxpart_dVd = -ddxpart_dVd; - dsxpart_dVg = -ddxpart_dVg; - dsxpart_dVs = -ddxpart_dVs; - dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); qgd = qgdo; qgs = qgso; @@ -2943,10 +2943,10 @@ line755: qdrn = -(qgate + qbulk + qsrc); ggtg = ggtd = ggtb = ggts = 0.0; - sxpart = 0.4; + sxpart = 0.4; dxpart = 0.6; - ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; - dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; } else { if (qcheq > 0.0) @@ -2957,7 +2957,7 @@ line755: ggts = here->BSIM3v32gtd = T0 * here->BSIM3v32cqdb; ggtd = here->BSIM3v32gts = T0 * here->BSIM3v32cqsb; ggtb = here->BSIM3v32gtb = T0 * here->BSIM3v32cqbb; - gqdef = ScalingFactor * ag0; + gqdef = ScalingFactor * ag0; gcqgb = here->BSIM3v32cqgb * ag0; gcqdb = here->BSIM3v32cqsb * ag0; @@ -2980,44 +2980,44 @@ line755: gcbdb = -here->BSIM3v32capbd * ag0; gcbsb = -here->BSIM3v32capbs * ag0; - CoxWL = model->BSIM3v32cox * pParam->BSIM3v32weffCV + CoxWL = model->BSIM3v32cox * pParam->BSIM3v32weffCV * pParam->BSIM3v32leffCV; - if (fabs(qcheq) <= 1.0e-5 * CoxWL) - { if (model->BSIM3v32xpart < 0.5) - { sxpart = 0.4; - } - else if (model->BSIM3v32xpart > 0.5) - { sxpart = 0.0; - } - else - { sxpart = 0.5; - } - dsxpart_dVd = dsxpart_dVg = dsxpart_dVb - = dsxpart_dVs = 0.0; - } - else - { sxpart = qdrn / qcheq; - Css = here->BSIM3v32cddb; - Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb - + here->BSIM3v32cbdb); - dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; - Csg = here->BSIM3v32cdgb; - Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb - + here->BSIM3v32cbgb); - dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = qdrn / qcheq; + Css = here->BSIM3v32cddb; + Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM3v32cdgb; + Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; - Csd = here->BSIM3v32cdsb; - Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb - + here->BSIM3v32cbsb); - dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + Csd = here->BSIM3v32cdsb; + Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; - dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); - } - dxpart = 1.0 - sxpart; - ddxpart_dVd = -dsxpart_dVd; - ddxpart_dVg = -dsxpart_dVg; - ddxpart_dVs = -dsxpart_dVs; - ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); qgd = qgdo; qgs = qgso; @@ -3029,7 +3029,7 @@ line755: } } - cqdef = cqcheq = 0.0; + cqdef = cqcheq = 0.0; if (ByPass) goto line860; *(ckt->CKTstate0 + here->BSIM3v32qg) = qgate; @@ -3096,21 +3096,21 @@ line850: gcggb = gcgdb = gcgsb = 0.0; gcbgb = gcbdb = gcbsb = 0.0; - gqdef = gcqgb = gcqdb = gcqsb = gcqbb = 0.0; + gqdef = gcqgb = gcqdb = gcqsb = gcqbb = 0.0; ggtg = ggtd = ggtb = ggts = 0.0; sxpart = (1.0 - (dxpart = (here->BSIM3v32mode > 0) ? 0.4 : 0.6)); - ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; - dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb = dsxpart_dVs = 0.0; if (here->BSIM3v32nqsMod) - here->BSIM3v32gtau = 16.0 * here->BSIM3v32u0temp * model->BSIM3v32vtm + here->BSIM3v32gtau = 16.0 * here->BSIM3v32u0temp * model->BSIM3v32vtm / pParam->BSIM3v32leffCV / pParam->BSIM3v32leffCV - * ScalingFactor; - else + * ScalingFactor; + else here->BSIM3v32gtau = 0.0; goto line900; - + line860: /* evaluate equivalent charge current */ @@ -3125,9 +3125,9 @@ line860: if (here->BSIM3v32nqsMod) { T0 = ggtg * vgb - ggtd * vbd - ggts * vbs; ceqqg += T0; - T1 = qdef * here->BSIM3v32gtau; + T1 = qdef * here->BSIM3v32gtau; ceqqd -= dxpart * T0 + T1 * (ddxpart_dVg * vgb - ddxpart_dVd - * vbd - ddxpart_dVs * vbs); + * vbd - ddxpart_dVs * vbs); cqdef = *(ckt->CKTstate0 + here->BSIM3v32cqcdump) - gqdef * qdef; cqcheq = *(ckt->CKTstate0 + here->BSIM3v32cqcheq) - (gcqgb * vgb - gcqdb * vbd - gcqsb * vbs) + T0; @@ -3155,16 +3155,16 @@ line860: line900: if (here->BSIM3v32mode >= 0) - { Gm = here->BSIM3v32gm; + { Gm = here->BSIM3v32gm; Gmbs = here->BSIM3v32gmbs; FwdSum = Gm + Gmbs; RevSum = 0.0; cdreq = model->BSIM3v32type * (cdrain - here->BSIM3v32gds * vds - - Gm * vgs - Gmbs * vbs); + - Gm * vgs - Gmbs * vbs); - ceqbd = -model->BSIM3v32type * (here->BSIM3v32csub - - here->BSIM3v32gbds * vds - here->BSIM3v32gbgs * vgs - - here->BSIM3v32gbbs * vbs); + ceqbd = -model->BSIM3v32type * (here->BSIM3v32csub + - here->BSIM3v32gbds * vds - here->BSIM3v32gbgs * vgs + - here->BSIM3v32gbbs * vbs); ceqbs = 0.0; gbbdp = -here->BSIM3v32gbds; @@ -3180,17 +3180,17 @@ line900: gbspb = 0.0; gbspsp = 0.0; } - else - { Gm = -here->BSIM3v32gm; + else + { Gm = -here->BSIM3v32gm; Gmbs = -here->BSIM3v32gmbs; FwdSum = 0.0; RevSum = -(Gm + Gmbs); cdreq = -model->BSIM3v32type * (cdrain + here->BSIM3v32gds * vds + Gm * vgd + Gmbs * vbd); - ceqbs = -model->BSIM3v32type * (here->BSIM3v32csub - + here->BSIM3v32gbds * vds - here->BSIM3v32gbgs * vgd - - here->BSIM3v32gbbs * vbd); + ceqbs = -model->BSIM3v32type * (here->BSIM3v32csub + + here->BSIM3v32gbds * vds - here->BSIM3v32gbgs * vgd + - here->BSIM3v32gbbs * vbd); ceqbd = 0.0; gbbsp = -here->BSIM3v32gbds; @@ -3207,93 +3207,93 @@ line900: gbspdp = -(gbspg + gbspsp + gbspb); } - if (model->BSIM3v32type > 0) - { ceqbs += (here->BSIM3v32cbs - here->BSIM3v32gbs * vbs); + if (model->BSIM3v32type > 0) + { ceqbs += (here->BSIM3v32cbs - here->BSIM3v32gbs * vbs); ceqbd += (here->BSIM3v32cbd - here->BSIM3v32gbd * vbd); - /* + /* ceqqg = ceqqg; ceqqb = ceqqb; ceqqd = ceqqd; cqdef = cqdef; cqcheq = cqcheq; - */ - } - else - { ceqbs -= (here->BSIM3v32cbs - here->BSIM3v32gbs * vbs); + */ + } + else + { ceqbs -= (here->BSIM3v32cbs - here->BSIM3v32gbs * vbs); ceqbd -= (here->BSIM3v32cbd - here->BSIM3v32gbd * vbd); ceqqg = -ceqqg; ceqqb = -ceqqb; ceqqd = -ceqqd; cqdef = -cqdef; cqcheq = -cqcheq; - } + } - m = here->BSIM3v32m; + m = here->BSIM3v32m; - (*(ckt->CKTrhs + here->BSIM3v32gNode) -= m * ceqqg); - (*(ckt->CKTrhs + here->BSIM3v32bNode) -= m * (ceqbs + ceqbd + ceqqb)); - (*(ckt->CKTrhs + here->BSIM3v32dNodePrime) += m * (ceqbd - cdreq - ceqqd)); - (*(ckt->CKTrhs + here->BSIM3v32sNodePrime) += m * (cdreq + ceqbs + ceqqg - + ceqqb + ceqqd)); - if (here->BSIM3v32nqsMod) - *(ckt->CKTrhs + here->BSIM3v32qNode) += m * (cqcheq - cqdef); + (*(ckt->CKTrhs + here->BSIM3v32gNode) -= m * ceqqg); + (*(ckt->CKTrhs + here->BSIM3v32bNode) -= m * (ceqbs + ceqbd + ceqqb)); + (*(ckt->CKTrhs + here->BSIM3v32dNodePrime) += m * (ceqbd - cdreq - ceqqd)); + (*(ckt->CKTrhs + here->BSIM3v32sNodePrime) += m * (cdreq + ceqbs + ceqqg + + ceqqb + ceqqd)); + if (here->BSIM3v32nqsMod) + *(ckt->CKTrhs + here->BSIM3v32qNode) += m * (cqcheq - cqdef); - /* - * load y matrix - */ + /* + * load y matrix + */ - T1 = qdef * here->BSIM3v32gtau; - (*(here->BSIM3v32DdPtr) += m * here->BSIM3v32drainConductance); - (*(here->BSIM3v32GgPtr) += m * (gcggb - ggtg)); - (*(here->BSIM3v32SsPtr) += m * here->BSIM3v32sourceConductance); - (*(here->BSIM3v32BbPtr) += m * (here->BSIM3v32gbd + here->BSIM3v32gbs - - gcbgb - gcbdb - gcbsb - here->BSIM3v32gbbs)); - (*(here->BSIM3v32DPdpPtr) += m * (here->BSIM3v32drainConductance - + here->BSIM3v32gds + here->BSIM3v32gbd - + RevSum + gcddb + dxpart * ggtd - + T1 * ddxpart_dVd + gbdpdp)); - (*(here->BSIM3v32SPspPtr) += m * (here->BSIM3v32sourceConductance - + here->BSIM3v32gds + here->BSIM3v32gbs - + FwdSum + gcssb + sxpart * ggts - + T1 * dsxpart_dVs + gbspsp)); - (*(here->BSIM3v32DdpPtr) -= m * here->BSIM3v32drainConductance); - (*(here->BSIM3v32GbPtr) -= m * (gcggb + gcgdb + gcgsb + ggtb)); - (*(here->BSIM3v32GdpPtr) += m * (gcgdb - ggtd)); - (*(here->BSIM3v32GspPtr) += m * (gcgsb - ggts)); - (*(here->BSIM3v32SspPtr) -= m * here->BSIM3v32sourceConductance); - (*(here->BSIM3v32BgPtr) += m * (gcbgb - here->BSIM3v32gbgs)); - (*(here->BSIM3v32BdpPtr) += m * (gcbdb - here->BSIM3v32gbd + gbbdp)); - (*(here->BSIM3v32BspPtr) += m * (gcbsb - here->BSIM3v32gbs + gbbsp)); - (*(here->BSIM3v32DPdPtr) -= m * here->BSIM3v32drainConductance); - (*(here->BSIM3v32DPgPtr) += m * (Gm + gcdgb + dxpart * ggtg - + T1 * ddxpart_dVg + gbdpg)); - (*(here->BSIM3v32DPbPtr) -= m * (here->BSIM3v32gbd - Gmbs + gcdgb + gcddb - + gcdsb - dxpart * ggtb - - T1 * ddxpart_dVb - gbdpb)); - (*(here->BSIM3v32DPspPtr) -= m * (here->BSIM3v32gds + FwdSum - gcdsb - - dxpart * ggts - T1 * ddxpart_dVs - gbdpsp)); - (*(here->BSIM3v32SPgPtr) += m * (gcsgb - Gm + sxpart * ggtg - + T1 * dsxpart_dVg + gbspg)); - (*(here->BSIM3v32SPsPtr) -= m * here->BSIM3v32sourceConductance); - (*(here->BSIM3v32SPbPtr) -= m * (here->BSIM3v32gbs + Gmbs + gcsgb + gcsdb - + gcssb - sxpart * ggtb - - T1 * dsxpart_dVb - gbspb)); - (*(here->BSIM3v32SPdpPtr) -= m * (here->BSIM3v32gds + RevSum - gcsdb - - sxpart * ggtd - T1 * dsxpart_dVd - gbspdp)); + T1 = qdef * here->BSIM3v32gtau; + (*(here->BSIM3v32DdPtr) += m * here->BSIM3v32drainConductance); + (*(here->BSIM3v32GgPtr) += m * (gcggb - ggtg)); + (*(here->BSIM3v32SsPtr) += m * here->BSIM3v32sourceConductance); + (*(here->BSIM3v32BbPtr) += m * (here->BSIM3v32gbd + here->BSIM3v32gbs + - gcbgb - gcbdb - gcbsb - here->BSIM3v32gbbs)); + (*(here->BSIM3v32DPdpPtr) += m * (here->BSIM3v32drainConductance + + here->BSIM3v32gds + here->BSIM3v32gbd + + RevSum + gcddb + dxpart * ggtd + + T1 * ddxpart_dVd + gbdpdp)); + (*(here->BSIM3v32SPspPtr) += m * (here->BSIM3v32sourceConductance + + here->BSIM3v32gds + here->BSIM3v32gbs + + FwdSum + gcssb + sxpart * ggts + + T1 * dsxpart_dVs + gbspsp)); + (*(here->BSIM3v32DdpPtr) -= m * here->BSIM3v32drainConductance); + (*(here->BSIM3v32GbPtr) -= m * (gcggb + gcgdb + gcgsb + ggtb)); + (*(here->BSIM3v32GdpPtr) += m * (gcgdb - ggtd)); + (*(here->BSIM3v32GspPtr) += m * (gcgsb - ggts)); + (*(here->BSIM3v32SspPtr) -= m * here->BSIM3v32sourceConductance); + (*(here->BSIM3v32BgPtr) += m * (gcbgb - here->BSIM3v32gbgs)); + (*(here->BSIM3v32BdpPtr) += m * (gcbdb - here->BSIM3v32gbd + gbbdp)); + (*(here->BSIM3v32BspPtr) += m * (gcbsb - here->BSIM3v32gbs + gbbsp)); + (*(here->BSIM3v32DPdPtr) -= m * here->BSIM3v32drainConductance); + (*(here->BSIM3v32DPgPtr) += m * (Gm + gcdgb + dxpart * ggtg + + T1 * ddxpart_dVg + gbdpg)); + (*(here->BSIM3v32DPbPtr) -= m * (here->BSIM3v32gbd - Gmbs + gcdgb + gcddb + + gcdsb - dxpart * ggtb + - T1 * ddxpart_dVb - gbdpb)); + (*(here->BSIM3v32DPspPtr) -= m * (here->BSIM3v32gds + FwdSum - gcdsb + - dxpart * ggts - T1 * ddxpart_dVs - gbdpsp)); + (*(here->BSIM3v32SPgPtr) += m * (gcsgb - Gm + sxpart * ggtg + + T1 * dsxpart_dVg + gbspg)); + (*(here->BSIM3v32SPsPtr) -= m * here->BSIM3v32sourceConductance); + (*(here->BSIM3v32SPbPtr) -= m * (here->BSIM3v32gbs + Gmbs + gcsgb + gcsdb + + gcssb - sxpart * ggtb + - T1 * dsxpart_dVb - gbspb)); + (*(here->BSIM3v32SPdpPtr) -= m * (here->BSIM3v32gds + RevSum - gcsdb + - sxpart * ggtd - T1 * dsxpart_dVd - gbspdp)); - if (here->BSIM3v32nqsMod) - { - *(here->BSIM3v32QqPtr) += m * (gqdef + here->BSIM3v32gtau); + if (here->BSIM3v32nqsMod) + { + *(here->BSIM3v32QqPtr) += m * (gqdef + here->BSIM3v32gtau); - *(here->BSIM3v32DPqPtr) += m * (dxpart * here->BSIM3v32gtau); - *(here->BSIM3v32SPqPtr) += m * (sxpart * here->BSIM3v32gtau); - *(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau; + *(here->BSIM3v32DPqPtr) += m * (dxpart * here->BSIM3v32gtau); + *(here->BSIM3v32SPqPtr) += m * (sxpart * here->BSIM3v32gtau); + *(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau; - *(here->BSIM3v32QgPtr) += m * (ggtg - gcqgb); - *(here->BSIM3v32QdpPtr) += m * (ggtd - gcqdb); - *(here->BSIM3v32QspPtr) += m * (ggts - gcqsb); - *(here->BSIM3v32QbPtr) += m * (ggtb - gcqbb); - } + *(here->BSIM3v32QgPtr) += m * (ggtg - gcqgb); + *(here->BSIM3v32QdpPtr) += m * (ggtd - gcqdb); + *(here->BSIM3v32QspPtr) += m * (ggts - gcqsb); + *(here->BSIM3v32QbPtr) += m * (ggtb - gcqbb); + } line1000: ; diff --git a/src/spicelib/devices/bsim3v32/b3v32mask.c b/src/spicelib/devices/bsim3v32/b3v32mask.c index 70775ab49..d031ce718 100644 --- a/src/spicelib/devices/bsim3v32/b3v32mask.c +++ b/src/spicelib/devices/bsim3v32/b3v32mask.c @@ -24,24 +24,24 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) NG_IGNORE(ckt); - switch(which) + switch(which) { case BSIM3v32_MOD_MOBMOD: - value->iValue = model->BSIM3v32mobMod; + value->iValue = model->BSIM3v32mobMod; return(OK); case BSIM3v32_MOD_PARAMCHK: - value->iValue = model->BSIM3v32paramChk; + value->iValue = model->BSIM3v32paramChk; return(OK); case BSIM3v32_MOD_BINUNIT: - value->iValue = model->BSIM3v32binUnit; + value->iValue = model->BSIM3v32binUnit; return(OK); case BSIM3v32_MOD_CAPMOD: - value->iValue = model->BSIM3v32capMod; + value->iValue = model->BSIM3v32capMod; return(OK); case BSIM3v32_MOD_NOIMOD: - value->iValue = model->BSIM3v32noiMod; + value->iValue = model->BSIM3v32noiMod; return(OK); case BSIM3v32_MOD_ACMMOD: - value->iValue = model->BSIM3v32acmMod; + value->iValue = model->BSIM3v32acmMod; return(OK); case BSIM3v32_MOD_VERSION : value->sValue = model->BSIM3v32version; @@ -94,7 +94,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) return(OK); case BSIM3v32_MOD_KETA: value->rValue = model->BSIM3v32keta; - return(OK); + return(OK); case BSIM3v32_MOD_NSUB: value->rValue = model->BSIM3v32nsub; return(OK); @@ -146,50 +146,50 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) case BSIM3v32_MOD_NLX: value->rValue = model->BSIM3v32nlx; return(OK); - case BSIM3v32_MOD_DVT0 : + case BSIM3v32_MOD_DVT0 : value->rValue = model->BSIM3v32dvt0; return(OK); - case BSIM3v32_MOD_DVT1 : + case BSIM3v32_MOD_DVT1 : value->rValue = model->BSIM3v32dvt1; return(OK); - case BSIM3v32_MOD_DVT2 : + case BSIM3v32_MOD_DVT2 : value->rValue = model->BSIM3v32dvt2; return(OK); - case BSIM3v32_MOD_DVT0W : + case BSIM3v32_MOD_DVT0W : value->rValue = model->BSIM3v32dvt0w; return(OK); - case BSIM3v32_MOD_DVT1W : + case BSIM3v32_MOD_DVT1W : value->rValue = model->BSIM3v32dvt1w; return(OK); - case BSIM3v32_MOD_DVT2W : + case BSIM3v32_MOD_DVT2W : value->rValue = model->BSIM3v32dvt2w; return(OK); - case BSIM3v32_MOD_DROUT : + case BSIM3v32_MOD_DROUT : value->rValue = model->BSIM3v32drout; return(OK); - case BSIM3v32_MOD_DSUB : + case BSIM3v32_MOD_DSUB : value->rValue = model->BSIM3v32dsub; return(OK); case BSIM3v32_MOD_VTH0: - value->rValue = model->BSIM3v32vth0; + value->rValue = model->BSIM3v32vth0; return(OK); case BSIM3v32_MOD_UA: - value->rValue = model->BSIM3v32ua; + value->rValue = model->BSIM3v32ua; return(OK); case BSIM3v32_MOD_UA1: - value->rValue = model->BSIM3v32ua1; + value->rValue = model->BSIM3v32ua1; return(OK); case BSIM3v32_MOD_UB: - value->rValue = model->BSIM3v32ub; + value->rValue = model->BSIM3v32ub; return(OK); case BSIM3v32_MOD_UB1: - value->rValue = model->BSIM3v32ub1; + value->rValue = model->BSIM3v32ub1; return(OK); case BSIM3v32_MOD_UC: - value->rValue = model->BSIM3v32uc; + value->rValue = model->BSIM3v32uc; return(OK); case BSIM3v32_MOD_UC1: - value->rValue = model->BSIM3v32uc1; + value->rValue = model->BSIM3v32uc1; return(OK); case BSIM3v32_MOD_U0: value->rValue = model->BSIM3v32u0; @@ -204,44 +204,44 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) value->rValue = model->BSIM3v32delta; return(OK); case BSIM3v32_MOD_RDSW: - value->rValue = model->BSIM3v32rdsw; - return(OK); + value->rValue = model->BSIM3v32rdsw; + return(OK); case BSIM3v32_MOD_PRWG: - value->rValue = model->BSIM3v32prwg; - return(OK); + value->rValue = model->BSIM3v32prwg; + return(OK); case BSIM3v32_MOD_PRWB: - value->rValue = model->BSIM3v32prwb; - return(OK); + value->rValue = model->BSIM3v32prwb; + return(OK); case BSIM3v32_MOD_PRT: - value->rValue = model->BSIM3v32prt; - return(OK); + value->rValue = model->BSIM3v32prt; + return(OK); case BSIM3v32_MOD_ETA0: - value->rValue = model->BSIM3v32eta0; - return(OK); + value->rValue = model->BSIM3v32eta0; + return(OK); case BSIM3v32_MOD_ETAB: - value->rValue = model->BSIM3v32etab; - return(OK); + value->rValue = model->BSIM3v32etab; + return(OK); case BSIM3v32_MOD_PCLM: - value->rValue = model->BSIM3v32pclm; - return(OK); + value->rValue = model->BSIM3v32pclm; + return(OK); case BSIM3v32_MOD_PDIBL1: - value->rValue = model->BSIM3v32pdibl1; - return(OK); + value->rValue = model->BSIM3v32pdibl1; + return(OK); case BSIM3v32_MOD_PDIBL2: - value->rValue = model->BSIM3v32pdibl2; - return(OK); + value->rValue = model->BSIM3v32pdibl2; + return(OK); case BSIM3v32_MOD_PDIBLB: - value->rValue = model->BSIM3v32pdiblb; - return(OK); + value->rValue = model->BSIM3v32pdiblb; + return(OK); case BSIM3v32_MOD_PSCBE1: - value->rValue = model->BSIM3v32pscbe1; - return(OK); + value->rValue = model->BSIM3v32pscbe1; + return(OK); case BSIM3v32_MOD_PSCBE2: - value->rValue = model->BSIM3v32pscbe2; - return(OK); + value->rValue = model->BSIM3v32pscbe2; + return(OK); case BSIM3v32_MOD_PVAG: - value->rValue = model->BSIM3v32pvag; - return(OK); + value->rValue = model->BSIM3v32pvag; + return(OK); case BSIM3v32_MOD_WR: value->rValue = model->BSIM3v32wr; return(OK); @@ -301,7 +301,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) value->rValue = model->BSIM3v32dlc; return(OK); case BSIM3v32_MOD_VFBCV: - value->rValue = model->BSIM3v32vfbcv; + value->rValue = model->BSIM3v32vfbcv; return(OK); case BSIM3v32_MOD_ACDE: value->rValue = model->BSIM3v32acde; @@ -334,30 +334,30 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) value->rValue = model->BSIM3v32tpbswg; return(OK); - /* acm model */ - case BSIM3v32_MOD_HDIF: - value->rValue = model->BSIM3v32hdif; - return(OK); - case BSIM3v32_MOD_LDIF: - value->rValue = model->BSIM3v32ldif; - return(OK); - case BSIM3v32_MOD_LD: - value->rValue = model->BSIM3v32ld; - return(OK); - case BSIM3v32_MOD_RD: - value->rValue = model->BSIM3v32rd; - return(OK); - case BSIM3v32_MOD_RS: - value->rValue = model->BSIM3v32rs; - return(OK); - case BSIM3v32_MOD_RDC: - value->rValue = model->BSIM3v32rdc; - return(OK); - case BSIM3v32_MOD_RSC: - value->rValue = model->BSIM3v32rsc; - return(OK); + /* acm model */ + case BSIM3v32_MOD_HDIF: + value->rValue = model->BSIM3v32hdif; + return(OK); + case BSIM3v32_MOD_LDIF: + value->rValue = model->BSIM3v32ldif; + return(OK); + case BSIM3v32_MOD_LD: + value->rValue = model->BSIM3v32ld; + return(OK); + case BSIM3v32_MOD_RD: + value->rValue = model->BSIM3v32rd; + return(OK); + case BSIM3v32_MOD_RS: + value->rValue = model->BSIM3v32rs; + return(OK); + case BSIM3v32_MOD_RDC: + value->rValue = model->BSIM3v32rdc; + return(OK); + case BSIM3v32_MOD_RSC: + value->rValue = model->BSIM3v32rsc; + return(OK); - /* Length dependence */ + /* Length dependence */ case BSIM3v32_MOD_LCDSC : value->rValue = model->BSIM3v32lcdsc; return(OK); @@ -396,7 +396,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) return(OK); case BSIM3v32_MOD_LKETA: value->rValue = model->BSIM3v32lketa; - return(OK); + return(OK); case BSIM3v32_MOD_LNSUB: value->rValue = model->BSIM3v32lnsub; return(OK); @@ -448,50 +448,50 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) case BSIM3v32_MOD_LNLX: value->rValue = model->BSIM3v32lnlx; return(OK); - case BSIM3v32_MOD_LDVT0: + case BSIM3v32_MOD_LDVT0: value->rValue = model->BSIM3v32ldvt0; return(OK); - case BSIM3v32_MOD_LDVT1 : + case BSIM3v32_MOD_LDVT1 : value->rValue = model->BSIM3v32ldvt1; return(OK); - case BSIM3v32_MOD_LDVT2 : + case BSIM3v32_MOD_LDVT2 : value->rValue = model->BSIM3v32ldvt2; return(OK); - case BSIM3v32_MOD_LDVT0W : + case BSIM3v32_MOD_LDVT0W : value->rValue = model->BSIM3v32ldvt0w; return(OK); - case BSIM3v32_MOD_LDVT1W : + case BSIM3v32_MOD_LDVT1W : value->rValue = model->BSIM3v32ldvt1w; return(OK); - case BSIM3v32_MOD_LDVT2W : + case BSIM3v32_MOD_LDVT2W : value->rValue = model->BSIM3v32ldvt2w; return(OK); - case BSIM3v32_MOD_LDROUT : + case BSIM3v32_MOD_LDROUT : value->rValue = model->BSIM3v32ldrout; return(OK); - case BSIM3v32_MOD_LDSUB : + case BSIM3v32_MOD_LDSUB : value->rValue = model->BSIM3v32ldsub; return(OK); case BSIM3v32_MOD_LVTH0: - value->rValue = model->BSIM3v32lvth0; + value->rValue = model->BSIM3v32lvth0; return(OK); case BSIM3v32_MOD_LUA: - value->rValue = model->BSIM3v32lua; + value->rValue = model->BSIM3v32lua; return(OK); case BSIM3v32_MOD_LUA1: - value->rValue = model->BSIM3v32lua1; + value->rValue = model->BSIM3v32lua1; return(OK); case BSIM3v32_MOD_LUB: - value->rValue = model->BSIM3v32lub; + value->rValue = model->BSIM3v32lub; return(OK); case BSIM3v32_MOD_LUB1: - value->rValue = model->BSIM3v32lub1; + value->rValue = model->BSIM3v32lub1; return(OK); case BSIM3v32_MOD_LUC: - value->rValue = model->BSIM3v32luc; + value->rValue = model->BSIM3v32luc; return(OK); case BSIM3v32_MOD_LUC1: - value->rValue = model->BSIM3v32luc1; + value->rValue = model->BSIM3v32luc1; return(OK); case BSIM3v32_MOD_LU0: value->rValue = model->BSIM3v32lu0; @@ -506,44 +506,44 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) value->rValue = model->BSIM3v32ldelta; return(OK); case BSIM3v32_MOD_LRDSW: - value->rValue = model->BSIM3v32lrdsw; - return(OK); + value->rValue = model->BSIM3v32lrdsw; + return(OK); case BSIM3v32_MOD_LPRWB: - value->rValue = model->BSIM3v32lprwb; - return(OK); + value->rValue = model->BSIM3v32lprwb; + return(OK); case BSIM3v32_MOD_LPRWG: - value->rValue = model->BSIM3v32lprwg; - return(OK); + value->rValue = model->BSIM3v32lprwg; + return(OK); case BSIM3v32_MOD_LPRT: - value->rValue = model->BSIM3v32lprt; - return(OK); + value->rValue = model->BSIM3v32lprt; + return(OK); case BSIM3v32_MOD_LETA0: - value->rValue = model->BSIM3v32leta0; - return(OK); + value->rValue = model->BSIM3v32leta0; + return(OK); case BSIM3v32_MOD_LETAB: - value->rValue = model->BSIM3v32letab; - return(OK); + value->rValue = model->BSIM3v32letab; + return(OK); case BSIM3v32_MOD_LPCLM: - value->rValue = model->BSIM3v32lpclm; - return(OK); + value->rValue = model->BSIM3v32lpclm; + return(OK); case BSIM3v32_MOD_LPDIBL1: - value->rValue = model->BSIM3v32lpdibl1; - return(OK); + value->rValue = model->BSIM3v32lpdibl1; + return(OK); case BSIM3v32_MOD_LPDIBL2: - value->rValue = model->BSIM3v32lpdibl2; - return(OK); + value->rValue = model->BSIM3v32lpdibl2; + return(OK); case BSIM3v32_MOD_LPDIBLB: - value->rValue = model->BSIM3v32lpdiblb; - return(OK); + value->rValue = model->BSIM3v32lpdiblb; + return(OK); case BSIM3v32_MOD_LPSCBE1: - value->rValue = model->BSIM3v32lpscbe1; - return(OK); + value->rValue = model->BSIM3v32lpscbe1; + return(OK); case BSIM3v32_MOD_LPSCBE2: - value->rValue = model->BSIM3v32lpscbe2; - return(OK); + value->rValue = model->BSIM3v32lpscbe2; + return(OK); case BSIM3v32_MOD_LPVAG: - value->rValue = model->BSIM3v32lpvag; - return(OK); + value->rValue = model->BSIM3v32lpvag; + return(OK); case BSIM3v32_MOD_LWR: value->rValue = model->BSIM3v32lwr; return(OK); @@ -609,7 +609,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) value->rValue = model->BSIM3v32lvoffcv; return(OK); - /* Width dependence */ + /* Width dependence */ case BSIM3v32_MOD_WCDSC : value->rValue = model->BSIM3v32wcdsc; return(OK); @@ -648,7 +648,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) return(OK); case BSIM3v32_MOD_WKETA: value->rValue = model->BSIM3v32wketa; - return(OK); + return(OK); case BSIM3v32_MOD_WNSUB: value->rValue = model->BSIM3v32wnsub; return(OK); @@ -700,50 +700,50 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) case BSIM3v32_MOD_WNLX: value->rValue = model->BSIM3v32wnlx; return(OK); - case BSIM3v32_MOD_WDVT0: + case BSIM3v32_MOD_WDVT0: value->rValue = model->BSIM3v32wdvt0; return(OK); - case BSIM3v32_MOD_WDVT1 : + case BSIM3v32_MOD_WDVT1 : value->rValue = model->BSIM3v32wdvt1; return(OK); - case BSIM3v32_MOD_WDVT2 : + case BSIM3v32_MOD_WDVT2 : value->rValue = model->BSIM3v32wdvt2; return(OK); - case BSIM3v32_MOD_WDVT0W : + case BSIM3v32_MOD_WDVT0W : value->rValue = model->BSIM3v32wdvt0w; return(OK); - case BSIM3v32_MOD_WDVT1W : + case BSIM3v32_MOD_WDVT1W : value->rValue = model->BSIM3v32wdvt1w; return(OK); - case BSIM3v32_MOD_WDVT2W : + case BSIM3v32_MOD_WDVT2W : value->rValue = model->BSIM3v32wdvt2w; return(OK); - case BSIM3v32_MOD_WDROUT : + case BSIM3v32_MOD_WDROUT : value->rValue = model->BSIM3v32wdrout; return(OK); - case BSIM3v32_MOD_WDSUB : + case BSIM3v32_MOD_WDSUB : value->rValue = model->BSIM3v32wdsub; return(OK); case BSIM3v32_MOD_WVTH0: - value->rValue = model->BSIM3v32wvth0; + value->rValue = model->BSIM3v32wvth0; return(OK); case BSIM3v32_MOD_WUA: - value->rValue = model->BSIM3v32wua; + value->rValue = model->BSIM3v32wua; return(OK); case BSIM3v32_MOD_WUA1: - value->rValue = model->BSIM3v32wua1; + value->rValue = model->BSIM3v32wua1; return(OK); case BSIM3v32_MOD_WUB: - value->rValue = model->BSIM3v32wub; + value->rValue = model->BSIM3v32wub; return(OK); case BSIM3v32_MOD_WUB1: - value->rValue = model->BSIM3v32wub1; + value->rValue = model->BSIM3v32wub1; return(OK); case BSIM3v32_MOD_WUC: - value->rValue = model->BSIM3v32wuc; + value->rValue = model->BSIM3v32wuc; return(OK); case BSIM3v32_MOD_WUC1: - value->rValue = model->BSIM3v32wuc1; + value->rValue = model->BSIM3v32wuc1; return(OK); case BSIM3v32_MOD_WU0: value->rValue = model->BSIM3v32wu0; @@ -758,44 +758,44 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) value->rValue = model->BSIM3v32wdelta; return(OK); case BSIM3v32_MOD_WRDSW: - value->rValue = model->BSIM3v32wrdsw; - return(OK); + value->rValue = model->BSIM3v32wrdsw; + return(OK); case BSIM3v32_MOD_WPRWB: - value->rValue = model->BSIM3v32wprwb; - return(OK); + value->rValue = model->BSIM3v32wprwb; + return(OK); case BSIM3v32_MOD_WPRWG: - value->rValue = model->BSIM3v32wprwg; - return(OK); + value->rValue = model->BSIM3v32wprwg; + return(OK); case BSIM3v32_MOD_WPRT: - value->rValue = model->BSIM3v32wprt; - return(OK); + value->rValue = model->BSIM3v32wprt; + return(OK); case BSIM3v32_MOD_WETA0: - value->rValue = model->BSIM3v32weta0; - return(OK); + value->rValue = model->BSIM3v32weta0; + return(OK); case BSIM3v32_MOD_WETAB: - value->rValue = model->BSIM3v32wetab; - return(OK); + value->rValue = model->BSIM3v32wetab; + return(OK); case BSIM3v32_MOD_WPCLM: - value->rValue = model->BSIM3v32wpclm; - return(OK); + value->rValue = model->BSIM3v32wpclm; + return(OK); case BSIM3v32_MOD_WPDIBL1: - value->rValue = model->BSIM3v32wpdibl1; - return(OK); + value->rValue = model->BSIM3v32wpdibl1; + return(OK); case BSIM3v32_MOD_WPDIBL2: - value->rValue = model->BSIM3v32wpdibl2; - return(OK); + value->rValue = model->BSIM3v32wpdibl2; + return(OK); case BSIM3v32_MOD_WPDIBLB: - value->rValue = model->BSIM3v32wpdiblb; - return(OK); + value->rValue = model->BSIM3v32wpdiblb; + return(OK); case BSIM3v32_MOD_WPSCBE1: - value->rValue = model->BSIM3v32wpscbe1; - return(OK); + value->rValue = model->BSIM3v32wpscbe1; + return(OK); case BSIM3v32_MOD_WPSCBE2: - value->rValue = model->BSIM3v32wpscbe2; - return(OK); + value->rValue = model->BSIM3v32wpscbe2; + return(OK); case BSIM3v32_MOD_WPVAG: - value->rValue = model->BSIM3v32wpvag; - return(OK); + value->rValue = model->BSIM3v32wpvag; + return(OK); case BSIM3v32_MOD_WWR: value->rValue = model->BSIM3v32wwr; return(OK); @@ -861,7 +861,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) value->rValue = model->BSIM3v32wvoffcv; return(OK); - /* Cross-term dependence */ + /* Cross-term dependence */ case BSIM3v32_MOD_PCDSC : value->rValue = model->BSIM3v32pcdsc; return(OK); @@ -900,7 +900,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) return(OK); case BSIM3v32_MOD_PKETA: value->rValue = model->BSIM3v32pketa; - return(OK); + return(OK); case BSIM3v32_MOD_PNSUB: value->rValue = model->BSIM3v32pnsub; return(OK); @@ -952,50 +952,50 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) case BSIM3v32_MOD_PNLX: value->rValue = model->BSIM3v32pnlx; return(OK); - case BSIM3v32_MOD_PDVT0 : + case BSIM3v32_MOD_PDVT0 : value->rValue = model->BSIM3v32pdvt0; return(OK); - case BSIM3v32_MOD_PDVT1 : + case BSIM3v32_MOD_PDVT1 : value->rValue = model->BSIM3v32pdvt1; return(OK); - case BSIM3v32_MOD_PDVT2 : + case BSIM3v32_MOD_PDVT2 : value->rValue = model->BSIM3v32pdvt2; return(OK); - case BSIM3v32_MOD_PDVT0W : + case BSIM3v32_MOD_PDVT0W : value->rValue = model->BSIM3v32pdvt0w; return(OK); - case BSIM3v32_MOD_PDVT1W : + case BSIM3v32_MOD_PDVT1W : value->rValue = model->BSIM3v32pdvt1w; return(OK); - case BSIM3v32_MOD_PDVT2W : - value->rValue = model->BSIM3v32pdvt2w; + case BSIM3v32_MOD_PDVT2W : + value->rValue = model->BSIM3v32pdvt2w; return(OK); - case BSIM3v32_MOD_PDROUT : - value->rValue = model->BSIM3v32pdrout; + case BSIM3v32_MOD_PDROUT : + value->rValue = model->BSIM3v32pdrout; return(OK); - case BSIM3v32_MOD_PDSUB : - value->rValue = model->BSIM3v32pdsub; + case BSIM3v32_MOD_PDSUB : + value->rValue = model->BSIM3v32pdsub; return(OK); case BSIM3v32_MOD_PVTH0: - value->rValue = model->BSIM3v32pvth0; + value->rValue = model->BSIM3v32pvth0; return(OK); case BSIM3v32_MOD_PUA: - value->rValue = model->BSIM3v32pua; + value->rValue = model->BSIM3v32pua; return(OK); case BSIM3v32_MOD_PUA1: - value->rValue = model->BSIM3v32pua1; + value->rValue = model->BSIM3v32pua1; return(OK); case BSIM3v32_MOD_PUB: - value->rValue = model->BSIM3v32pub; + value->rValue = model->BSIM3v32pub; return(OK); case BSIM3v32_MOD_PUB1: - value->rValue = model->BSIM3v32pub1; + value->rValue = model->BSIM3v32pub1; return(OK); case BSIM3v32_MOD_PUC: - value->rValue = model->BSIM3v32puc; + value->rValue = model->BSIM3v32puc; return(OK); case BSIM3v32_MOD_PUC1: - value->rValue = model->BSIM3v32puc1; + value->rValue = model->BSIM3v32puc1; return(OK); case BSIM3v32_MOD_PU0: value->rValue = model->BSIM3v32pu0; @@ -1010,44 +1010,44 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) value->rValue = model->BSIM3v32pdelta; return(OK); case BSIM3v32_MOD_PRDSW: - value->rValue = model->BSIM3v32prdsw; - return(OK); + value->rValue = model->BSIM3v32prdsw; + return(OK); case BSIM3v32_MOD_PPRWB: - value->rValue = model->BSIM3v32pprwb; - return(OK); + value->rValue = model->BSIM3v32pprwb; + return(OK); case BSIM3v32_MOD_PPRWG: - value->rValue = model->BSIM3v32pprwg; - return(OK); + value->rValue = model->BSIM3v32pprwg; + return(OK); case BSIM3v32_MOD_PPRT: - value->rValue = model->BSIM3v32pprt; - return(OK); + value->rValue = model->BSIM3v32pprt; + return(OK); case BSIM3v32_MOD_PETA0: - value->rValue = model->BSIM3v32peta0; - return(OK); + value->rValue = model->BSIM3v32peta0; + return(OK); case BSIM3v32_MOD_PETAB: - value->rValue = model->BSIM3v32petab; - return(OK); + value->rValue = model->BSIM3v32petab; + return(OK); case BSIM3v32_MOD_PPCLM: - value->rValue = model->BSIM3v32ppclm; - return(OK); + value->rValue = model->BSIM3v32ppclm; + return(OK); case BSIM3v32_MOD_PPDIBL1: - value->rValue = model->BSIM3v32ppdibl1; - return(OK); + value->rValue = model->BSIM3v32ppdibl1; + return(OK); case BSIM3v32_MOD_PPDIBL2: - value->rValue = model->BSIM3v32ppdibl2; - return(OK); + value->rValue = model->BSIM3v32ppdibl2; + return(OK); case BSIM3v32_MOD_PPDIBLB: - value->rValue = model->BSIM3v32ppdiblb; - return(OK); + value->rValue = model->BSIM3v32ppdiblb; + return(OK); case BSIM3v32_MOD_PPSCBE1: - value->rValue = model->BSIM3v32ppscbe1; - return(OK); + value->rValue = model->BSIM3v32ppscbe1; + return(OK); case BSIM3v32_MOD_PPSCBE2: - value->rValue = model->BSIM3v32ppscbe2; - return(OK); + value->rValue = model->BSIM3v32ppscbe2; + return(OK); case BSIM3v32_MOD_PPVAG: - value->rValue = model->BSIM3v32ppvag; - return(OK); + value->rValue = model->BSIM3v32ppvag; + return(OK); case BSIM3v32_MOD_PWR: value->rValue = model->BSIM3v32pwr; return(OK); @@ -1114,64 +1114,64 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) return(OK); case BSIM3v32_MOD_TNOM : - value->rValue = model->BSIM3v32tnom; + value->rValue = model->BSIM3v32tnom; return(OK); case BSIM3v32_MOD_CGSO: - value->rValue = model->BSIM3v32cgso; + value->rValue = model->BSIM3v32cgso; return(OK); case BSIM3v32_MOD_CGDO: - value->rValue = model->BSIM3v32cgdo; + value->rValue = model->BSIM3v32cgdo; return(OK); case BSIM3v32_MOD_CGBO: - value->rValue = model->BSIM3v32cgbo; + value->rValue = model->BSIM3v32cgbo; return(OK); case BSIM3v32_MOD_XPART: - value->rValue = model->BSIM3v32xpart; + value->rValue = model->BSIM3v32xpart; return(OK); case BSIM3v32_MOD_RSH: - value->rValue = model->BSIM3v32sheetResistance; + value->rValue = model->BSIM3v32sheetResistance; return(OK); case BSIM3v32_MOD_JS: - value->rValue = model->BSIM3v32jctSatCurDensity; + value->rValue = model->BSIM3v32jctSatCurDensity; return(OK); case BSIM3v32_MOD_JSW: - value->rValue = model->BSIM3v32jctSidewallSatCurDensity; + value->rValue = model->BSIM3v32jctSidewallSatCurDensity; return(OK); case BSIM3v32_MOD_PB: - value->rValue = model->BSIM3v32bulkJctPotential; + value->rValue = model->BSIM3v32bulkJctPotential; return(OK); case BSIM3v32_MOD_MJ: - value->rValue = model->BSIM3v32bulkJctBotGradingCoeff; + value->rValue = model->BSIM3v32bulkJctBotGradingCoeff; return(OK); case BSIM3v32_MOD_PBSW: - value->rValue = model->BSIM3v32sidewallJctPotential; + value->rValue = model->BSIM3v32sidewallJctPotential; return(OK); case BSIM3v32_MOD_MJSW: - value->rValue = model->BSIM3v32bulkJctSideGradingCoeff; + value->rValue = model->BSIM3v32bulkJctSideGradingCoeff; return(OK); case BSIM3v32_MOD_CJ: - value->rValue = model->BSIM3v32unitAreaJctCap; + value->rValue = model->BSIM3v32unitAreaJctCap; return(OK); case BSIM3v32_MOD_CJSW: - value->rValue = model->BSIM3v32unitLengthSidewallJctCap; + value->rValue = model->BSIM3v32unitLengthSidewallJctCap; return(OK); case BSIM3v32_MOD_PBSWG: - value->rValue = model->BSIM3v32GatesidewallJctPotential; + value->rValue = model->BSIM3v32GatesidewallJctPotential; return(OK); case BSIM3v32_MOD_MJSWG: - value->rValue = model->BSIM3v32bulkJctGateSideGradingCoeff; + value->rValue = model->BSIM3v32bulkJctGateSideGradingCoeff; return(OK); case BSIM3v32_MOD_CJSWG: - value->rValue = model->BSIM3v32unitLengthGateSidewallJctCap; + value->rValue = model->BSIM3v32unitLengthGateSidewallJctCap; return(OK); case BSIM3v32_MOD_NJ: - value->rValue = model->BSIM3v32jctEmissionCoeff; + value->rValue = model->BSIM3v32jctEmissionCoeff; return(OK); case BSIM3v32_MOD_XTI: - value->rValue = model->BSIM3v32jctTempExponent; + value->rValue = model->BSIM3v32jctTempExponent; return(OK); case BSIM3v32_MOD_LINT: - value->rValue = model->BSIM3v32Lint; + value->rValue = model->BSIM3v32Lint; return(OK); case BSIM3v32_MOD_LL: value->rValue = model->BSIM3v32Ll; @@ -1238,11 +1238,11 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) return(OK); case BSIM3v32_MOD_XL: - value->rValue = model->BSIM3v32xl; - return(OK); + value->rValue = model->BSIM3v32xl; + return(OK); case BSIM3v32_MOD_XW: - value->rValue = model->BSIM3v32xw; - return(OK); + value->rValue = model->BSIM3v32xw; + return(OK); case BSIM3v32_MOD_NOIA: value->rValue = model->BSIM3v32oxideTrapDensityA; diff --git a/src/spicelib/devices/bsim3v32/b3v32mdel.c b/src/spicelib/devices/bsim3v32/b3v32mdel.c index 27f437819..2558d7bfe 100644 --- a/src/spicelib/devices/bsim3v32/b3v32mdel.c +++ b/src/spicelib/devices/bsim3v32/b3v32mdel.c @@ -3,7 +3,7 @@ /********** * Copyright 2001 Regents of the University of California. All rights reserved. * File: b3mdel.c of BSIM3v3.2.4 - * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1995 Min-Chie Jeng and Mansun Chan. * Author: 1997-1999 Weidong Liu. * Author: 2001 Xuemei Xi * Modified by Paolo Nenzi 2002 @@ -24,10 +24,10 @@ BSIM3v32instance *prev = NULL; BSIM3v32model **oldmod; oldmod = model; - for (; *model ; model = &((*model)->BSIM3v32nextModel)) - { if ((*model)->BSIM3v32modName == modname || + for (; *model ; model = &((*model)->BSIM3v32nextModel)) + { if ((*model)->BSIM3v32modName == modname || (modfast && *model == modfast)) - goto delgot; + goto delgot; oldmod = model; } return(E_NOMOD); @@ -44,4 +44,3 @@ delgot: } - diff --git a/src/spicelib/devices/bsim3v32/b3v32mpar.c b/src/spicelib/devices/bsim3v32/b3v32mpar.c index d35d51ba4..6ca123156 100644 --- a/src/spicelib/devices/bsim3v32/b3v32mpar.c +++ b/src/spicelib/devices/bsim3v32/b3v32mpar.c @@ -3,7 +3,7 @@ /********** * Copyright 2001 Regents of the University of California. All rights reserved. * File: b3mpar.c of BSIM3v3.2.4 - * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1995 Min-Chie Jeng and Mansun Chan. * Author: 1997-1999 Weidong Liu. * Author: 2001 Xuemei Xi * Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 @@ -92,12 +92,12 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) mod->BSIM3v32a0 = value->rValue; mod->BSIM3v32a0Given = TRUE; break; - + case BSIM3v32_MOD_AGS: mod->BSIM3v32ags= value->rValue; mod->BSIM3v32agsGiven = TRUE; break; - + case BSIM3v32_MOD_A1: mod->BSIM3v32a1 = value->rValue; mod->BSIM3v32a1Given = TRUE; @@ -113,7 +113,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_KETA: mod->BSIM3v32keta = value->rValue; mod->BSIM3v32ketaGiven = TRUE; - break; + break; case BSIM3v32_MOD_NSUB: mod->BSIM3v32nsub = value->rValue; mod->BSIM3v32nsubGiven = TRUE; @@ -121,14 +121,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_NPEAK: mod->BSIM3v32npeak = value->rValue; mod->BSIM3v32npeakGiven = TRUE; - if (mod->BSIM3v32npeak > 1.0e20) - mod->BSIM3v32npeak *= 1.0e-6; + if (mod->BSIM3v32npeak > 1.0e20) + mod->BSIM3v32npeak *= 1.0e-6; break; case BSIM3v32_MOD_NGATE: mod->BSIM3v32ngate = value->rValue; mod->BSIM3v32ngateGiven = TRUE; - if (mod->BSIM3v32ngate > 1.0e23) - mod->BSIM3v32ngate *= 1.0e-6; + if (mod->BSIM3v32ngate > 1.0e23) + mod->BSIM3v32ngate *= 1.0e-6; break; case BSIM3v32_MOD_GAMMA1: mod->BSIM3v32gamma1 = value->rValue; @@ -186,35 +186,35 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) mod->BSIM3v32w0 = value->rValue; mod->BSIM3v32w0Given = TRUE; break; - case BSIM3v32_MOD_DVT0: + case BSIM3v32_MOD_DVT0: mod->BSIM3v32dvt0 = value->rValue; mod->BSIM3v32dvt0Given = TRUE; break; - case BSIM3v32_MOD_DVT1: + case BSIM3v32_MOD_DVT1: mod->BSIM3v32dvt1 = value->rValue; mod->BSIM3v32dvt1Given = TRUE; break; - case BSIM3v32_MOD_DVT2: + case BSIM3v32_MOD_DVT2: mod->BSIM3v32dvt2 = value->rValue; mod->BSIM3v32dvt2Given = TRUE; break; - case BSIM3v32_MOD_DVT0W: + case BSIM3v32_MOD_DVT0W: mod->BSIM3v32dvt0w = value->rValue; mod->BSIM3v32dvt0wGiven = TRUE; break; - case BSIM3v32_MOD_DVT1W: + case BSIM3v32_MOD_DVT1W: mod->BSIM3v32dvt1w = value->rValue; mod->BSIM3v32dvt1wGiven = TRUE; break; - case BSIM3v32_MOD_DVT2W: + case BSIM3v32_MOD_DVT2W: mod->BSIM3v32dvt2w = value->rValue; mod->BSIM3v32dvt2wGiven = TRUE; break; - case BSIM3v32_MOD_DROUT: + case BSIM3v32_MOD_DROUT: mod->BSIM3v32drout = value->rValue; mod->BSIM3v32droutGiven = TRUE; break; - case BSIM3v32_MOD_DSUB: + case BSIM3v32_MOD_DSUB: mod->BSIM3v32dsub = value->rValue; mod->BSIM3v32dsubGiven = TRUE; break; @@ -265,55 +265,55 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_RDSW: mod->BSIM3v32rdsw = value->rValue; mod->BSIM3v32rdswGiven = TRUE; - break; + break; case BSIM3v32_MOD_PRWG: mod->BSIM3v32prwg = value->rValue; mod->BSIM3v32prwgGiven = TRUE; - break; + break; case BSIM3v32_MOD_PRWB: mod->BSIM3v32prwb = value->rValue; mod->BSIM3v32prwbGiven = TRUE; - break; + break; case BSIM3v32_MOD_PRT: mod->BSIM3v32prt = value->rValue; mod->BSIM3v32prtGiven = TRUE; - break; + break; case BSIM3v32_MOD_ETA0: mod->BSIM3v32eta0 = value->rValue; mod->BSIM3v32eta0Given = TRUE; - break; + break; case BSIM3v32_MOD_ETAB: mod->BSIM3v32etab = value->rValue; mod->BSIM3v32etabGiven = TRUE; - break; + break; case BSIM3v32_MOD_PCLM: mod->BSIM3v32pclm = value->rValue; mod->BSIM3v32pclmGiven = TRUE; - break; + break; case BSIM3v32_MOD_PDIBL1: mod->BSIM3v32pdibl1 = value->rValue; mod->BSIM3v32pdibl1Given = TRUE; - break; + break; case BSIM3v32_MOD_PDIBL2: mod->BSIM3v32pdibl2 = value->rValue; mod->BSIM3v32pdibl2Given = TRUE; - break; + break; case BSIM3v32_MOD_PDIBLB: mod->BSIM3v32pdiblb = value->rValue; mod->BSIM3v32pdiblbGiven = TRUE; - break; + break; case BSIM3v32_MOD_PSCBE1: mod->BSIM3v32pscbe1 = value->rValue; mod->BSIM3v32pscbe1Given = TRUE; - break; + break; case BSIM3v32_MOD_PSCBE2: mod->BSIM3v32pscbe2 = value->rValue; mod->BSIM3v32pscbe2Given = TRUE; - break; + break; case BSIM3v32_MOD_PVAG: mod->BSIM3v32pvag = value->rValue; mod->BSIM3v32pvagGiven = TRUE; - break; + break; case BSIM3v32_MOD_WR : mod->BSIM3v32wr = value->rValue; mod->BSIM3v32wrGiven = TRUE; @@ -466,7 +466,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) mod->BSIM3v32rscGiven = TRUE; break; - /* Length dependence */ + /* Length dependence */ case BSIM3v32_MOD_LCDSC : mod->BSIM3v32lcdsc = value->rValue; mod->BSIM3v32lcdscGiven = TRUE; @@ -497,8 +497,8 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) mod->BSIM3v32lvsat = value->rValue; mod->BSIM3v32lvsatGiven = TRUE; break; - - + + case BSIM3v32_MOD_LA0: mod->BSIM3v32la0 = value->rValue; mod->BSIM3v32la0Given = TRUE; @@ -522,7 +522,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_LKETA: mod->BSIM3v32lketa = value->rValue; mod->BSIM3v32lketaGiven = TRUE; - break; + break; case BSIM3v32_MOD_LNSUB: mod->BSIM3v32lnsub = value->rValue; mod->BSIM3v32lnsubGiven = TRUE; @@ -530,14 +530,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_LNPEAK: mod->BSIM3v32lnpeak = value->rValue; mod->BSIM3v32lnpeakGiven = TRUE; - if (mod->BSIM3v32lnpeak > 1.0e20) - mod->BSIM3v32lnpeak *= 1.0e-6; + if (mod->BSIM3v32lnpeak > 1.0e20) + mod->BSIM3v32lnpeak *= 1.0e-6; break; case BSIM3v32_MOD_LNGATE: mod->BSIM3v32lngate = value->rValue; mod->BSIM3v32lngateGiven = TRUE; - if (mod->BSIM3v32lngate > 1.0e23) - mod->BSIM3v32lngate *= 1.0e-6; + if (mod->BSIM3v32lngate > 1.0e23) + mod->BSIM3v32lngate *= 1.0e-6; break; case BSIM3v32_MOD_LGAMMA1: mod->BSIM3v32lgamma1 = value->rValue; @@ -595,35 +595,35 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) mod->BSIM3v32lw0 = value->rValue; mod->BSIM3v32lw0Given = TRUE; break; - case BSIM3v32_MOD_LDVT0: + case BSIM3v32_MOD_LDVT0: mod->BSIM3v32ldvt0 = value->rValue; mod->BSIM3v32ldvt0Given = TRUE; break; - case BSIM3v32_MOD_LDVT1: + case BSIM3v32_MOD_LDVT1: mod->BSIM3v32ldvt1 = value->rValue; mod->BSIM3v32ldvt1Given = TRUE; break; - case BSIM3v32_MOD_LDVT2: + case BSIM3v32_MOD_LDVT2: mod->BSIM3v32ldvt2 = value->rValue; mod->BSIM3v32ldvt2Given = TRUE; break; - case BSIM3v32_MOD_LDVT0W: + case BSIM3v32_MOD_LDVT0W: mod->BSIM3v32ldvt0w = value->rValue; mod->BSIM3v32ldvt0wGiven = TRUE; break; - case BSIM3v32_MOD_LDVT1W: + case BSIM3v32_MOD_LDVT1W: mod->BSIM3v32ldvt1w = value->rValue; mod->BSIM3v32ldvt1wGiven = TRUE; break; - case BSIM3v32_MOD_LDVT2W: + case BSIM3v32_MOD_LDVT2W: mod->BSIM3v32ldvt2w = value->rValue; mod->BSIM3v32ldvt2wGiven = TRUE; break; - case BSIM3v32_MOD_LDROUT: + case BSIM3v32_MOD_LDROUT: mod->BSIM3v32ldrout = value->rValue; mod->BSIM3v32ldroutGiven = TRUE; break; - case BSIM3v32_MOD_LDSUB: + case BSIM3v32_MOD_LDSUB: mod->BSIM3v32ldsub = value->rValue; mod->BSIM3v32ldsubGiven = TRUE; break; @@ -674,55 +674,55 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_LRDSW: mod->BSIM3v32lrdsw = value->rValue; mod->BSIM3v32lrdswGiven = TRUE; - break; + break; case BSIM3v32_MOD_LPRWB: mod->BSIM3v32lprwb = value->rValue; mod->BSIM3v32lprwbGiven = TRUE; - break; + break; case BSIM3v32_MOD_LPRWG: mod->BSIM3v32lprwg = value->rValue; mod->BSIM3v32lprwgGiven = TRUE; - break; + break; case BSIM3v32_MOD_LPRT: mod->BSIM3v32lprt = value->rValue; mod->BSIM3v32lprtGiven = TRUE; - break; + break; case BSIM3v32_MOD_LETA0: mod->BSIM3v32leta0 = value->rValue; mod->BSIM3v32leta0Given = TRUE; - break; + break; case BSIM3v32_MOD_LETAB: mod->BSIM3v32letab = value->rValue; mod->BSIM3v32letabGiven = TRUE; - break; + break; case BSIM3v32_MOD_LPCLM: mod->BSIM3v32lpclm = value->rValue; mod->BSIM3v32lpclmGiven = TRUE; - break; + break; case BSIM3v32_MOD_LPDIBL1: mod->BSIM3v32lpdibl1 = value->rValue; mod->BSIM3v32lpdibl1Given = TRUE; - break; + break; case BSIM3v32_MOD_LPDIBL2: mod->BSIM3v32lpdibl2 = value->rValue; mod->BSIM3v32lpdibl2Given = TRUE; - break; + break; case BSIM3v32_MOD_LPDIBLB: mod->BSIM3v32lpdiblb = value->rValue; mod->BSIM3v32lpdiblbGiven = TRUE; - break; + break; case BSIM3v32_MOD_LPSCBE1: mod->BSIM3v32lpscbe1 = value->rValue; mod->BSIM3v32lpscbe1Given = TRUE; - break; + break; case BSIM3v32_MOD_LPSCBE2: mod->BSIM3v32lpscbe2 = value->rValue; mod->BSIM3v32lpscbe2Given = TRUE; - break; + break; case BSIM3v32_MOD_LPVAG: mod->BSIM3v32lpvag = value->rValue; mod->BSIM3v32lpvagGiven = TRUE; - break; + break; case BSIM3v32_MOD_LWR : mod->BSIM3v32lwr = value->rValue; mod->BSIM3v32lwrGiven = TRUE; @@ -809,13 +809,13 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) mod->BSIM3v32lvoffcvGiven = TRUE; break; - /* Width dependence */ + /* Width dependence */ case BSIM3v32_MOD_WCDSC : mod->BSIM3v32wcdsc = value->rValue; mod->BSIM3v32wcdscGiven = TRUE; break; - - + + case BSIM3v32_MOD_WCDSCB : mod->BSIM3v32wcdscb = value->rValue; mod->BSIM3v32wcdscbGiven = TRUE; @@ -865,7 +865,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_WKETA: mod->BSIM3v32wketa = value->rValue; mod->BSIM3v32wketaGiven = TRUE; - break; + break; case BSIM3v32_MOD_WNSUB: mod->BSIM3v32wnsub = value->rValue; mod->BSIM3v32wnsubGiven = TRUE; @@ -873,14 +873,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_WNPEAK: mod->BSIM3v32wnpeak = value->rValue; mod->BSIM3v32wnpeakGiven = TRUE; - if (mod->BSIM3v32wnpeak > 1.0e20) - mod->BSIM3v32wnpeak *= 1.0e-6; + if (mod->BSIM3v32wnpeak > 1.0e20) + mod->BSIM3v32wnpeak *= 1.0e-6; break; case BSIM3v32_MOD_WNGATE: mod->BSIM3v32wngate = value->rValue; mod->BSIM3v32wngateGiven = TRUE; - if (mod->BSIM3v32wngate > 1.0e23) - mod->BSIM3v32wngate *= 1.0e-6; + if (mod->BSIM3v32wngate > 1.0e23) + mod->BSIM3v32wngate *= 1.0e-6; break; case BSIM3v32_MOD_WGAMMA1: mod->BSIM3v32wgamma1 = value->rValue; @@ -938,35 +938,35 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) mod->BSIM3v32ww0 = value->rValue; mod->BSIM3v32ww0Given = TRUE; break; - case BSIM3v32_MOD_WDVT0: + case BSIM3v32_MOD_WDVT0: mod->BSIM3v32wdvt0 = value->rValue; mod->BSIM3v32wdvt0Given = TRUE; break; - case BSIM3v32_MOD_WDVT1: + case BSIM3v32_MOD_WDVT1: mod->BSIM3v32wdvt1 = value->rValue; mod->BSIM3v32wdvt1Given = TRUE; break; - case BSIM3v32_MOD_WDVT2: + case BSIM3v32_MOD_WDVT2: mod->BSIM3v32wdvt2 = value->rValue; mod->BSIM3v32wdvt2Given = TRUE; break; - case BSIM3v32_MOD_WDVT0W: + case BSIM3v32_MOD_WDVT0W: mod->BSIM3v32wdvt0w = value->rValue; mod->BSIM3v32wdvt0wGiven = TRUE; break; - case BSIM3v32_MOD_WDVT1W: + case BSIM3v32_MOD_WDVT1W: mod->BSIM3v32wdvt1w = value->rValue; mod->BSIM3v32wdvt1wGiven = TRUE; break; - case BSIM3v32_MOD_WDVT2W: + case BSIM3v32_MOD_WDVT2W: mod->BSIM3v32wdvt2w = value->rValue; mod->BSIM3v32wdvt2wGiven = TRUE; break; - case BSIM3v32_MOD_WDROUT: + case BSIM3v32_MOD_WDROUT: mod->BSIM3v32wdrout = value->rValue; mod->BSIM3v32wdroutGiven = TRUE; break; - case BSIM3v32_MOD_WDSUB: + case BSIM3v32_MOD_WDSUB: mod->BSIM3v32wdsub = value->rValue; mod->BSIM3v32wdsubGiven = TRUE; break; @@ -1017,55 +1017,55 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_WRDSW: mod->BSIM3v32wrdsw = value->rValue; mod->BSIM3v32wrdswGiven = TRUE; - break; + break; case BSIM3v32_MOD_WPRWB: mod->BSIM3v32wprwb = value->rValue; mod->BSIM3v32wprwbGiven = TRUE; - break; + break; case BSIM3v32_MOD_WPRWG: mod->BSIM3v32wprwg = value->rValue; mod->BSIM3v32wprwgGiven = TRUE; - break; + break; case BSIM3v32_MOD_WPRT: mod->BSIM3v32wprt = value->rValue; mod->BSIM3v32wprtGiven = TRUE; - break; + break; case BSIM3v32_MOD_WETA0: mod->BSIM3v32weta0 = value->rValue; mod->BSIM3v32weta0Given = TRUE; - break; + break; case BSIM3v32_MOD_WETAB: mod->BSIM3v32wetab = value->rValue; mod->BSIM3v32wetabGiven = TRUE; - break; + break; case BSIM3v32_MOD_WPCLM: mod->BSIM3v32wpclm = value->rValue; mod->BSIM3v32wpclmGiven = TRUE; - break; + break; case BSIM3v32_MOD_WPDIBL1: mod->BSIM3v32wpdibl1 = value->rValue; mod->BSIM3v32wpdibl1Given = TRUE; - break; + break; case BSIM3v32_MOD_WPDIBL2: mod->BSIM3v32wpdibl2 = value->rValue; mod->BSIM3v32wpdibl2Given = TRUE; - break; + break; case BSIM3v32_MOD_WPDIBLB: mod->BSIM3v32wpdiblb = value->rValue; mod->BSIM3v32wpdiblbGiven = TRUE; - break; + break; case BSIM3v32_MOD_WPSCBE1: mod->BSIM3v32wpscbe1 = value->rValue; mod->BSIM3v32wpscbe1Given = TRUE; - break; + break; case BSIM3v32_MOD_WPSCBE2: mod->BSIM3v32wpscbe2 = value->rValue; mod->BSIM3v32wpscbe2Given = TRUE; - break; + break; case BSIM3v32_MOD_WPVAG: mod->BSIM3v32wpvag = value->rValue; mod->BSIM3v32wpvagGiven = TRUE; - break; + break; case BSIM3v32_MOD_WWR : mod->BSIM3v32wwr = value->rValue; mod->BSIM3v32wwrGiven = TRUE; @@ -1152,7 +1152,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) mod->BSIM3v32wvoffcvGiven = TRUE; break; - /* Cross-term dependence */ + /* Cross-term dependence */ case BSIM3v32_MOD_PCDSC : mod->BSIM3v32pcdsc = value->rValue; mod->BSIM3v32pcdscGiven = TRUE; @@ -1208,7 +1208,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_PKETA: mod->BSIM3v32pketa = value->rValue; mod->BSIM3v32pketaGiven = TRUE; - break; + break; case BSIM3v32_MOD_PNSUB: mod->BSIM3v32pnsub = value->rValue; mod->BSIM3v32pnsubGiven = TRUE; @@ -1216,14 +1216,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_PNPEAK: mod->BSIM3v32pnpeak = value->rValue; mod->BSIM3v32pnpeakGiven = TRUE; - if (mod->BSIM3v32pnpeak > 1.0e20) - mod->BSIM3v32pnpeak *= 1.0e-6; + if (mod->BSIM3v32pnpeak > 1.0e20) + mod->BSIM3v32pnpeak *= 1.0e-6; break; case BSIM3v32_MOD_PNGATE: mod->BSIM3v32pngate = value->rValue; mod->BSIM3v32pngateGiven = TRUE; - if (mod->BSIM3v32pngate > 1.0e23) - mod->BSIM3v32pngate *= 1.0e-6; + if (mod->BSIM3v32pngate > 1.0e23) + mod->BSIM3v32pngate *= 1.0e-6; break; case BSIM3v32_MOD_PGAMMA1: mod->BSIM3v32pgamma1 = value->rValue; @@ -1281,35 +1281,35 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) mod->BSIM3v32pw0 = value->rValue; mod->BSIM3v32pw0Given = TRUE; break; - case BSIM3v32_MOD_PDVT0: + case BSIM3v32_MOD_PDVT0: mod->BSIM3v32pdvt0 = value->rValue; mod->BSIM3v32pdvt0Given = TRUE; break; - case BSIM3v32_MOD_PDVT1: + case BSIM3v32_MOD_PDVT1: mod->BSIM3v32pdvt1 = value->rValue; mod->BSIM3v32pdvt1Given = TRUE; break; - case BSIM3v32_MOD_PDVT2: + case BSIM3v32_MOD_PDVT2: mod->BSIM3v32pdvt2 = value->rValue; mod->BSIM3v32pdvt2Given = TRUE; break; - case BSIM3v32_MOD_PDVT0W: + case BSIM3v32_MOD_PDVT0W: mod->BSIM3v32pdvt0w = value->rValue; mod->BSIM3v32pdvt0wGiven = TRUE; break; - case BSIM3v32_MOD_PDVT1W: + case BSIM3v32_MOD_PDVT1W: mod->BSIM3v32pdvt1w = value->rValue; mod->BSIM3v32pdvt1wGiven = TRUE; break; - case BSIM3v32_MOD_PDVT2W: + case BSIM3v32_MOD_PDVT2W: mod->BSIM3v32pdvt2w = value->rValue; mod->BSIM3v32pdvt2wGiven = TRUE; break; - case BSIM3v32_MOD_PDROUT: + case BSIM3v32_MOD_PDROUT: mod->BSIM3v32pdrout = value->rValue; mod->BSIM3v32pdroutGiven = TRUE; break; - case BSIM3v32_MOD_PDSUB: + case BSIM3v32_MOD_PDSUB: mod->BSIM3v32pdsub = value->rValue; mod->BSIM3v32pdsubGiven = TRUE; break; @@ -1360,55 +1360,55 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod) case BSIM3v32_MOD_PRDSW: mod->BSIM3v32prdsw = value->rValue; mod->BSIM3v32prdswGiven = TRUE; - break; + break; case BSIM3v32_MOD_PPRWB: mod->BSIM3v32pprwb = value->rValue; mod->BSIM3v32pprwbGiven = TRUE; - break; + break; case BSIM3v32_MOD_PPRWG: mod->BSIM3v32pprwg = value->rValue; mod->BSIM3v32pprwgGiven = TRUE; - break; + break; case BSIM3v32_MOD_PPRT: mod->BSIM3v32pprt = value->rValue; mod->BSIM3v32pprtGiven = TRUE; - break; + break; case BSIM3v32_MOD_PETA0: mod->BSIM3v32peta0 = value->rValue; mod->BSIM3v32peta0Given = TRUE; - break; + break; case BSIM3v32_MOD_PETAB: mod->BSIM3v32petab = value->rValue; mod->BSIM3v32petabGiven = TRUE; - break; + break; case BSIM3v32_MOD_PPCLM: mod->BSIM3v32ppclm = value->rValue; mod->BSIM3v32ppclmGiven = TRUE; - break; + break; case BSIM3v32_MOD_PPDIBL1: mod->BSIM3v32ppdibl1 = value->rValue; mod->BSIM3v32ppdibl1Given = TRUE; - break; + break; case BSIM3v32_MOD_PPDIBL2: mod->BSIM3v32ppdibl2 = value->rValue; mod->BSIM3v32ppdibl2Given = TRUE; - break; + break; case BSIM3v32_MOD_PPDIBLB: mod->BSIM3v32ppdiblb = value->rValue; mod->BSIM3v32ppdiblbGiven = TRUE; - break; + break; case BSIM3v32_MOD_PPSCBE1: mod->BSIM3v32ppscbe1 = value->rValue; mod->BSIM3v32ppscbe1Given = TRUE; - break; + break; case BSIM3v32_MOD_PPSCBE2: mod->BSIM3v32ppscbe2 = value->rValue; mod->BSIM3v32ppscbe2Given = TRUE; - break; + break; case BSIM3v32_MOD_PPVAG: mod->BSIM3v32ppvag = value->rValue; mod->BSIM3v32ppvagGiven = TRUE; - break; + break; case BSIM3v32_MOD_PWR : mod->BSIM3v32pwr = value->rValue; mod->BSIM3v32pwrGiven = TRUE; diff --git a/src/spicelib/devices/bsim3v32/b3v32noi.c b/src/spicelib/devices/bsim3v32/b3v32noi.c index 5f56aedf6..7351a535e 100644 --- a/src/spicelib/devices/bsim3v32/b3v32noi.c +++ b/src/spicelib/devices/bsim3v32/b3v32noi.c @@ -45,7 +45,7 @@ */ -/* +/* * The StrongInversionNoiseEval function has been modified in * the release 3.2.4 of BSIM3v32 model. To accomodate both the old * and the new code, I have renamed according to the following: @@ -63,7 +63,7 @@ static double StrongInversionNoiseEvalNew(double Vds, BSIM3v32model *model, - BSIM3v32instance *here, double freq, double temp) + BSIM3v32instance *here, double freq, double temp) { struct bsim3v32SizeDependParam *pParam; double cd, esat, DelClm, EffFreq, N0, Nl; @@ -72,10 +72,10 @@ double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi; pParam = here->pParam; cd = fabs(here->BSIM3v32cd); esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff; - if(model->BSIM3v32em<=0.0) DelClm = 0.0; - else { - T0 = ((((Vds - here->BSIM3v32Vdseff) / pParam->BSIM3v32litl) - + model->BSIM3v32em) / esat); + if(model->BSIM3v32em<=0.0) DelClm = 0.0; + else { + T0 = ((((Vds - here->BSIM3v32Vdseff) / pParam->BSIM3v32litl) + + model->BSIM3v32em) / esat); DelClm = pParam->BSIM3v32litl * log (MAX(T0, N_MINLOG)); } EffFreq = pow(freq, model->BSIM3v32ef); @@ -84,7 +84,7 @@ double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi; * pParam->BSIM3v32leff * pParam->BSIM3v32leff; N0 = model->BSIM3v32cox * here->BSIM3v32Vgsteff / CHARGE; Nl = model->BSIM3v32cox * here->BSIM3v32Vgsteff - * (1.0 - here->BSIM3v32AbovVgst2Vtm * here->BSIM3v32Vdseff) / CHARGE; + * (1.0 - here->BSIM3v32AbovVgst2Vtm * here->BSIM3v32Vdseff) / CHARGE; T3 = model->BSIM3v32oxideTrapDensityA * log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG)); @@ -109,7 +109,7 @@ double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi; static double StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model, - BSIM3v32instance *here, double freq, double temp) + BSIM3v32instance *here, double freq, double temp) { struct bsim3v32SizeDependParam *pParam; double cd, esat, DelClm, EffFreq, N0, Nl, Vgst; @@ -124,7 +124,7 @@ StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model, { esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff; T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) + - model->BSIM3v32em) / esat); + model->BSIM3v32em) / esat); DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG)); } else @@ -132,13 +132,13 @@ StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model, } else { - if (model->BSIM3v32em <= 0.0) /* flicker noise modified -JX */ + if (model->BSIM3v32em <= 0.0) /* flicker noise modified -JX */ DelClm = 0.0; else if (vds > here->BSIM3v32vdsat) { esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff; T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) + - model->BSIM3v32em) / esat); + model->BSIM3v32em) / esat); DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG)); } else @@ -176,7 +176,7 @@ StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model, int BSIM3v32noise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt, - Ndata *data, double *OnDens) + Ndata *data, double *OnDens) { NOISEAN *job = (NOISEAN *) ckt->CKTcurJob; @@ -200,292 +200,292 @@ int i; /* define the names of the noise sources */ static char *BSIM3v32nNames[BSIM3v32NSRCS] = { /* Note that we have to keep the order */ - ".rd", /* noise due to rd */ - /* consistent with the index definitions */ - ".rs", /* noise due to rs */ - /* in BSIM3v32defs.h */ - ".id", /* noise due to id */ - ".1overf", /* flicker (1/f) noise */ - "" /* total transistor noise */ + ".rd", /* noise due to rd */ + /* consistent with the index definitions */ + ".rs", /* noise due to rs */ + /* in BSIM3v32defs.h */ + ".id", /* noise due to id */ + ".1overf", /* flicker (1/f) noise */ + "" /* total transistor noise */ }; for (; model != NULL; model = model->BSIM3v32nextModel) { for (here = model->BSIM3v32instances; here != NULL; - here = here->BSIM3v32nextInstance) - { pParam = here->pParam; - switch (operation) - { case N_OPEN: - /* see if we have to to produce a summary report */ - /* if so, name all the noise generators */ + here = here->BSIM3v32nextInstance) + { pParam = here->pParam; + switch (operation) + { case N_OPEN: + /* see if we have to to produce a summary report */ + /* if so, name all the noise generators */ - if (job->NStpsSm != 0) - { switch (mode) - { case N_DENS: - for (i = 0; i < BSIM3v32NSRCS; i++) - { (void) sprintf(name, "onoise.%s%s", - here->BSIM3v32name, - BSIM3v32nNames[i]); + if (job->NStpsSm != 0) + { switch (mode) + { case N_DENS: + for (i = 0; i < BSIM3v32NSRCS; i++) + { (void) sprintf(name, "onoise.%s%s", + here->BSIM3v32name, + BSIM3v32nNames[i]); data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1); if (!data->namelist) - return(E_NOMEM); - SPfrontEnd->IFnewUid (ckt, - &(data->namelist[data->numPlots++]), - NULL, name, UID_OTHER, - NULL); - /* we've added one more plot */ - } - break; - case INT_NOIZ: - for (i = 0; i < BSIM3v32NSRCS; i++) - { (void) sprintf(name, "onoise_total.%s%s", - here->BSIM3v32name, - BSIM3v32nNames[i]); + return(E_NOMEM); + SPfrontEnd->IFnewUid (ckt, + &(data->namelist[data->numPlots++]), + NULL, name, UID_OTHER, + NULL); + /* we've added one more plot */ + } + break; + case INT_NOIZ: + for (i = 0; i < BSIM3v32NSRCS; i++) + { (void) sprintf(name, "onoise_total.%s%s", + here->BSIM3v32name, + BSIM3v32nNames[i]); data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1); if (!data->namelist) - return(E_NOMEM); - SPfrontEnd->IFnewUid (ckt, - &(data->namelist[data->numPlots++]), - NULL, name, UID_OTHER, - NULL); - /* we've added one more plot */ + return(E_NOMEM); + SPfrontEnd->IFnewUid (ckt, + &(data->namelist[data->numPlots++]), + NULL, name, UID_OTHER, + NULL); + /* we've added one more plot */ - (void) sprintf(name, "inoise_total.%s%s", - here->BSIM3v32name, - BSIM3v32nNames[i]); + (void) sprintf(name, "inoise_total.%s%s", + here->BSIM3v32name, + BSIM3v32nNames[i]); data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1); if (!data->namelist) - return(E_NOMEM); - SPfrontEnd->IFnewUid (ckt, - &(data->namelist[data->numPlots++]), - NULL, name, UID_OTHER, - NULL); - /* we've added one more plot */ - } - break; - } - } - break; - case N_CALC: - m = here->BSIM3v32m; - switch (mode) - { case N_DENS: - NevalSrc(&noizDens[BSIM3v32RDNOIZ], - &lnNdens[BSIM3v32RDNOIZ], ckt, THERMNOISE, - here->BSIM3v32dNodePrime, here->BSIM3v32dNode, - here->BSIM3v32drainConductance * m); + return(E_NOMEM); + SPfrontEnd->IFnewUid (ckt, + &(data->namelist[data->numPlots++]), + NULL, name, UID_OTHER, + NULL); + /* we've added one more plot */ + } + break; + } + } + break; + case N_CALC: + m = here->BSIM3v32m; + switch (mode) + { case N_DENS: + NevalSrc(&noizDens[BSIM3v32RDNOIZ], + &lnNdens[BSIM3v32RDNOIZ], ckt, THERMNOISE, + here->BSIM3v32dNodePrime, here->BSIM3v32dNode, + here->BSIM3v32drainConductance * m); - NevalSrc(&noizDens[BSIM3v32RSNOIZ], - &lnNdens[BSIM3v32RSNOIZ], ckt, THERMNOISE, - here->BSIM3v32sNodePrime, here->BSIM3v32sNode, - here->BSIM3v32sourceConductance * m); + NevalSrc(&noizDens[BSIM3v32RSNOIZ], + &lnNdens[BSIM3v32RSNOIZ], ckt, THERMNOISE, + here->BSIM3v32sNodePrime, here->BSIM3v32sNode, + here->BSIM3v32sourceConductance * m); switch( model->BSIM3v32noiMod ) - { case 1: - case 3: - NevalSrc(&noizDens[BSIM3v32IDNOIZ], - &lnNdens[BSIM3v32IDNOIZ], ckt, - THERMNOISE, here->BSIM3v32dNodePrime, - here->BSIM3v32sNodePrime, + { case 1: + case 3: + NevalSrc(&noizDens[BSIM3v32IDNOIZ], + &lnNdens[BSIM3v32IDNOIZ], ckt, + THERMNOISE, here->BSIM3v32dNodePrime, + here->BSIM3v32sNodePrime, (2.0 / 3.0 * fabs(here->BSIM3v32gm - + here->BSIM3v32gds - + here->BSIM3v32gmbs)) * m); - break; - case 2: - case 4: - /* Added revision dependent code */ - if (model->BSIM3v32intVersion == BSIM3v32V324) - { - NevalSrc(&noizDens[BSIM3v32IDNOIZ], - &lnNdens[BSIM3v32IDNOIZ], ckt, - THERMNOISE, here->BSIM3v32dNodePrime, + + here->BSIM3v32gds + + here->BSIM3v32gmbs)) * m); + break; + case 2: + case 4: + /* Added revision dependent code */ + if (model->BSIM3v32intVersion == BSIM3v32V324) + { + NevalSrc(&noizDens[BSIM3v32IDNOIZ], + &lnNdens[BSIM3v32IDNOIZ], ckt, + THERMNOISE, here->BSIM3v32dNodePrime, here->BSIM3v32sNodePrime, - (m * here->BSIM3v32ueff - * fabs(here->BSIM3v32qinv) - / (pParam->BSIM3v32leff * pParam->BSIM3v32leff - + here->BSIM3v32ueff * fabs(here->BSIM3v32qinv) - * here->BSIM3v32rds))); /* bugfix */ - } - else - { /* for all versions lower then 3.2.4 */ - NevalSrc(&noizDens[BSIM3v32IDNOIZ], - &lnNdens[BSIM3v32IDNOIZ], ckt, - THERMNOISE, here->BSIM3v32dNodePrime, + (m * here->BSIM3v32ueff + * fabs(here->BSIM3v32qinv) + / (pParam->BSIM3v32leff * pParam->BSIM3v32leff + + here->BSIM3v32ueff * fabs(here->BSIM3v32qinv) + * here->BSIM3v32rds))); /* bugfix */ + } + else + { /* for all versions lower then 3.2.4 */ + NevalSrc(&noizDens[BSIM3v32IDNOIZ], + &lnNdens[BSIM3v32IDNOIZ], ckt, + THERMNOISE, here->BSIM3v32dNodePrime, here->BSIM3v32sNodePrime, - (m * here->BSIM3v32ueff - * fabs(here->BSIM3v32qinv - / (pParam->BSIM3v32leff - * pParam->BSIM3v32leff)))); - } - break; - } - NevalSrc(&noizDens[BSIM3v32FLNOIZ], NULL, - ckt, N_GAIN, here->BSIM3v32dNodePrime, - here->BSIM3v32sNodePrime, (double) 0.0); + (m * here->BSIM3v32ueff + * fabs(here->BSIM3v32qinv + / (pParam->BSIM3v32leff + * pParam->BSIM3v32leff)))); + } + break; + } + NevalSrc(&noizDens[BSIM3v32FLNOIZ], NULL, + ckt, N_GAIN, here->BSIM3v32dNodePrime, + here->BSIM3v32sNodePrime, (double) 0.0); switch( model->BSIM3v32noiMod ) - { case 1: - case 4: - noizDens[BSIM3v32FLNOIZ] *= m * model->BSIM3v32kf - * exp(model->BSIM3v32af - * log(MAX(fabs(here->BSIM3v32cd), - N_MINLOG))) - / (pow(data->freq, model->BSIM3v32ef) - * pParam->BSIM3v32leff - * pParam->BSIM3v32leff - * model->BSIM3v32cox); - break; - case 2: - case 3: - vgs = *(ckt->CKTstates[0] + here->BSIM3v32vgs); - vds = *(ckt->CKTstates[0] + here->BSIM3v32vds); - if (vds < 0.0) - { vds = -vds; - vgs = vgs + vds; - } - /* Added revision dependent code */ - if (model->BSIM3v32intVersion == BSIM3v32V324) - { - Ssi = StrongInversionNoiseEvalNew(vds, model, - here, data->freq, ckt->CKTtemp); - T10 = model->BSIM3v32oxideTrapDensityA - * 8.62e-5 * ckt->CKTtemp; - T11 = pParam->BSIM3v32weff - * pParam->BSIM3v32leff - * pow(data->freq, model->BSIM3v32ef) - * 4.0e36; - Swi = T10 / T11 * here->BSIM3v32cd - * here->BSIM3v32cd; - T1 = Swi + Ssi; - if (T1 > 0.0) - noizDens[BSIM3v32FLNOIZ] *= m * (Ssi * Swi) / T1; - else + { case 1: + case 4: + noizDens[BSIM3v32FLNOIZ] *= m * model->BSIM3v32kf + * exp(model->BSIM3v32af + * log(MAX(fabs(here->BSIM3v32cd), + N_MINLOG))) + / (pow(data->freq, model->BSIM3v32ef) + * pParam->BSIM3v32leff + * pParam->BSIM3v32leff + * model->BSIM3v32cox); + break; + case 2: + case 3: + vgs = *(ckt->CKTstates[0] + here->BSIM3v32vgs); + vds = *(ckt->CKTstates[0] + here->BSIM3v32vds); + if (vds < 0.0) + { vds = -vds; + vgs = vgs + vds; + } + /* Added revision dependent code */ + if (model->BSIM3v32intVersion == BSIM3v32V324) + { + Ssi = StrongInversionNoiseEvalNew(vds, model, + here, data->freq, ckt->CKTtemp); + T10 = model->BSIM3v32oxideTrapDensityA + * 8.62e-5 * ckt->CKTtemp; + T11 = pParam->BSIM3v32weff + * pParam->BSIM3v32leff + * pow(data->freq, model->BSIM3v32ef) + * 4.0e36; + Swi = T10 / T11 * here->BSIM3v32cd + * here->BSIM3v32cd; + T1 = Swi + Ssi; + if (T1 > 0.0) + noizDens[BSIM3v32FLNOIZ] *= m * (Ssi * Swi) / T1; + else noizDens[BSIM3v32FLNOIZ] *= 0.0; - } - else - { /* for all versions lower then 3.2.4 */ - if (vgs >= here->BSIM3v32von + 0.1) - { - Ssi = StrongInversionNoiseEvalOld(vgs, vds, model, - here, data->freq, ckt->CKTtemp); - noizDens[BSIM3v32FLNOIZ] *= m * Ssi; - } - else - { - pParam = here->pParam; - T10 = model->BSIM3v32oxideTrapDensityA - * 8.62e-5 * ckt->CKTtemp; - T11 = pParam->BSIM3v32weff - * pParam-> BSIM3v32leff - * pow (data->freq, model->BSIM3v32ef) - * 4.0e36; - Swi = T10 / T11 * here->BSIM3v32cd * here->BSIM3v32cd; + } + else + { /* for all versions lower then 3.2.4 */ + if (vgs >= here->BSIM3v32von + 0.1) + { + Ssi = StrongInversionNoiseEvalOld(vgs, vds, model, + here, data->freq, ckt->CKTtemp); + noizDens[BSIM3v32FLNOIZ] *= m * Ssi; + } + else + { + pParam = here->pParam; + T10 = model->BSIM3v32oxideTrapDensityA + * 8.62e-5 * ckt->CKTtemp; + T11 = pParam->BSIM3v32weff + * pParam-> BSIM3v32leff + * pow (data->freq, model->BSIM3v32ef) + * 4.0e36; + Swi = T10 / T11 * here->BSIM3v32cd * here->BSIM3v32cd; - Slimit = StrongInversionNoiseEvalOld( - here->BSIM3v32von + 0.1, vds, model, - here, data->freq, ckt->CKTtemp); - T1 = Swi + Slimit; - if (T1 > 0.0) - noizDens[BSIM3v32FLNOIZ] *= m * (Slimit * Swi) / T1; - else - noizDens[BSIM3v32FLNOIZ] *= 0.0; - } - } - break; - } - - lnNdens[BSIM3v32FLNOIZ] = - log(MAX(noizDens[BSIM3v32FLNOIZ], N_MINLOG)); - - noizDens[BSIM3v32TOTNOIZ] = noizDens[BSIM3v32RDNOIZ] - + noizDens[BSIM3v32RSNOIZ] - + noizDens[BSIM3v32IDNOIZ] - + noizDens[BSIM3v32FLNOIZ]; - lnNdens[BSIM3v32TOTNOIZ] = - log(MAX(noizDens[BSIM3v32TOTNOIZ], N_MINLOG)); + Slimit = StrongInversionNoiseEvalOld( + here->BSIM3v32von + 0.1, vds, model, + here, data->freq, ckt->CKTtemp); + T1 = Swi + Slimit; + if (T1 > 0.0) + noizDens[BSIM3v32FLNOIZ] *= m * (Slimit * Swi) / T1; + else + noizDens[BSIM3v32FLNOIZ] *= 0.0; + } + } + break; + } - *OnDens += noizDens[BSIM3v32TOTNOIZ]; + lnNdens[BSIM3v32FLNOIZ] = + log(MAX(noizDens[BSIM3v32FLNOIZ], N_MINLOG)); - if (data->delFreq == 0.0) - { /* if we haven't done any previous - integration, we need to initialize our - "history" variables. - */ + noizDens[BSIM3v32TOTNOIZ] = noizDens[BSIM3v32RDNOIZ] + + noizDens[BSIM3v32RSNOIZ] + + noizDens[BSIM3v32IDNOIZ] + + noizDens[BSIM3v32FLNOIZ]; + lnNdens[BSIM3v32TOTNOIZ] = + log(MAX(noizDens[BSIM3v32TOTNOIZ], N_MINLOG)); - for (i = 0; i < BSIM3v32NSRCS; i++) - { here->BSIM3v32nVar[LNLSTDENS][i] = - lnNdens[i]; - } + *OnDens += noizDens[BSIM3v32TOTNOIZ]; - /* clear out our integration variables - if it's the first pass - */ - if (data->freq == - job->NstartFreq) - { for (i = 0; i < BSIM3v32NSRCS; i++) - { here->BSIM3v32nVar[OUTNOIZ][i] = 0.0; - here->BSIM3v32nVar[INNOIZ][i] = 0.0; - } - } - } - else - { /* data->delFreq != 0.0, - we have to integrate. - */ - for (i = 0; i < BSIM3v32NSRCS; i++) - { if (i != BSIM3v32TOTNOIZ) - { tempOnoise = Nintegrate(noizDens[i], - lnNdens[i], - here->BSIM3v32nVar[LNLSTDENS][i], - data); - tempInoise = Nintegrate(noizDens[i] - * data->GainSqInv, lnNdens[i] - + data->lnGainInv, - here->BSIM3v32nVar[LNLSTDENS][i] - + data->lnGainInv, data); - here->BSIM3v32nVar[LNLSTDENS][i] = - lnNdens[i]; - data->outNoiz += tempOnoise; - data->inNoise += tempInoise; - if (job->NStpsSm != 0) - { here->BSIM3v32nVar[OUTNOIZ][i] - += tempOnoise; - here->BSIM3v32nVar[OUTNOIZ][BSIM3v32TOTNOIZ] - += tempOnoise; - here->BSIM3v32nVar[INNOIZ][i] - += tempInoise; - here->BSIM3v32nVar[INNOIZ][BSIM3v32TOTNOIZ] - += tempInoise; + if (data->delFreq == 0.0) + { /* if we haven't done any previous + integration, we need to initialize our + "history" variables. + */ + + for (i = 0; i < BSIM3v32NSRCS; i++) + { here->BSIM3v32nVar[LNLSTDENS][i] = + lnNdens[i]; + } + + /* clear out our integration variables + if it's the first pass + */ + if (data->freq == + job->NstartFreq) + { for (i = 0; i < BSIM3v32NSRCS; i++) + { here->BSIM3v32nVar[OUTNOIZ][i] = 0.0; + here->BSIM3v32nVar[INNOIZ][i] = 0.0; + } + } + } + else + { /* data->delFreq != 0.0, + we have to integrate. + */ + for (i = 0; i < BSIM3v32NSRCS; i++) + { if (i != BSIM3v32TOTNOIZ) + { tempOnoise = Nintegrate(noizDens[i], + lnNdens[i], + here->BSIM3v32nVar[LNLSTDENS][i], + data); + tempInoise = Nintegrate(noizDens[i] + * data->GainSqInv, lnNdens[i] + + data->lnGainInv, + here->BSIM3v32nVar[LNLSTDENS][i] + + data->lnGainInv, data); + here->BSIM3v32nVar[LNLSTDENS][i] = + lnNdens[i]; + data->outNoiz += tempOnoise; + data->inNoise += tempInoise; + if (job->NStpsSm != 0) + { here->BSIM3v32nVar[OUTNOIZ][i] + += tempOnoise; + here->BSIM3v32nVar[OUTNOIZ][BSIM3v32TOTNOIZ] + += tempOnoise; + here->BSIM3v32nVar[INNOIZ][i] + += tempInoise; + here->BSIM3v32nVar[INNOIZ][BSIM3v32TOTNOIZ] + += tempInoise; } - } - } - } - if (data->prtSummary) - { for (i = 0; i < BSIM3v32NSRCS; i++) - { /* print a summary report */ - data->outpVector[data->outNumber++] - = noizDens[i]; - } - } - break; - case INT_NOIZ: - /* already calculated, just output */ - if (job->NStpsSm != 0) - { for (i = 0; i < BSIM3v32NSRCS; i++) - { data->outpVector[data->outNumber++] - = here->BSIM3v32nVar[OUTNOIZ][i]; - data->outpVector[data->outNumber++] - = here->BSIM3v32nVar[INNOIZ][i]; - } - } - break; - } - break; - case N_CLOSE: - /* do nothing, the main calling routine will close */ - return (OK); - break; /* the plots */ - } /* switch (operation) */ - } /* for here */ + } + } + } + if (data->prtSummary) + { for (i = 0; i < BSIM3v32NSRCS; i++) + { /* print a summary report */ + data->outpVector[data->outNumber++] + = noizDens[i]; + } + } + break; + case INT_NOIZ: + /* already calculated, just output */ + if (job->NStpsSm != 0) + { for (i = 0; i < BSIM3v32NSRCS; i++) + { data->outpVector[data->outNumber++] + = here->BSIM3v32nVar[OUTNOIZ][i]; + data->outpVector[data->outNumber++] + = here->BSIM3v32nVar[INNOIZ][i]; + } + } + break; + } + break; + case N_CLOSE: + /* do nothing, the main calling routine will close */ + return (OK); + break; /* the plots */ + } /* switch (operation) */ + } /* for here */ } /* for model */ return(OK); diff --git a/src/spicelib/devices/bsim3v32/b3v32par.c b/src/spicelib/devices/bsim3v32/b3v32par.c index 3f3a489b7..5ff8a05a8 100644 --- a/src/spicelib/devices/bsim3v32/b3v32par.c +++ b/src/spicelib/devices/bsim3v32/b3v32par.c @@ -28,7 +28,7 @@ BSIM3v32param (int param, IFvalue *value, GENinstance *inst, IFvalue *select) if (!cp_getvar("scale", CP_REAL, &scale)) scale = 1; - switch(param) + switch(param) { case BSIM3v32_W: here->BSIM3v32w = value->rValue*scale; here->BSIM3v32wGiven = TRUE; diff --git a/src/spicelib/devices/bsim3v32/b3v32pzld.c b/src/spicelib/devices/bsim3v32/b3v32pzld.c index f775c1ea4..ddadb53af 100644 --- a/src/spicelib/devices/bsim3v32/b3v32pzld.c +++ b/src/spicelib/devices/bsim3v32/b3v32pzld.c @@ -3,7 +3,7 @@ /********** * Copyright 2001 Regents of the University of California. All rights reserved. * File: b3pzld.c of BSIM3v3.2.4 - * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1995 Min-Chie Jeng and Mansun Chan. * Author: 1997-1999 Weidong Liu. * Author: 2001 Xuemei Xi * Modified by Paolo Nenzi 2002 @@ -36,11 +36,11 @@ double T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css; double ScalingFactor = 1.0e-9; double m; - for (; model != NULL; model = model->BSIM3v32nextModel) + for (; model != NULL; model = model->BSIM3v32nextModel) { for (here = model->BSIM3v32instances; here!= NULL; - here = here->BSIM3v32nextInstance) - { - if (here->BSIM3v32mode >= 0) + here = here->BSIM3v32nextInstance) + { + if (here->BSIM3v32mode >= 0) { Gm = here->BSIM3v32gm; Gmbs = here->BSIM3v32gmbs; FwdSum = Gm + Gmbs; @@ -73,19 +73,19 @@ double m; cddb = here->BSIM3v32cddb; xgtg = xgtd = xgts = xgtb = 0.0; - sxpart = 0.6; + sxpart = 0.6; dxpart = 0.4; - ddxpart_dVd = ddxpart_dVg = ddxpart_dVb - = ddxpart_dVs = 0.0; - dsxpart_dVd = dsxpart_dVg = dsxpart_dVb - = dsxpart_dVs = 0.0; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; } else { cggb = cgdb = cgsb = 0.0; cbgb = cbdb = cbsb = 0.0; cdgb = cddb = cdsb = 0.0; - xgtg = here->BSIM3v32gtg; + xgtg = here->BSIM3v32gtg; xgtd = here->BSIM3v32gtd; xgts = here->BSIM3v32gts; xgtb = here->BSIM3v32gtb; @@ -95,46 +95,46 @@ double m; xcqsb = here->BSIM3v32cqsb; xcqbb = here->BSIM3v32cqbb; - CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV + CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV * here->pParam->BSIM3v32leffCV; - qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); - if (fabs(qcheq) <= 1.0e-5 * CoxWL) - { if (model->BSIM3v32xpart < 0.5) - { dxpart = 0.4; - } - else if (model->BSIM3v32xpart > 0.5) - { dxpart = 0.0; - } - else - { dxpart = 0.5; - } - ddxpart_dVd = ddxpart_dVg = ddxpart_dVb - = ddxpart_dVs = 0.0; - } - else - { dxpart = here->BSIM3v32qdrn / qcheq; - Cdd = here->BSIM3v32cddb; - Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb - + here->BSIM3v32cbdb); - ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; - Cdg = here->BSIM3v32cdgb; - Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb - + here->BSIM3v32cbgb); - ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; + qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { dxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { dxpart = 0.0; + } + else + { dxpart = 0.5; + } + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + } + else + { dxpart = here->BSIM3v32qdrn / qcheq; + Cdd = here->BSIM3v32cddb; + Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; + Cdg = here->BSIM3v32cdgb; + Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; - Cds = here->BSIM3v32cdsb; - Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb - + here->BSIM3v32cbsb); - ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; + Cds = here->BSIM3v32cdsb; + Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; - ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg - + ddxpart_dVs); - } - sxpart = 1.0 - dxpart; - dsxpart_dVd = -ddxpart_dVd; - dsxpart_dVg = -ddxpart_dVg; - dsxpart_dVs = -ddxpart_dVs; - dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + + ddxpart_dVs); + } + sxpart = 1.0 - dxpart; + dsxpart_dVd = -ddxpart_dVd; + dsxpart_dVg = -ddxpart_dVg; + dsxpart_dVs = -ddxpart_dVs; + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); } } else @@ -156,7 +156,7 @@ double m; gbspb = here->BSIM3v32gbbs; gbspdp = -(gbspg + gbspsp + gbspb); - if (here->BSIM3v32nqsMod == 0) + if (here->BSIM3v32nqsMod == 0) { cggb = here->BSIM3v32cggb; cgsb = here->BSIM3v32cgdb; cgdb = here->BSIM3v32cgsb; @@ -170,19 +170,19 @@ double m; cddb = -(here->BSIM3v32cdsb + cgdb + cbdb); xgtg = xgtd = xgts = xgtb = 0.0; - sxpart = 0.4; + sxpart = 0.4; dxpart = 0.6; - ddxpart_dVd = ddxpart_dVg = ddxpart_dVb - = ddxpart_dVs = 0.0; - dsxpart_dVd = dsxpart_dVg = dsxpart_dVb - = dsxpart_dVs = 0.0; + ddxpart_dVd = ddxpart_dVg = ddxpart_dVb + = ddxpart_dVs = 0.0; + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; } else { cggb = cgdb = cgsb = 0.0; cbgb = cbdb = cbsb = 0.0; cdgb = cddb = cdsb = 0.0; - xgtg = here->BSIM3v32gtg; + xgtg = here->BSIM3v32gtg; xgtd = here->BSIM3v32gts; xgts = here->BSIM3v32gtd; xgtb = here->BSIM3v32gtb; @@ -192,51 +192,51 @@ double m; xcqsb = here->BSIM3v32cqdb; xcqbb = here->BSIM3v32cqbb; - CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV + CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV * here->pParam->BSIM3v32leffCV; - qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); - if (fabs(qcheq) <= 1.0e-5 * CoxWL) - { if (model->BSIM3v32xpart < 0.5) - { sxpart = 0.4; - } - else if (model->BSIM3v32xpart > 0.5) - { sxpart = 0.0; - } - else - { sxpart = 0.5; - } - dsxpart_dVd = dsxpart_dVg = dsxpart_dVb - = dsxpart_dVs = 0.0; - } - else - { sxpart = here->BSIM3v32qdrn / qcheq; - Css = here->BSIM3v32cddb; - Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb - + here->BSIM3v32cbdb); - dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; - Csg = here->BSIM3v32cdgb; - Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb - + here->BSIM3v32cbgb); - dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; + qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); + if (fabs(qcheq) <= 1.0e-5 * CoxWL) + { if (model->BSIM3v32xpart < 0.5) + { sxpart = 0.4; + } + else if (model->BSIM3v32xpart > 0.5) + { sxpart = 0.0; + } + else + { sxpart = 0.5; + } + dsxpart_dVd = dsxpart_dVg = dsxpart_dVb + = dsxpart_dVs = 0.0; + } + else + { sxpart = here->BSIM3v32qdrn / qcheq; + Css = here->BSIM3v32cddb; + Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb + + here->BSIM3v32cbdb); + dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; + Csg = here->BSIM3v32cdgb; + Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb + + here->BSIM3v32cbgb); + dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; - Csd = here->BSIM3v32cdsb; - Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb - + here->BSIM3v32cbsb); - dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; + Csd = here->BSIM3v32cdsb; + Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb + + here->BSIM3v32cbsb); + dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; - dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg - + dsxpart_dVs); - } - dxpart = 1.0 - sxpart; - ddxpart_dVd = -dsxpart_dVd; - ddxpart_dVg = -dsxpart_dVg; - ddxpart_dVs = -dsxpart_dVs; - ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); + dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + + dsxpart_dVs); + } + dxpart = 1.0 - sxpart; + ddxpart_dVd = -dsxpart_dVd; + ddxpart_dVg = -dsxpart_dVg; + ddxpart_dVs = -dsxpart_dVs; + ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); } } - T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau; + T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau; gdpr = here->BSIM3v32drainConductance; gspr = here->BSIM3v32sourceConductance; gds = here->BSIM3v32gds; @@ -245,9 +245,9 @@ double m; capbd = here->BSIM3v32capbd; capbs = here->BSIM3v32capbs; - GSoverlapCap = here->BSIM3v32cgso; - GDoverlapCap = here->BSIM3v32cgdo; - GBoverlapCap = here->pParam->BSIM3v32cgbo; + GSoverlapCap = here->BSIM3v32cgso; + GDoverlapCap = here->BSIM3v32cgdo; + GBoverlapCap = here->pParam->BSIM3v32cgbo; xcdgb = (cdgb - GDoverlapCap); xcddb = (cddb + capbd + GDoverlapCap); @@ -256,7 +256,7 @@ double m; xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap); xcsdb = -(cgdb + cbdb + cddb); xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)); - xcsbb = -(xcsgb + xcsdb + xcssb); + xcsbb = -(xcsgb + xcsdb + xcssb); xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap); xcgdb = (cgdb - GDoverlapCap); xcgsb = (cgsb - GSoverlapCap); @@ -266,7 +266,7 @@ double m; xcbsb = (cbsb - capbs); xcbbb = -(xcbgb + xcbdb + xcbsb); - m = here->BSIM3v32m; + m = here->BSIM3v32m; *(here->BSIM3v32GgPtr ) += m * (xcggb * s->real); *(here->BSIM3v32GgPtr +1) += m * (xcggb * s->imag); @@ -318,23 +318,23 @@ double m; *(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp); *(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp); - *(here->BSIM3v32DPgPtr) += Gm + dxpart * xgtg - + T1 * ddxpart_dVg + gbdpg; + *(here->BSIM3v32DPgPtr) += Gm + dxpart * xgtg + + T1 * ddxpart_dVg + gbdpg; *(here->BSIM3v32DPdpPtr) += gdpr + gds + gbd + RevSum + dxpart * xgtd + T1 * ddxpart_dVd + gbdpdp; *(here->BSIM3v32DPspPtr) -= gds + FwdSum - dxpart * xgts - - T1 * ddxpart_dVs - gbdpsp; + - T1 * ddxpart_dVs - gbdpsp; *(here->BSIM3v32DPbPtr) -= gbd - Gmbs - dxpart * xgtb - - T1 * ddxpart_dVb - gbdpb; + - T1 * ddxpart_dVb - gbdpb; *(here->BSIM3v32SPgPtr) -= Gm - sxpart * xgtg - - T1 * dsxpart_dVg - gbspg; + - T1 * dsxpart_dVg - gbspg; *(here->BSIM3v32SPspPtr) += gspr + gds + gbs + FwdSum + sxpart * xgts + T1 * dsxpart_dVs + gbspsp; *(here->BSIM3v32SPbPtr) -= gbs + Gmbs - sxpart * xgtb - - T1 * dsxpart_dVb - gbspb; + - T1 * dsxpart_dVb - gbspb; *(here->BSIM3v32SPdpPtr) -= gds + RevSum - sxpart * xgtd - - T1 * dsxpart_dVd - gbspdp; + - T1 * dsxpart_dVd - gbspdp; *(here->BSIM3v32GgPtr) -= xgtg; *(here->BSIM3v32GbPtr) -= xgtb; diff --git a/src/spicelib/devices/bsim3v32/b3v32temp.c b/src/spicelib/devices/bsim3v32/b3v32temp.c index 612b2789d..d8fb780e1 100644 --- a/src/spicelib/devices/bsim3v32/b3v32temp.c +++ b/src/spicelib/devices/bsim3v32/b3v32temp.c @@ -43,24 +43,24 @@ int Size_Not_Found; for (; model != NULL; model = model->BSIM3v32nextModel) { Temp = ckt->CKTtemp; if (model->BSIM3v32bulkJctPotential < 0.1) - { model->BSIM3v32bulkJctPotential = 0.1; - fprintf(stderr, "Given pb is less than 0.1. Pb is set to 0.1.\n"); - } + { model->BSIM3v32bulkJctPotential = 0.1; + fprintf(stderr, "Given pb is less than 0.1. Pb is set to 0.1.\n"); + } if (model->BSIM3v32sidewallJctPotential < 0.1) - { model->BSIM3v32sidewallJctPotential = 0.1; - fprintf(stderr, "Given pbsw is less than 0.1. Pbsw is set to 0.1.\n"); - } + { model->BSIM3v32sidewallJctPotential = 0.1; + fprintf(stderr, "Given pbsw is less than 0.1. Pbsw is set to 0.1.\n"); + } if (model->BSIM3v32GatesidewallJctPotential < 0.1) - { model->BSIM3v32GatesidewallJctPotential = 0.1; - fprintf(stderr, "Given pbswg is less than 0.1. Pbswg is set to 0.1.\n"); - } + { model->BSIM3v32GatesidewallJctPotential = 0.1; + fprintf(stderr, "Given pbswg is less than 0.1. Pbswg is set to 0.1.\n"); + } model->pSizeDependParamKnot = NULL; - pLastKnot = NULL; + pLastKnot = NULL; - Tnom = model->BSIM3v32tnom; - TRatio = Temp / Tnom; + Tnom = model->BSIM3v32tnom; + TRatio = Temp / Tnom; - model->BSIM3v32vcrit = CONSTvt0 * log(CONSTvt0 / (CONSTroot2 * 1.0e-14)); + model->BSIM3v32vcrit = CONSTvt0 * log(CONSTvt0 / (CONSTroot2 * 1.0e-14)); model->BSIM3v32factor1 = sqrt(EPSSI / EPSOX * model->BSIM3v32tox); Vtm0 = KboQ * Tnom; @@ -70,167 +70,167 @@ int Size_Not_Found; model->BSIM3v32vtm = KboQ * Temp; Eg = 1.16 - 7.02e-4 * Temp * Temp / (Temp + 1108.0); - if (Temp != Tnom) - { T0 = Eg0 / Vtm0 - Eg / model->BSIM3v32vtm + model->BSIM3v32jctTempExponent - * log(Temp / Tnom); - T1 = exp(T0 / model->BSIM3v32jctEmissionCoeff); - model->BSIM3v32jctTempSatCurDensity = model->BSIM3v32jctSatCurDensity - * T1; - model->BSIM3v32jctSidewallTempSatCurDensity - = model->BSIM3v32jctSidewallSatCurDensity * T1; - } - else - { model->BSIM3v32jctTempSatCurDensity = model->BSIM3v32jctSatCurDensity; - model->BSIM3v32jctSidewallTempSatCurDensity - = model->BSIM3v32jctSidewallSatCurDensity; - } + if (Temp != Tnom) + { T0 = Eg0 / Vtm0 - Eg / model->BSIM3v32vtm + model->BSIM3v32jctTempExponent + * log(Temp / Tnom); + T1 = exp(T0 / model->BSIM3v32jctEmissionCoeff); + model->BSIM3v32jctTempSatCurDensity = model->BSIM3v32jctSatCurDensity + * T1; + model->BSIM3v32jctSidewallTempSatCurDensity + = model->BSIM3v32jctSidewallSatCurDensity * T1; + } + else + { model->BSIM3v32jctTempSatCurDensity = model->BSIM3v32jctSatCurDensity; + model->BSIM3v32jctSidewallTempSatCurDensity + = model->BSIM3v32jctSidewallSatCurDensity; + } - if (model->BSIM3v32jctTempSatCurDensity < 0.0) - model->BSIM3v32jctTempSatCurDensity = 0.0; - if (model->BSIM3v32jctSidewallTempSatCurDensity < 0.0) - model->BSIM3v32jctSidewallTempSatCurDensity = 0.0; + if (model->BSIM3v32jctTempSatCurDensity < 0.0) + model->BSIM3v32jctTempSatCurDensity = 0.0; + if (model->BSIM3v32jctSidewallTempSatCurDensity < 0.0) + model->BSIM3v32jctSidewallTempSatCurDensity = 0.0; - /* Temperature dependence of D/B and S/B diode capacitance begins */ - delTemp = ckt->CKTtemp - model->BSIM3v32tnom; - T0 = model->BSIM3v32tcj * delTemp; - if (T0 >= -1.0) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - model->BSIM3v32unitAreaTempJctCap = - model->BSIM3v32unitAreaJctCap * (1.0 + T0); - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - model->BSIM3v32unitAreaJctCap *= 1.0 + T0; - } - } - else if (model->BSIM3v32unitAreaJctCap > 0.0) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - model->BSIM3v32unitAreaTempJctCap = 0.0; - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - model->BSIM3v32unitAreaJctCap = 0.0; - } - fprintf(stderr, "Temperature effect has caused cj to be negative. Cj is clamped to zero.\n"); - } + /* Temperature dependence of D/B and S/B diode capacitance begins */ + delTemp = ckt->CKTtemp - model->BSIM3v32tnom; + T0 = model->BSIM3v32tcj * delTemp; + if (T0 >= -1.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitAreaTempJctCap = + model->BSIM3v32unitAreaJctCap * (1.0 + T0); + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitAreaJctCap *= 1.0 + T0; + } + } + else if (model->BSIM3v32unitAreaJctCap > 0.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitAreaTempJctCap = 0.0; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitAreaJctCap = 0.0; + } + fprintf(stderr, "Temperature effect has caused cj to be negative. Cj is clamped to zero.\n"); + } T0 = model->BSIM3v32tcjsw * delTemp; - if (T0 >= -1.0) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - model->BSIM3v32unitLengthSidewallTempJctCap = - model->BSIM3v32unitLengthSidewallJctCap * (1.0 + T0); - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - model->BSIM3v32unitLengthSidewallJctCap *= 1.0 + T0; - } - } - else if (model->BSIM3v32unitLengthSidewallJctCap > 0.0) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - model->BSIM3v32unitLengthSidewallTempJctCap = 0.0; - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - model->BSIM3v32unitLengthSidewallJctCap = 0.0; - } - fprintf(stderr, "Temperature effect has caused cjsw to be negative. Cjsw is clamped to zero.\n"); - } + if (T0 >= -1.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitLengthSidewallTempJctCap = + model->BSIM3v32unitLengthSidewallJctCap * (1.0 + T0); + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitLengthSidewallJctCap *= 1.0 + T0; + } + } + else if (model->BSIM3v32unitLengthSidewallJctCap > 0.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitLengthSidewallTempJctCap = 0.0; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitLengthSidewallJctCap = 0.0; + } + fprintf(stderr, "Temperature effect has caused cjsw to be negative. Cjsw is clamped to zero.\n"); + } T0 = model->BSIM3v32tcjswg * delTemp; - if (T0 >= -1.0) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - model->BSIM3v32unitLengthGateSidewallTempJctCap = - model->BSIM3v32unitLengthGateSidewallJctCap * (1.0 + T0); - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - model->BSIM3v32unitLengthGateSidewallJctCap *= 1.0 + T0; - } - } - else if (model->BSIM3v32unitLengthGateSidewallJctCap > 0.0) - { - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - model->BSIM3v32unitLengthGateSidewallTempJctCap = 0.0; - break; - case BSIM3v32V322: - case BSIM3v32V32: - default: - model->BSIM3v32unitLengthGateSidewallJctCap = 0.0; - } - fprintf(stderr, "Temperature effect has caused cjswg to be negative. Cjswg is clamped to zero.\n"); - } + if (T0 >= -1.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitLengthGateSidewallTempJctCap = + model->BSIM3v32unitLengthGateSidewallJctCap * (1.0 + T0); + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitLengthGateSidewallJctCap *= 1.0 + T0; + } + } + else if (model->BSIM3v32unitLengthGateSidewallJctCap > 0.0) + { + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + model->BSIM3v32unitLengthGateSidewallTempJctCap = 0.0; + break; + case BSIM3v32V322: + case BSIM3v32V32: + default: + model->BSIM3v32unitLengthGateSidewallJctCap = 0.0; + } + fprintf(stderr, "Temperature effect has caused cjswg to be negative. Cjswg is clamped to zero.\n"); + } model->BSIM3v32PhiB = model->BSIM3v32bulkJctPotential - - model->BSIM3v32tpb * delTemp; + - model->BSIM3v32tpb * delTemp; if (model->BSIM3v32PhiB < 0.01) - { model->BSIM3v32PhiB = 0.01; - fprintf(stderr, "Temperature effect has caused pb to be less than 0.01. Pb is clamped to 0.01.\n"); - } + { model->BSIM3v32PhiB = 0.01; + fprintf(stderr, "Temperature effect has caused pb to be less than 0.01. Pb is clamped to 0.01.\n"); + } model->BSIM3v32PhiBSW = model->BSIM3v32sidewallJctPotential - model->BSIM3v32tpbsw * delTemp; if (model->BSIM3v32PhiBSW <= 0.01) - { model->BSIM3v32PhiBSW = 0.01; - fprintf(stderr, "Temperature effect has caused pbsw to be less than 0.01. Pbsw is clamped to 0.01.\n"); - } - model->BSIM3v32PhiBSWG = model->BSIM3v32GatesidewallJctPotential + { model->BSIM3v32PhiBSW = 0.01; + fprintf(stderr, "Temperature effect has caused pbsw to be less than 0.01. Pbsw is clamped to 0.01.\n"); + } + model->BSIM3v32PhiBSWG = model->BSIM3v32GatesidewallJctPotential - model->BSIM3v32tpbswg * delTemp; if (model->BSIM3v32PhiBSWG <= 0.01) - { model->BSIM3v32PhiBSWG = 0.01; - fprintf(stderr, "Temperature effect has caused pbswg to be less than 0.01. Pbswg is clamped to 0.01.\n"); - } + { model->BSIM3v32PhiBSWG = 0.01; + fprintf(stderr, "Temperature effect has caused pbswg to be less than 0.01. Pbswg is clamped to 0.01.\n"); + } /* End of junction capacitance */ - /* loop through all the instances of the model */ - /* MCJ: Length and Width not initialized */ - for (here = model->BSIM3v32instances; here != NULL; + /* loop through all the instances of the model */ + /* MCJ: Length and Width not initialized */ + for (here = model->BSIM3v32instances; here != NULL; here = here->BSIM3v32nextInstance) - { - pSizeDependParamKnot = model->pSizeDependParamKnot; - Size_Not_Found = 1; - while ((pSizeDependParamKnot != NULL) && Size_Not_Found) - { if ((here->BSIM3v32l == pSizeDependParamKnot->Length) - && (here->BSIM3v32w == pSizeDependParamKnot->Width)) + { + pSizeDependParamKnot = model->pSizeDependParamKnot; + Size_Not_Found = 1; + while ((pSizeDependParamKnot != NULL) && Size_Not_Found) + { if ((here->BSIM3v32l == pSizeDependParamKnot->Length) + && (here->BSIM3v32w == pSizeDependParamKnot->Width)) { Size_Not_Found = 0; - here->pParam = pSizeDependParamKnot; - if (model->BSIM3v32intVersion > BSIM3v32V322) + here->pParam = pSizeDependParamKnot; + if (model->BSIM3v32intVersion > BSIM3v32V322) { - pParam = here->pParam; /*bug-fix */ - } - } - else - { pLastKnot = pSizeDependParamKnot; - pSizeDependParamKnot = pSizeDependParamKnot->pNext; - } + pParam = here->pParam; /*bug-fix */ + } + } + else + { pLastKnot = pSizeDependParamKnot; + pSizeDependParamKnot = pSizeDependParamKnot->pNext; + } } - if (Size_Not_Found) - { pParam = TMALLOC(struct bsim3v32SizeDependParam, 1); + if (Size_Not_Found) + { pParam = TMALLOC(struct bsim3v32SizeDependParam, 1); if (pLastKnot == NULL) model->pSizeDependParamKnot = pParam; else @@ -263,7 +263,7 @@ int Size_Not_Found; pParam->BSIM3v32leff = here->BSIM3v32l + model->BSIM3v32xl - 2.0 * pParam->BSIM3v32dl; if (pParam->BSIM3v32leff <= 0.0) - { IFuid namarray[2]; + { IFuid namarray[2]; namarray[0] = model->BSIM3v32modName; namarray[1] = here->BSIM3v32name; SPfrontEnd->IFerror (ERR_FATAL, @@ -274,7 +274,7 @@ int Size_Not_Found; pParam->BSIM3v32weff = here->BSIM3v32w + model->BSIM3v32xw - 2.0 * pParam->BSIM3v32dw; if (pParam->BSIM3v32weff <= 0.0) - { IFuid namarray[2]; + { IFuid namarray[2]; namarray[0] = model->BSIM3v32modName; namarray[1] = here->BSIM3v32name; SPfrontEnd->IFerror (ERR_FATAL, @@ -285,7 +285,7 @@ int Size_Not_Found; pParam->BSIM3v32leffCV = here->BSIM3v32l + model->BSIM3v32xl - 2.0 * pParam->BSIM3v32dlc; if (pParam->BSIM3v32leffCV <= 0.0) - { IFuid namarray[2]; + { IFuid namarray[2]; namarray[0] = model->BSIM3v32modName; namarray[1] = here->BSIM3v32name; SPfrontEnd->IFerror (ERR_FATAL, @@ -296,7 +296,7 @@ int Size_Not_Found; pParam->BSIM3v32weffCV = here->BSIM3v32w + model->BSIM3v32xw - 2.0 * pParam->BSIM3v32dwc; if (pParam->BSIM3v32weffCV <= 0.0) - { IFuid namarray[2]; + { IFuid namarray[2]; namarray[0] = model->BSIM3v32modName; namarray[1] = here->BSIM3v32name; SPfrontEnd->IFerror (ERR_FATAL, @@ -306,744 +306,744 @@ int Size_Not_Found; } - if (model->BSIM3v32binUnit == 1) - { Inv_L = 1.0e-6 / pParam->BSIM3v32leff; - Inv_W = 1.0e-6 / pParam->BSIM3v32weff; - Inv_LW = 1.0e-12 / (pParam->BSIM3v32leff - * pParam->BSIM3v32weff); - } - else - { Inv_L = 1.0 / pParam->BSIM3v32leff; - Inv_W = 1.0 / pParam->BSIM3v32weff; - Inv_LW = 1.0 / (pParam->BSIM3v32leff - * pParam->BSIM3v32weff); - } - pParam->BSIM3v32cdsc = model->BSIM3v32cdsc - + model->BSIM3v32lcdsc * Inv_L - + model->BSIM3v32wcdsc * Inv_W - + model->BSIM3v32pcdsc * Inv_LW; - pParam->BSIM3v32cdscb = model->BSIM3v32cdscb - + model->BSIM3v32lcdscb * Inv_L - + model->BSIM3v32wcdscb * Inv_W - + model->BSIM3v32pcdscb * Inv_LW; + if (model->BSIM3v32binUnit == 1) + { Inv_L = 1.0e-6 / pParam->BSIM3v32leff; + Inv_W = 1.0e-6 / pParam->BSIM3v32weff; + Inv_LW = 1.0e-12 / (pParam->BSIM3v32leff + * pParam->BSIM3v32weff); + } + else + { Inv_L = 1.0 / pParam->BSIM3v32leff; + Inv_W = 1.0 / pParam->BSIM3v32weff; + Inv_LW = 1.0 / (pParam->BSIM3v32leff + * pParam->BSIM3v32weff); + } + pParam->BSIM3v32cdsc = model->BSIM3v32cdsc + + model->BSIM3v32lcdsc * Inv_L + + model->BSIM3v32wcdsc * Inv_W + + model->BSIM3v32pcdsc * Inv_LW; + pParam->BSIM3v32cdscb = model->BSIM3v32cdscb + + model->BSIM3v32lcdscb * Inv_L + + model->BSIM3v32wcdscb * Inv_W + + model->BSIM3v32pcdscb * Inv_LW; - pParam->BSIM3v32cdscd = model->BSIM3v32cdscd - + model->BSIM3v32lcdscd * Inv_L - + model->BSIM3v32wcdscd * Inv_W - + model->BSIM3v32pcdscd * Inv_LW; + pParam->BSIM3v32cdscd = model->BSIM3v32cdscd + + model->BSIM3v32lcdscd * Inv_L + + model->BSIM3v32wcdscd * Inv_W + + model->BSIM3v32pcdscd * Inv_LW; - pParam->BSIM3v32cit = model->BSIM3v32cit - + model->BSIM3v32lcit * Inv_L - + model->BSIM3v32wcit * Inv_W - + model->BSIM3v32pcit * Inv_LW; - pParam->BSIM3v32nfactor = model->BSIM3v32nfactor - + model->BSIM3v32lnfactor * Inv_L - + model->BSIM3v32wnfactor * Inv_W - + model->BSIM3v32pnfactor * Inv_LW; - pParam->BSIM3v32xj = model->BSIM3v32xj - + model->BSIM3v32lxj * Inv_L - + model->BSIM3v32wxj * Inv_W - + model->BSIM3v32pxj * Inv_LW; - pParam->BSIM3v32vsat = model->BSIM3v32vsat - + model->BSIM3v32lvsat * Inv_L - + model->BSIM3v32wvsat * Inv_W - + model->BSIM3v32pvsat * Inv_LW; - pParam->BSIM3v32at = model->BSIM3v32at - + model->BSIM3v32lat * Inv_L - + model->BSIM3v32wat * Inv_W - + model->BSIM3v32pat * Inv_LW; - pParam->BSIM3v32a0 = model->BSIM3v32a0 - + model->BSIM3v32la0 * Inv_L - + model->BSIM3v32wa0 * Inv_W - + model->BSIM3v32pa0 * Inv_LW; + pParam->BSIM3v32cit = model->BSIM3v32cit + + model->BSIM3v32lcit * Inv_L + + model->BSIM3v32wcit * Inv_W + + model->BSIM3v32pcit * Inv_LW; + pParam->BSIM3v32nfactor = model->BSIM3v32nfactor + + model->BSIM3v32lnfactor * Inv_L + + model->BSIM3v32wnfactor * Inv_W + + model->BSIM3v32pnfactor * Inv_LW; + pParam->BSIM3v32xj = model->BSIM3v32xj + + model->BSIM3v32lxj * Inv_L + + model->BSIM3v32wxj * Inv_W + + model->BSIM3v32pxj * Inv_LW; + pParam->BSIM3v32vsat = model->BSIM3v32vsat + + model->BSIM3v32lvsat * Inv_L + + model->BSIM3v32wvsat * Inv_W + + model->BSIM3v32pvsat * Inv_LW; + pParam->BSIM3v32at = model->BSIM3v32at + + model->BSIM3v32lat * Inv_L + + model->BSIM3v32wat * Inv_W + + model->BSIM3v32pat * Inv_LW; + pParam->BSIM3v32a0 = model->BSIM3v32a0 + + model->BSIM3v32la0 * Inv_L + + model->BSIM3v32wa0 * Inv_W + + model->BSIM3v32pa0 * Inv_LW; - pParam->BSIM3v32ags = model->BSIM3v32ags - + model->BSIM3v32lags * Inv_L - + model->BSIM3v32wags * Inv_W - + model->BSIM3v32pags * Inv_LW; + pParam->BSIM3v32ags = model->BSIM3v32ags + + model->BSIM3v32lags * Inv_L + + model->BSIM3v32wags * Inv_W + + model->BSIM3v32pags * Inv_LW; - pParam->BSIM3v32a1 = model->BSIM3v32a1 - + model->BSIM3v32la1 * Inv_L - + model->BSIM3v32wa1 * Inv_W - + model->BSIM3v32pa1 * Inv_LW; - pParam->BSIM3v32a2 = model->BSIM3v32a2 - + model->BSIM3v32la2 * Inv_L - + model->BSIM3v32wa2 * Inv_W - + model->BSIM3v32pa2 * Inv_LW; - pParam->BSIM3v32keta = model->BSIM3v32keta - + model->BSIM3v32lketa * Inv_L - + model->BSIM3v32wketa * Inv_W - + model->BSIM3v32pketa * Inv_LW; - pParam->BSIM3v32nsub = model->BSIM3v32nsub - + model->BSIM3v32lnsub * Inv_L - + model->BSIM3v32wnsub * Inv_W - + model->BSIM3v32pnsub * Inv_LW; - pParam->BSIM3v32npeak = model->BSIM3v32npeak - + model->BSIM3v32lnpeak * Inv_L - + model->BSIM3v32wnpeak * Inv_W - + model->BSIM3v32pnpeak * Inv_LW; - pParam->BSIM3v32ngate = model->BSIM3v32ngate - + model->BSIM3v32lngate * Inv_L - + model->BSIM3v32wngate * Inv_W - + model->BSIM3v32pngate * Inv_LW; - pParam->BSIM3v32gamma1 = model->BSIM3v32gamma1 - + model->BSIM3v32lgamma1 * Inv_L - + model->BSIM3v32wgamma1 * Inv_W - + model->BSIM3v32pgamma1 * Inv_LW; - pParam->BSIM3v32gamma2 = model->BSIM3v32gamma2 - + model->BSIM3v32lgamma2 * Inv_L - + model->BSIM3v32wgamma2 * Inv_W - + model->BSIM3v32pgamma2 * Inv_LW; - pParam->BSIM3v32vbx = model->BSIM3v32vbx - + model->BSIM3v32lvbx * Inv_L - + model->BSIM3v32wvbx * Inv_W - + model->BSIM3v32pvbx * Inv_LW; - pParam->BSIM3v32vbm = model->BSIM3v32vbm - + model->BSIM3v32lvbm * Inv_L - + model->BSIM3v32wvbm * Inv_W - + model->BSIM3v32pvbm * Inv_LW; - pParam->BSIM3v32xt = model->BSIM3v32xt - + model->BSIM3v32lxt * Inv_L - + model->BSIM3v32wxt * Inv_W - + model->BSIM3v32pxt * Inv_LW; - pParam->BSIM3v32vfb = model->BSIM3v32vfb - + model->BSIM3v32lvfb * Inv_L - + model->BSIM3v32wvfb * Inv_W - + model->BSIM3v32pvfb * Inv_LW; - pParam->BSIM3v32k1 = model->BSIM3v32k1 - + model->BSIM3v32lk1 * Inv_L - + model->BSIM3v32wk1 * Inv_W - + model->BSIM3v32pk1 * Inv_LW; - pParam->BSIM3v32kt1 = model->BSIM3v32kt1 - + model->BSIM3v32lkt1 * Inv_L - + model->BSIM3v32wkt1 * Inv_W - + model->BSIM3v32pkt1 * Inv_LW; - pParam->BSIM3v32kt1l = model->BSIM3v32kt1l - + model->BSIM3v32lkt1l * Inv_L - + model->BSIM3v32wkt1l * Inv_W - + model->BSIM3v32pkt1l * Inv_LW; - pParam->BSIM3v32k2 = model->BSIM3v32k2 - + model->BSIM3v32lk2 * Inv_L - + model->BSIM3v32wk2 * Inv_W - + model->BSIM3v32pk2 * Inv_LW; - pParam->BSIM3v32kt2 = model->BSIM3v32kt2 - + model->BSIM3v32lkt2 * Inv_L - + model->BSIM3v32wkt2 * Inv_W - + model->BSIM3v32pkt2 * Inv_LW; - pParam->BSIM3v32k3 = model->BSIM3v32k3 - + model->BSIM3v32lk3 * Inv_L - + model->BSIM3v32wk3 * Inv_W - + model->BSIM3v32pk3 * Inv_LW; - pParam->BSIM3v32k3b = model->BSIM3v32k3b - + model->BSIM3v32lk3b * Inv_L - + model->BSIM3v32wk3b * Inv_W - + model->BSIM3v32pk3b * Inv_LW; - pParam->BSIM3v32w0 = model->BSIM3v32w0 - + model->BSIM3v32lw0 * Inv_L - + model->BSIM3v32ww0 * Inv_W - + model->BSIM3v32pw0 * Inv_LW; - pParam->BSIM3v32nlx = model->BSIM3v32nlx - + model->BSIM3v32lnlx * Inv_L - + model->BSIM3v32wnlx * Inv_W - + model->BSIM3v32pnlx * Inv_LW; - pParam->BSIM3v32dvt0 = model->BSIM3v32dvt0 - + model->BSIM3v32ldvt0 * Inv_L - + model->BSIM3v32wdvt0 * Inv_W - + model->BSIM3v32pdvt0 * Inv_LW; - pParam->BSIM3v32dvt1 = model->BSIM3v32dvt1 - + model->BSIM3v32ldvt1 * Inv_L - + model->BSIM3v32wdvt1 * Inv_W - + model->BSIM3v32pdvt1 * Inv_LW; - pParam->BSIM3v32dvt2 = model->BSIM3v32dvt2 - + model->BSIM3v32ldvt2 * Inv_L - + model->BSIM3v32wdvt2 * Inv_W - + model->BSIM3v32pdvt2 * Inv_LW; - pParam->BSIM3v32dvt0w = model->BSIM3v32dvt0w - + model->BSIM3v32ldvt0w * Inv_L - + model->BSIM3v32wdvt0w * Inv_W - + model->BSIM3v32pdvt0w * Inv_LW; - pParam->BSIM3v32dvt1w = model->BSIM3v32dvt1w - + model->BSIM3v32ldvt1w * Inv_L - + model->BSIM3v32wdvt1w * Inv_W - + model->BSIM3v32pdvt1w * Inv_LW; - pParam->BSIM3v32dvt2w = model->BSIM3v32dvt2w - + model->BSIM3v32ldvt2w * Inv_L - + model->BSIM3v32wdvt2w * Inv_W - + model->BSIM3v32pdvt2w * Inv_LW; - pParam->BSIM3v32drout = model->BSIM3v32drout - + model->BSIM3v32ldrout * Inv_L - + model->BSIM3v32wdrout * Inv_W - + model->BSIM3v32pdrout * Inv_LW; - pParam->BSIM3v32dsub = model->BSIM3v32dsub - + model->BSIM3v32ldsub * Inv_L - + model->BSIM3v32wdsub * Inv_W - + model->BSIM3v32pdsub * Inv_LW; - pParam->BSIM3v32vth0 = model->BSIM3v32vth0 - + model->BSIM3v32lvth0 * Inv_L - + model->BSIM3v32wvth0 * Inv_W - + model->BSIM3v32pvth0 * Inv_LW; - pParam->BSIM3v32ua = model->BSIM3v32ua - + model->BSIM3v32lua * Inv_L - + model->BSIM3v32wua * Inv_W - + model->BSIM3v32pua * Inv_LW; - pParam->BSIM3v32ua1 = model->BSIM3v32ua1 - + model->BSIM3v32lua1 * Inv_L - + model->BSIM3v32wua1 * Inv_W - + model->BSIM3v32pua1 * Inv_LW; - pParam->BSIM3v32ub = model->BSIM3v32ub - + model->BSIM3v32lub * Inv_L - + model->BSIM3v32wub * Inv_W - + model->BSIM3v32pub * Inv_LW; - pParam->BSIM3v32ub1 = model->BSIM3v32ub1 - + model->BSIM3v32lub1 * Inv_L - + model->BSIM3v32wub1 * Inv_W - + model->BSIM3v32pub1 * Inv_LW; - pParam->BSIM3v32uc = model->BSIM3v32uc - + model->BSIM3v32luc * Inv_L - + model->BSIM3v32wuc * Inv_W - + model->BSIM3v32puc * Inv_LW; - pParam->BSIM3v32uc1 = model->BSIM3v32uc1 - + model->BSIM3v32luc1 * Inv_L - + model->BSIM3v32wuc1 * Inv_W - + model->BSIM3v32puc1 * Inv_LW; - pParam->BSIM3v32u0 = model->BSIM3v32u0 - + model->BSIM3v32lu0 * Inv_L - + model->BSIM3v32wu0 * Inv_W - + model->BSIM3v32pu0 * Inv_LW; - pParam->BSIM3v32ute = model->BSIM3v32ute - + model->BSIM3v32lute * Inv_L - + model->BSIM3v32wute * Inv_W - + model->BSIM3v32pute * Inv_LW; - pParam->BSIM3v32voff = model->BSIM3v32voff - + model->BSIM3v32lvoff * Inv_L - + model->BSIM3v32wvoff * Inv_W - + model->BSIM3v32pvoff * Inv_LW; - pParam->BSIM3v32delta = model->BSIM3v32delta - + model->BSIM3v32ldelta * Inv_L - + model->BSIM3v32wdelta * Inv_W - + model->BSIM3v32pdelta * Inv_LW; - pParam->BSIM3v32rdsw = model->BSIM3v32rdsw - + model->BSIM3v32lrdsw * Inv_L - + model->BSIM3v32wrdsw * Inv_W - + model->BSIM3v32prdsw * Inv_LW; - pParam->BSIM3v32prwg = model->BSIM3v32prwg - + model->BSIM3v32lprwg * Inv_L - + model->BSIM3v32wprwg * Inv_W - + model->BSIM3v32pprwg * Inv_LW; - pParam->BSIM3v32prwb = model->BSIM3v32prwb - + model->BSIM3v32lprwb * Inv_L - + model->BSIM3v32wprwb * Inv_W - + model->BSIM3v32pprwb * Inv_LW; - pParam->BSIM3v32prt = model->BSIM3v32prt - + model->BSIM3v32lprt * Inv_L - + model->BSIM3v32wprt * Inv_W - + model->BSIM3v32pprt * Inv_LW; - pParam->BSIM3v32eta0 = model->BSIM3v32eta0 - + model->BSIM3v32leta0 * Inv_L - + model->BSIM3v32weta0 * Inv_W - + model->BSIM3v32peta0 * Inv_LW; - pParam->BSIM3v32etab = model->BSIM3v32etab - + model->BSIM3v32letab * Inv_L - + model->BSIM3v32wetab * Inv_W - + model->BSIM3v32petab * Inv_LW; - pParam->BSIM3v32pclm = model->BSIM3v32pclm - + model->BSIM3v32lpclm * Inv_L - + model->BSIM3v32wpclm * Inv_W - + model->BSIM3v32ppclm * Inv_LW; - pParam->BSIM3v32pdibl1 = model->BSIM3v32pdibl1 - + model->BSIM3v32lpdibl1 * Inv_L - + model->BSIM3v32wpdibl1 * Inv_W - + model->BSIM3v32ppdibl1 * Inv_LW; - pParam->BSIM3v32pdibl2 = model->BSIM3v32pdibl2 - + model->BSIM3v32lpdibl2 * Inv_L - + model->BSIM3v32wpdibl2 * Inv_W - + model->BSIM3v32ppdibl2 * Inv_LW; - pParam->BSIM3v32pdiblb = model->BSIM3v32pdiblb - + model->BSIM3v32lpdiblb * Inv_L - + model->BSIM3v32wpdiblb * Inv_W - + model->BSIM3v32ppdiblb * Inv_LW; - pParam->BSIM3v32pscbe1 = model->BSIM3v32pscbe1 - + model->BSIM3v32lpscbe1 * Inv_L - + model->BSIM3v32wpscbe1 * Inv_W - + model->BSIM3v32ppscbe1 * Inv_LW; - pParam->BSIM3v32pscbe2 = model->BSIM3v32pscbe2 - + model->BSIM3v32lpscbe2 * Inv_L - + model->BSIM3v32wpscbe2 * Inv_W - + model->BSIM3v32ppscbe2 * Inv_LW; - pParam->BSIM3v32pvag = model->BSIM3v32pvag - + model->BSIM3v32lpvag * Inv_L - + model->BSIM3v32wpvag * Inv_W - + model->BSIM3v32ppvag * Inv_LW; - pParam->BSIM3v32wr = model->BSIM3v32wr - + model->BSIM3v32lwr * Inv_L - + model->BSIM3v32wwr * Inv_W - + model->BSIM3v32pwr * Inv_LW; - pParam->BSIM3v32dwg = model->BSIM3v32dwg - + model->BSIM3v32ldwg * Inv_L - + model->BSIM3v32wdwg * Inv_W - + model->BSIM3v32pdwg * Inv_LW; - pParam->BSIM3v32dwb = model->BSIM3v32dwb - + model->BSIM3v32ldwb * Inv_L - + model->BSIM3v32wdwb * Inv_W - + model->BSIM3v32pdwb * Inv_LW; - pParam->BSIM3v32b0 = model->BSIM3v32b0 - + model->BSIM3v32lb0 * Inv_L - + model->BSIM3v32wb0 * Inv_W - + model->BSIM3v32pb0 * Inv_LW; - pParam->BSIM3v32b1 = model->BSIM3v32b1 - + model->BSIM3v32lb1 * Inv_L - + model->BSIM3v32wb1 * Inv_W - + model->BSIM3v32pb1 * Inv_LW; - pParam->BSIM3v32alpha0 = model->BSIM3v32alpha0 - + model->BSIM3v32lalpha0 * Inv_L - + model->BSIM3v32walpha0 * Inv_W - + model->BSIM3v32palpha0 * Inv_LW; - pParam->BSIM3v32alpha1 = model->BSIM3v32alpha1 - + model->BSIM3v32lalpha1 * Inv_L - + model->BSIM3v32walpha1 * Inv_W - + model->BSIM3v32palpha1 * Inv_LW; - pParam->BSIM3v32beta0 = model->BSIM3v32beta0 - + model->BSIM3v32lbeta0 * Inv_L - + model->BSIM3v32wbeta0 * Inv_W - + model->BSIM3v32pbeta0 * Inv_LW; - /* CV model */ - pParam->BSIM3v32elm = model->BSIM3v32elm - + model->BSIM3v32lelm * Inv_L - + model->BSIM3v32welm * Inv_W - + model->BSIM3v32pelm * Inv_LW; - pParam->BSIM3v32cgsl = model->BSIM3v32cgsl - + model->BSIM3v32lcgsl * Inv_L - + model->BSIM3v32wcgsl * Inv_W - + model->BSIM3v32pcgsl * Inv_LW; - pParam->BSIM3v32cgdl = model->BSIM3v32cgdl - + model->BSIM3v32lcgdl * Inv_L - + model->BSIM3v32wcgdl * Inv_W - + model->BSIM3v32pcgdl * Inv_LW; - pParam->BSIM3v32ckappa = model->BSIM3v32ckappa - + model->BSIM3v32lckappa * Inv_L - + model->BSIM3v32wckappa * Inv_W - + model->BSIM3v32pckappa * Inv_LW; - pParam->BSIM3v32cf = model->BSIM3v32cf - + model->BSIM3v32lcf * Inv_L - + model->BSIM3v32wcf * Inv_W - + model->BSIM3v32pcf * Inv_LW; - pParam->BSIM3v32clc = model->BSIM3v32clc - + model->BSIM3v32lclc * Inv_L - + model->BSIM3v32wclc * Inv_W - + model->BSIM3v32pclc * Inv_LW; - pParam->BSIM3v32cle = model->BSIM3v32cle - + model->BSIM3v32lcle * Inv_L - + model->BSIM3v32wcle * Inv_W - + model->BSIM3v32pcle * Inv_LW; - pParam->BSIM3v32vfbcv = model->BSIM3v32vfbcv - + model->BSIM3v32lvfbcv * Inv_L - + model->BSIM3v32wvfbcv * Inv_W - + model->BSIM3v32pvfbcv * Inv_LW; - pParam->BSIM3v32acde = model->BSIM3v32acde - + model->BSIM3v32lacde * Inv_L - + model->BSIM3v32wacde * Inv_W - + model->BSIM3v32pacde * Inv_LW; - pParam->BSIM3v32moin = model->BSIM3v32moin - + model->BSIM3v32lmoin * Inv_L - + model->BSIM3v32wmoin * Inv_W - + model->BSIM3v32pmoin * Inv_LW; - pParam->BSIM3v32noff = model->BSIM3v32noff - + model->BSIM3v32lnoff * Inv_L - + model->BSIM3v32wnoff * Inv_W - + model->BSIM3v32pnoff * Inv_LW; - pParam->BSIM3v32voffcv = model->BSIM3v32voffcv - + model->BSIM3v32lvoffcv * Inv_L - + model->BSIM3v32wvoffcv * Inv_W - + model->BSIM3v32pvoffcv * Inv_LW; + pParam->BSIM3v32a1 = model->BSIM3v32a1 + + model->BSIM3v32la1 * Inv_L + + model->BSIM3v32wa1 * Inv_W + + model->BSIM3v32pa1 * Inv_LW; + pParam->BSIM3v32a2 = model->BSIM3v32a2 + + model->BSIM3v32la2 * Inv_L + + model->BSIM3v32wa2 * Inv_W + + model->BSIM3v32pa2 * Inv_LW; + pParam->BSIM3v32keta = model->BSIM3v32keta + + model->BSIM3v32lketa * Inv_L + + model->BSIM3v32wketa * Inv_W + + model->BSIM3v32pketa * Inv_LW; + pParam->BSIM3v32nsub = model->BSIM3v32nsub + + model->BSIM3v32lnsub * Inv_L + + model->BSIM3v32wnsub * Inv_W + + model->BSIM3v32pnsub * Inv_LW; + pParam->BSIM3v32npeak = model->BSIM3v32npeak + + model->BSIM3v32lnpeak * Inv_L + + model->BSIM3v32wnpeak * Inv_W + + model->BSIM3v32pnpeak * Inv_LW; + pParam->BSIM3v32ngate = model->BSIM3v32ngate + + model->BSIM3v32lngate * Inv_L + + model->BSIM3v32wngate * Inv_W + + model->BSIM3v32pngate * Inv_LW; + pParam->BSIM3v32gamma1 = model->BSIM3v32gamma1 + + model->BSIM3v32lgamma1 * Inv_L + + model->BSIM3v32wgamma1 * Inv_W + + model->BSIM3v32pgamma1 * Inv_LW; + pParam->BSIM3v32gamma2 = model->BSIM3v32gamma2 + + model->BSIM3v32lgamma2 * Inv_L + + model->BSIM3v32wgamma2 * Inv_W + + model->BSIM3v32pgamma2 * Inv_LW; + pParam->BSIM3v32vbx = model->BSIM3v32vbx + + model->BSIM3v32lvbx * Inv_L + + model->BSIM3v32wvbx * Inv_W + + model->BSIM3v32pvbx * Inv_LW; + pParam->BSIM3v32vbm = model->BSIM3v32vbm + + model->BSIM3v32lvbm * Inv_L + + model->BSIM3v32wvbm * Inv_W + + model->BSIM3v32pvbm * Inv_LW; + pParam->BSIM3v32xt = model->BSIM3v32xt + + model->BSIM3v32lxt * Inv_L + + model->BSIM3v32wxt * Inv_W + + model->BSIM3v32pxt * Inv_LW; + pParam->BSIM3v32vfb = model->BSIM3v32vfb + + model->BSIM3v32lvfb * Inv_L + + model->BSIM3v32wvfb * Inv_W + + model->BSIM3v32pvfb * Inv_LW; + pParam->BSIM3v32k1 = model->BSIM3v32k1 + + model->BSIM3v32lk1 * Inv_L + + model->BSIM3v32wk1 * Inv_W + + model->BSIM3v32pk1 * Inv_LW; + pParam->BSIM3v32kt1 = model->BSIM3v32kt1 + + model->BSIM3v32lkt1 * Inv_L + + model->BSIM3v32wkt1 * Inv_W + + model->BSIM3v32pkt1 * Inv_LW; + pParam->BSIM3v32kt1l = model->BSIM3v32kt1l + + model->BSIM3v32lkt1l * Inv_L + + model->BSIM3v32wkt1l * Inv_W + + model->BSIM3v32pkt1l * Inv_LW; + pParam->BSIM3v32k2 = model->BSIM3v32k2 + + model->BSIM3v32lk2 * Inv_L + + model->BSIM3v32wk2 * Inv_W + + model->BSIM3v32pk2 * Inv_LW; + pParam->BSIM3v32kt2 = model->BSIM3v32kt2 + + model->BSIM3v32lkt2 * Inv_L + + model->BSIM3v32wkt2 * Inv_W + + model->BSIM3v32pkt2 * Inv_LW; + pParam->BSIM3v32k3 = model->BSIM3v32k3 + + model->BSIM3v32lk3 * Inv_L + + model->BSIM3v32wk3 * Inv_W + + model->BSIM3v32pk3 * Inv_LW; + pParam->BSIM3v32k3b = model->BSIM3v32k3b + + model->BSIM3v32lk3b * Inv_L + + model->BSIM3v32wk3b * Inv_W + + model->BSIM3v32pk3b * Inv_LW; + pParam->BSIM3v32w0 = model->BSIM3v32w0 + + model->BSIM3v32lw0 * Inv_L + + model->BSIM3v32ww0 * Inv_W + + model->BSIM3v32pw0 * Inv_LW; + pParam->BSIM3v32nlx = model->BSIM3v32nlx + + model->BSIM3v32lnlx * Inv_L + + model->BSIM3v32wnlx * Inv_W + + model->BSIM3v32pnlx * Inv_LW; + pParam->BSIM3v32dvt0 = model->BSIM3v32dvt0 + + model->BSIM3v32ldvt0 * Inv_L + + model->BSIM3v32wdvt0 * Inv_W + + model->BSIM3v32pdvt0 * Inv_LW; + pParam->BSIM3v32dvt1 = model->BSIM3v32dvt1 + + model->BSIM3v32ldvt1 * Inv_L + + model->BSIM3v32wdvt1 * Inv_W + + model->BSIM3v32pdvt1 * Inv_LW; + pParam->BSIM3v32dvt2 = model->BSIM3v32dvt2 + + model->BSIM3v32ldvt2 * Inv_L + + model->BSIM3v32wdvt2 * Inv_W + + model->BSIM3v32pdvt2 * Inv_LW; + pParam->BSIM3v32dvt0w = model->BSIM3v32dvt0w + + model->BSIM3v32ldvt0w * Inv_L + + model->BSIM3v32wdvt0w * Inv_W + + model->BSIM3v32pdvt0w * Inv_LW; + pParam->BSIM3v32dvt1w = model->BSIM3v32dvt1w + + model->BSIM3v32ldvt1w * Inv_L + + model->BSIM3v32wdvt1w * Inv_W + + model->BSIM3v32pdvt1w * Inv_LW; + pParam->BSIM3v32dvt2w = model->BSIM3v32dvt2w + + model->BSIM3v32ldvt2w * Inv_L + + model->BSIM3v32wdvt2w * Inv_W + + model->BSIM3v32pdvt2w * Inv_LW; + pParam->BSIM3v32drout = model->BSIM3v32drout + + model->BSIM3v32ldrout * Inv_L + + model->BSIM3v32wdrout * Inv_W + + model->BSIM3v32pdrout * Inv_LW; + pParam->BSIM3v32dsub = model->BSIM3v32dsub + + model->BSIM3v32ldsub * Inv_L + + model->BSIM3v32wdsub * Inv_W + + model->BSIM3v32pdsub * Inv_LW; + pParam->BSIM3v32vth0 = model->BSIM3v32vth0 + + model->BSIM3v32lvth0 * Inv_L + + model->BSIM3v32wvth0 * Inv_W + + model->BSIM3v32pvth0 * Inv_LW; + pParam->BSIM3v32ua = model->BSIM3v32ua + + model->BSIM3v32lua * Inv_L + + model->BSIM3v32wua * Inv_W + + model->BSIM3v32pua * Inv_LW; + pParam->BSIM3v32ua1 = model->BSIM3v32ua1 + + model->BSIM3v32lua1 * Inv_L + + model->BSIM3v32wua1 * Inv_W + + model->BSIM3v32pua1 * Inv_LW; + pParam->BSIM3v32ub = model->BSIM3v32ub + + model->BSIM3v32lub * Inv_L + + model->BSIM3v32wub * Inv_W + + model->BSIM3v32pub * Inv_LW; + pParam->BSIM3v32ub1 = model->BSIM3v32ub1 + + model->BSIM3v32lub1 * Inv_L + + model->BSIM3v32wub1 * Inv_W + + model->BSIM3v32pub1 * Inv_LW; + pParam->BSIM3v32uc = model->BSIM3v32uc + + model->BSIM3v32luc * Inv_L + + model->BSIM3v32wuc * Inv_W + + model->BSIM3v32puc * Inv_LW; + pParam->BSIM3v32uc1 = model->BSIM3v32uc1 + + model->BSIM3v32luc1 * Inv_L + + model->BSIM3v32wuc1 * Inv_W + + model->BSIM3v32puc1 * Inv_LW; + pParam->BSIM3v32u0 = model->BSIM3v32u0 + + model->BSIM3v32lu0 * Inv_L + + model->BSIM3v32wu0 * Inv_W + + model->BSIM3v32pu0 * Inv_LW; + pParam->BSIM3v32ute = model->BSIM3v32ute + + model->BSIM3v32lute * Inv_L + + model->BSIM3v32wute * Inv_W + + model->BSIM3v32pute * Inv_LW; + pParam->BSIM3v32voff = model->BSIM3v32voff + + model->BSIM3v32lvoff * Inv_L + + model->BSIM3v32wvoff * Inv_W + + model->BSIM3v32pvoff * Inv_LW; + pParam->BSIM3v32delta = model->BSIM3v32delta + + model->BSIM3v32ldelta * Inv_L + + model->BSIM3v32wdelta * Inv_W + + model->BSIM3v32pdelta * Inv_LW; + pParam->BSIM3v32rdsw = model->BSIM3v32rdsw + + model->BSIM3v32lrdsw * Inv_L + + model->BSIM3v32wrdsw * Inv_W + + model->BSIM3v32prdsw * Inv_LW; + pParam->BSIM3v32prwg = model->BSIM3v32prwg + + model->BSIM3v32lprwg * Inv_L + + model->BSIM3v32wprwg * Inv_W + + model->BSIM3v32pprwg * Inv_LW; + pParam->BSIM3v32prwb = model->BSIM3v32prwb + + model->BSIM3v32lprwb * Inv_L + + model->BSIM3v32wprwb * Inv_W + + model->BSIM3v32pprwb * Inv_LW; + pParam->BSIM3v32prt = model->BSIM3v32prt + + model->BSIM3v32lprt * Inv_L + + model->BSIM3v32wprt * Inv_W + + model->BSIM3v32pprt * Inv_LW; + pParam->BSIM3v32eta0 = model->BSIM3v32eta0 + + model->BSIM3v32leta0 * Inv_L + + model->BSIM3v32weta0 * Inv_W + + model->BSIM3v32peta0 * Inv_LW; + pParam->BSIM3v32etab = model->BSIM3v32etab + + model->BSIM3v32letab * Inv_L + + model->BSIM3v32wetab * Inv_W + + model->BSIM3v32petab * Inv_LW; + pParam->BSIM3v32pclm = model->BSIM3v32pclm + + model->BSIM3v32lpclm * Inv_L + + model->BSIM3v32wpclm * Inv_W + + model->BSIM3v32ppclm * Inv_LW; + pParam->BSIM3v32pdibl1 = model->BSIM3v32pdibl1 + + model->BSIM3v32lpdibl1 * Inv_L + + model->BSIM3v32wpdibl1 * Inv_W + + model->BSIM3v32ppdibl1 * Inv_LW; + pParam->BSIM3v32pdibl2 = model->BSIM3v32pdibl2 + + model->BSIM3v32lpdibl2 * Inv_L + + model->BSIM3v32wpdibl2 * Inv_W + + model->BSIM3v32ppdibl2 * Inv_LW; + pParam->BSIM3v32pdiblb = model->BSIM3v32pdiblb + + model->BSIM3v32lpdiblb * Inv_L + + model->BSIM3v32wpdiblb * Inv_W + + model->BSIM3v32ppdiblb * Inv_LW; + pParam->BSIM3v32pscbe1 = model->BSIM3v32pscbe1 + + model->BSIM3v32lpscbe1 * Inv_L + + model->BSIM3v32wpscbe1 * Inv_W + + model->BSIM3v32ppscbe1 * Inv_LW; + pParam->BSIM3v32pscbe2 = model->BSIM3v32pscbe2 + + model->BSIM3v32lpscbe2 * Inv_L + + model->BSIM3v32wpscbe2 * Inv_W + + model->BSIM3v32ppscbe2 * Inv_LW; + pParam->BSIM3v32pvag = model->BSIM3v32pvag + + model->BSIM3v32lpvag * Inv_L + + model->BSIM3v32wpvag * Inv_W + + model->BSIM3v32ppvag * Inv_LW; + pParam->BSIM3v32wr = model->BSIM3v32wr + + model->BSIM3v32lwr * Inv_L + + model->BSIM3v32wwr * Inv_W + + model->BSIM3v32pwr * Inv_LW; + pParam->BSIM3v32dwg = model->BSIM3v32dwg + + model->BSIM3v32ldwg * Inv_L + + model->BSIM3v32wdwg * Inv_W + + model->BSIM3v32pdwg * Inv_LW; + pParam->BSIM3v32dwb = model->BSIM3v32dwb + + model->BSIM3v32ldwb * Inv_L + + model->BSIM3v32wdwb * Inv_W + + model->BSIM3v32pdwb * Inv_LW; + pParam->BSIM3v32b0 = model->BSIM3v32b0 + + model->BSIM3v32lb0 * Inv_L + + model->BSIM3v32wb0 * Inv_W + + model->BSIM3v32pb0 * Inv_LW; + pParam->BSIM3v32b1 = model->BSIM3v32b1 + + model->BSIM3v32lb1 * Inv_L + + model->BSIM3v32wb1 * Inv_W + + model->BSIM3v32pb1 * Inv_LW; + pParam->BSIM3v32alpha0 = model->BSIM3v32alpha0 + + model->BSIM3v32lalpha0 * Inv_L + + model->BSIM3v32walpha0 * Inv_W + + model->BSIM3v32palpha0 * Inv_LW; + pParam->BSIM3v32alpha1 = model->BSIM3v32alpha1 + + model->BSIM3v32lalpha1 * Inv_L + + model->BSIM3v32walpha1 * Inv_W + + model->BSIM3v32palpha1 * Inv_LW; + pParam->BSIM3v32beta0 = model->BSIM3v32beta0 + + model->BSIM3v32lbeta0 * Inv_L + + model->BSIM3v32wbeta0 * Inv_W + + model->BSIM3v32pbeta0 * Inv_LW; + /* CV model */ + pParam->BSIM3v32elm = model->BSIM3v32elm + + model->BSIM3v32lelm * Inv_L + + model->BSIM3v32welm * Inv_W + + model->BSIM3v32pelm * Inv_LW; + pParam->BSIM3v32cgsl = model->BSIM3v32cgsl + + model->BSIM3v32lcgsl * Inv_L + + model->BSIM3v32wcgsl * Inv_W + + model->BSIM3v32pcgsl * Inv_LW; + pParam->BSIM3v32cgdl = model->BSIM3v32cgdl + + model->BSIM3v32lcgdl * Inv_L + + model->BSIM3v32wcgdl * Inv_W + + model->BSIM3v32pcgdl * Inv_LW; + pParam->BSIM3v32ckappa = model->BSIM3v32ckappa + + model->BSIM3v32lckappa * Inv_L + + model->BSIM3v32wckappa * Inv_W + + model->BSIM3v32pckappa * Inv_LW; + pParam->BSIM3v32cf = model->BSIM3v32cf + + model->BSIM3v32lcf * Inv_L + + model->BSIM3v32wcf * Inv_W + + model->BSIM3v32pcf * Inv_LW; + pParam->BSIM3v32clc = model->BSIM3v32clc + + model->BSIM3v32lclc * Inv_L + + model->BSIM3v32wclc * Inv_W + + model->BSIM3v32pclc * Inv_LW; + pParam->BSIM3v32cle = model->BSIM3v32cle + + model->BSIM3v32lcle * Inv_L + + model->BSIM3v32wcle * Inv_W + + model->BSIM3v32pcle * Inv_LW; + pParam->BSIM3v32vfbcv = model->BSIM3v32vfbcv + + model->BSIM3v32lvfbcv * Inv_L + + model->BSIM3v32wvfbcv * Inv_W + + model->BSIM3v32pvfbcv * Inv_LW; + pParam->BSIM3v32acde = model->BSIM3v32acde + + model->BSIM3v32lacde * Inv_L + + model->BSIM3v32wacde * Inv_W + + model->BSIM3v32pacde * Inv_LW; + pParam->BSIM3v32moin = model->BSIM3v32moin + + model->BSIM3v32lmoin * Inv_L + + model->BSIM3v32wmoin * Inv_W + + model->BSIM3v32pmoin * Inv_LW; + pParam->BSIM3v32noff = model->BSIM3v32noff + + model->BSIM3v32lnoff * Inv_L + + model->BSIM3v32wnoff * Inv_W + + model->BSIM3v32pnoff * Inv_LW; + pParam->BSIM3v32voffcv = model->BSIM3v32voffcv + + model->BSIM3v32lvoffcv * Inv_L + + model->BSIM3v32wvoffcv * Inv_W + + model->BSIM3v32pvoffcv * Inv_LW; - pParam->BSIM3v32abulkCVfactor = 1.0 + pow((pParam->BSIM3v32clc - / pParam->BSIM3v32leffCV), - pParam->BSIM3v32cle); + pParam->BSIM3v32abulkCVfactor = 1.0 + pow((pParam->BSIM3v32clc + / pParam->BSIM3v32leffCV), + pParam->BSIM3v32cle); - T0 = (TRatio - 1.0); - pParam->BSIM3v32ua = pParam->BSIM3v32ua + pParam->BSIM3v32ua1 * T0; - pParam->BSIM3v32ub = pParam->BSIM3v32ub + pParam->BSIM3v32ub1 * T0; - pParam->BSIM3v32uc = pParam->BSIM3v32uc + pParam->BSIM3v32uc1 * T0; - if (pParam->BSIM3v32u0 > 1.0) - pParam->BSIM3v32u0 = pParam->BSIM3v32u0 / 1.0e4; + T0 = (TRatio - 1.0); + pParam->BSIM3v32ua = pParam->BSIM3v32ua + pParam->BSIM3v32ua1 * T0; + pParam->BSIM3v32ub = pParam->BSIM3v32ub + pParam->BSIM3v32ub1 * T0; + pParam->BSIM3v32uc = pParam->BSIM3v32uc + pParam->BSIM3v32uc1 * T0; + if (pParam->BSIM3v32u0 > 1.0) + pParam->BSIM3v32u0 = pParam->BSIM3v32u0 / 1.0e4; - pParam->BSIM3v32u0temp = pParam->BSIM3v32u0 - * pow(TRatio, pParam->BSIM3v32ute); - pParam->BSIM3v32vsattemp = pParam->BSIM3v32vsat - pParam->BSIM3v32at - * T0; - pParam->BSIM3v32rds0 = (pParam->BSIM3v32rdsw + pParam->BSIM3v32prt * T0) - / pow(pParam->BSIM3v32weff * 1E6, pParam->BSIM3v32wr); + pParam->BSIM3v32u0temp = pParam->BSIM3v32u0 + * pow(TRatio, pParam->BSIM3v32ute); + pParam->BSIM3v32vsattemp = pParam->BSIM3v32vsat - pParam->BSIM3v32at + * T0; + pParam->BSIM3v32rds0 = (pParam->BSIM3v32rdsw + pParam->BSIM3v32prt * T0) + / pow(pParam->BSIM3v32weff * 1E6, pParam->BSIM3v32wr); - if (BSIM3v32checkModel(model, here, ckt)) - { IFuid namarray[2]; - namarray[0] = model->BSIM3v32modName; - namarray[1] = here->BSIM3v32name; - SPfrontEnd->IFerror (ERR_FATAL, "Fatal error(s) detected during BSIM3v32V3.2 parameter checking for %s in model %s", namarray); - return(E_BADPARM); - } + if (BSIM3v32checkModel(model, here, ckt)) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v32modName; + namarray[1] = here->BSIM3v32name; + SPfrontEnd->IFerror (ERR_FATAL, "Fatal error(s) detected during BSIM3v32V3.2 parameter checking for %s in model %s", namarray); + return(E_BADPARM); + } - pParam->BSIM3v32cgdo = (model->BSIM3v32cgdo + pParam->BSIM3v32cf) - * pParam->BSIM3v32weffCV; - pParam->BSIM3v32cgso = (model->BSIM3v32cgso + pParam->BSIM3v32cf) - * pParam->BSIM3v32weffCV; - pParam->BSIM3v32cgbo = model->BSIM3v32cgbo * pParam->BSIM3v32leffCV; + pParam->BSIM3v32cgdo = (model->BSIM3v32cgdo + pParam->BSIM3v32cf) + * pParam->BSIM3v32weffCV; + pParam->BSIM3v32cgso = (model->BSIM3v32cgso + pParam->BSIM3v32cf) + * pParam->BSIM3v32weffCV; + pParam->BSIM3v32cgbo = model->BSIM3v32cgbo * pParam->BSIM3v32leffCV; - T0 = pParam->BSIM3v32leffCV * pParam->BSIM3v32leffCV; - pParam->BSIM3v32tconst = pParam->BSIM3v32u0temp * pParam->BSIM3v32elm / (model->BSIM3v32cox - * pParam->BSIM3v32weffCV * pParam->BSIM3v32leffCV * T0); + T0 = pParam->BSIM3v32leffCV * pParam->BSIM3v32leffCV; + pParam->BSIM3v32tconst = pParam->BSIM3v32u0temp * pParam->BSIM3v32elm / (model->BSIM3v32cox + * pParam->BSIM3v32weffCV * pParam->BSIM3v32leffCV * T0); - if (!model->BSIM3v32npeakGiven && model->BSIM3v32gamma1Given) - { T0 = pParam->BSIM3v32gamma1 * model->BSIM3v32cox; - pParam->BSIM3v32npeak = 3.021E22 * T0 * T0; - } + if (!model->BSIM3v32npeakGiven && model->BSIM3v32gamma1Given) + { T0 = pParam->BSIM3v32gamma1 * model->BSIM3v32cox; + pParam->BSIM3v32npeak = 3.021E22 * T0 * T0; + } - pParam->BSIM3v32phi = 2.0 * Vtm0 - * log(pParam->BSIM3v32npeak / ni); + pParam->BSIM3v32phi = 2.0 * Vtm0 + * log(pParam->BSIM3v32npeak / ni); - pParam->BSIM3v32sqrtPhi = sqrt(pParam->BSIM3v32phi); - pParam->BSIM3v32phis3 = pParam->BSIM3v32sqrtPhi * pParam->BSIM3v32phi; + pParam->BSIM3v32sqrtPhi = sqrt(pParam->BSIM3v32phi); + pParam->BSIM3v32phis3 = pParam->BSIM3v32sqrtPhi * pParam->BSIM3v32phi; - pParam->BSIM3v32Xdep0 = sqrt(2.0 * EPSSI / (Charge_q - * pParam->BSIM3v32npeak * 1.0e6)) - * pParam->BSIM3v32sqrtPhi; - pParam->BSIM3v32sqrtXdep0 = sqrt(pParam->BSIM3v32Xdep0); - pParam->BSIM3v32litl = sqrt(3.0 * pParam->BSIM3v32xj - * model->BSIM3v32tox); - pParam->BSIM3v32vbi = Vtm0 * log(1.0e20 - * pParam->BSIM3v32npeak / (ni * ni)); - pParam->BSIM3v32cdep0 = sqrt(Charge_q * EPSSI - * pParam->BSIM3v32npeak * 1.0e6 / 2.0 - / pParam->BSIM3v32phi); + pParam->BSIM3v32Xdep0 = sqrt(2.0 * EPSSI / (Charge_q + * pParam->BSIM3v32npeak * 1.0e6)) + * pParam->BSIM3v32sqrtPhi; + pParam->BSIM3v32sqrtXdep0 = sqrt(pParam->BSIM3v32Xdep0); + pParam->BSIM3v32litl = sqrt(3.0 * pParam->BSIM3v32xj + * model->BSIM3v32tox); + pParam->BSIM3v32vbi = Vtm0 * log(1.0e20 + * pParam->BSIM3v32npeak / (ni * ni)); + pParam->BSIM3v32cdep0 = sqrt(Charge_q * EPSSI + * pParam->BSIM3v32npeak * 1.0e6 / 2.0 + / pParam->BSIM3v32phi); - pParam->BSIM3v32ldeb = sqrt(EPSSI * Vtm0 / (Charge_q - * pParam->BSIM3v32npeak * 1.0e6)) / 3.0; - pParam->BSIM3v32acde *= pow((pParam->BSIM3v32npeak / 2.0e16), -0.25); + pParam->BSIM3v32ldeb = sqrt(EPSSI * Vtm0 / (Charge_q + * pParam->BSIM3v32npeak * 1.0e6)) / 3.0; + pParam->BSIM3v32acde *= pow((pParam->BSIM3v32npeak / 2.0e16), -0.25); - if (model->BSIM3v32k1Given || model->BSIM3v32k2Given) - { if (!model->BSIM3v32k1Given) - { - if ((!ckt->CKTcurJob) || (ckt->CKTcurJob->JOBtype < 9)) /* don't print in sensitivity */ - fprintf(stdout, "Warning: k1 should be specified with k2.\n"); - pParam->BSIM3v32k1 = 0.53; - } - if (!model->BSIM3v32k2Given) - { - if ((!ckt->CKTcurJob) || (ckt->CKTcurJob->JOBtype < 9)) /* don't print in sensitivity */ - fprintf(stdout, "Warning: k2 should be specified with k1.\n"); - pParam->BSIM3v32k2 = -0.0186; - } - if ((!ckt->CKTcurJob) || (ckt->CKTcurJob->JOBtype < 9)) { /* don't print in sensitivity */ - if (model->BSIM3v32nsubGiven) - fprintf(stdout, "Warning: nsub is ignored because k1 or k2 is given.\n"); - if (model->BSIM3v32xtGiven) - fprintf(stdout, "Warning: xt is ignored because k1 or k2 is given.\n"); - if (model->BSIM3v32vbxGiven) - fprintf(stdout, "Warning: vbx is ignored because k1 or k2 is given.\n"); - if (model->BSIM3v32gamma1Given) - fprintf(stdout, "Warning: gamma1 is ignored because k1 or k2 is given.\n"); - if (model->BSIM3v32gamma2Given) - fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n"); - } - } - else - { if (!model->BSIM3v32vbxGiven) - pParam->BSIM3v32vbx = pParam->BSIM3v32phi - 7.7348e-4 - * pParam->BSIM3v32npeak - * pParam->BSIM3v32xt * pParam->BSIM3v32xt; - if (pParam->BSIM3v32vbx > 0.0) - pParam->BSIM3v32vbx = -pParam->BSIM3v32vbx; - if (pParam->BSIM3v32vbm > 0.0) - pParam->BSIM3v32vbm = -pParam->BSIM3v32vbm; + if (model->BSIM3v32k1Given || model->BSIM3v32k2Given) + { if (!model->BSIM3v32k1Given) + { + if ((!ckt->CKTcurJob) || (ckt->CKTcurJob->JOBtype < 9)) /* don't print in sensitivity */ + fprintf(stdout, "Warning: k1 should be specified with k2.\n"); + pParam->BSIM3v32k1 = 0.53; + } + if (!model->BSIM3v32k2Given) + { + if ((!ckt->CKTcurJob) || (ckt->CKTcurJob->JOBtype < 9)) /* don't print in sensitivity */ + fprintf(stdout, "Warning: k2 should be specified with k1.\n"); + pParam->BSIM3v32k2 = -0.0186; + } + if ((!ckt->CKTcurJob) || (ckt->CKTcurJob->JOBtype < 9)) { /* don't print in sensitivity */ + if (model->BSIM3v32nsubGiven) + fprintf(stdout, "Warning: nsub is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v32xtGiven) + fprintf(stdout, "Warning: xt is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v32vbxGiven) + fprintf(stdout, "Warning: vbx is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v32gamma1Given) + fprintf(stdout, "Warning: gamma1 is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v32gamma2Given) + fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n"); + } + } + else + { if (!model->BSIM3v32vbxGiven) + pParam->BSIM3v32vbx = pParam->BSIM3v32phi - 7.7348e-4 + * pParam->BSIM3v32npeak + * pParam->BSIM3v32xt * pParam->BSIM3v32xt; + if (pParam->BSIM3v32vbx > 0.0) + pParam->BSIM3v32vbx = -pParam->BSIM3v32vbx; + if (pParam->BSIM3v32vbm > 0.0) + pParam->BSIM3v32vbm = -pParam->BSIM3v32vbm; - if (!model->BSIM3v32gamma1Given) - pParam->BSIM3v32gamma1 = 5.753e-12 - * sqrt(pParam->BSIM3v32npeak) - / model->BSIM3v32cox; - if (!model->BSIM3v32gamma2Given) - pParam->BSIM3v32gamma2 = 5.753e-12 - * sqrt(pParam->BSIM3v32nsub) - / model->BSIM3v32cox; + if (!model->BSIM3v32gamma1Given) + pParam->BSIM3v32gamma1 = 5.753e-12 + * sqrt(pParam->BSIM3v32npeak) + / model->BSIM3v32cox; + if (!model->BSIM3v32gamma2Given) + pParam->BSIM3v32gamma2 = 5.753e-12 + * sqrt(pParam->BSIM3v32nsub) + / model->BSIM3v32cox; - T0 = pParam->BSIM3v32gamma1 - pParam->BSIM3v32gamma2; - T1 = sqrt(pParam->BSIM3v32phi - pParam->BSIM3v32vbx) - - pParam->BSIM3v32sqrtPhi; - T2 = sqrt(pParam->BSIM3v32phi * (pParam->BSIM3v32phi - - pParam->BSIM3v32vbm)) - pParam->BSIM3v32phi; - pParam->BSIM3v32k2 = T0 * T1 / (2.0 * T2 + pParam->BSIM3v32vbm); - pParam->BSIM3v32k1 = pParam->BSIM3v32gamma2 - 2.0 - * pParam->BSIM3v32k2 * sqrt(pParam->BSIM3v32phi - - pParam->BSIM3v32vbm); - } + T0 = pParam->BSIM3v32gamma1 - pParam->BSIM3v32gamma2; + T1 = sqrt(pParam->BSIM3v32phi - pParam->BSIM3v32vbx) + - pParam->BSIM3v32sqrtPhi; + T2 = sqrt(pParam->BSIM3v32phi * (pParam->BSIM3v32phi + - pParam->BSIM3v32vbm)) - pParam->BSIM3v32phi; + pParam->BSIM3v32k2 = T0 * T1 / (2.0 * T2 + pParam->BSIM3v32vbm); + pParam->BSIM3v32k1 = pParam->BSIM3v32gamma2 - 2.0 + * pParam->BSIM3v32k2 * sqrt(pParam->BSIM3v32phi + - pParam->BSIM3v32vbm); + } - if (pParam->BSIM3v32k2 < 0.0) - { T0 = 0.5 * pParam->BSIM3v32k1 / pParam->BSIM3v32k2; - pParam->BSIM3v32vbsc = 0.9 * (pParam->BSIM3v32phi - T0 * T0); - if (pParam->BSIM3v32vbsc > -3.0) - pParam->BSIM3v32vbsc = -3.0; - else if (pParam->BSIM3v32vbsc < -30.0) - pParam->BSIM3v32vbsc = -30.0; - } - else - { pParam->BSIM3v32vbsc = -30.0; - } - if (pParam->BSIM3v32vbsc > pParam->BSIM3v32vbm) - pParam->BSIM3v32vbsc = pParam->BSIM3v32vbm; + if (pParam->BSIM3v32k2 < 0.0) + { T0 = 0.5 * pParam->BSIM3v32k1 / pParam->BSIM3v32k2; + pParam->BSIM3v32vbsc = 0.9 * (pParam->BSIM3v32phi - T0 * T0); + if (pParam->BSIM3v32vbsc > -3.0) + pParam->BSIM3v32vbsc = -3.0; + else if (pParam->BSIM3v32vbsc < -30.0) + pParam->BSIM3v32vbsc = -30.0; + } + else + { pParam->BSIM3v32vbsc = -30.0; + } + if (pParam->BSIM3v32vbsc > pParam->BSIM3v32vbm) + pParam->BSIM3v32vbsc = pParam->BSIM3v32vbm; - if (!model->BSIM3v32vfbGiven) - { if (model->BSIM3v32vth0Given) - { pParam->BSIM3v32vfb = model->BSIM3v32type * pParam->BSIM3v32vth0 - - pParam->BSIM3v32phi - pParam->BSIM3v32k1 - * pParam->BSIM3v32sqrtPhi; - } - else - { pParam->BSIM3v32vfb = -1.0; - } - } - if (!model->BSIM3v32vth0Given) - { pParam->BSIM3v32vth0 = model->BSIM3v32type * (pParam->BSIM3v32vfb - + pParam->BSIM3v32phi + pParam->BSIM3v32k1 - * pParam->BSIM3v32sqrtPhi); - } + if (!model->BSIM3v32vfbGiven) + { if (model->BSIM3v32vth0Given) + { pParam->BSIM3v32vfb = model->BSIM3v32type * pParam->BSIM3v32vth0 + - pParam->BSIM3v32phi - pParam->BSIM3v32k1 + * pParam->BSIM3v32sqrtPhi; + } + else + { pParam->BSIM3v32vfb = -1.0; + } + } + if (!model->BSIM3v32vth0Given) + { pParam->BSIM3v32vth0 = model->BSIM3v32type * (pParam->BSIM3v32vfb + + pParam->BSIM3v32phi + pParam->BSIM3v32k1 + * pParam->BSIM3v32sqrtPhi); + } - pParam->BSIM3v32k1ox = pParam->BSIM3v32k1 * model->BSIM3v32tox - / model->BSIM3v32toxm; - pParam->BSIM3v32k2ox = pParam->BSIM3v32k2 * model->BSIM3v32tox - / model->BSIM3v32toxm; + pParam->BSIM3v32k1ox = pParam->BSIM3v32k1 * model->BSIM3v32tox + / model->BSIM3v32toxm; + pParam->BSIM3v32k2ox = pParam->BSIM3v32k2 * model->BSIM3v32tox + / model->BSIM3v32toxm; - T1 = sqrt(EPSSI / EPSOX * model->BSIM3v32tox - * pParam->BSIM3v32Xdep0); - T0 = exp(-0.5 * pParam->BSIM3v32dsub * pParam->BSIM3v32leff / T1); - pParam->BSIM3v32theta0vb0 = (T0 + 2.0 * T0 * T0); + T1 = sqrt(EPSSI / EPSOX * model->BSIM3v32tox + * pParam->BSIM3v32Xdep0); + T0 = exp(-0.5 * pParam->BSIM3v32dsub * pParam->BSIM3v32leff / T1); + pParam->BSIM3v32theta0vb0 = (T0 + 2.0 * T0 * T0); - T0 = exp(-0.5 * pParam->BSIM3v32drout * pParam->BSIM3v32leff / T1); - T2 = (T0 + 2.0 * T0 * T0); - pParam->BSIM3v32thetaRout = pParam->BSIM3v32pdibl1 * T2 - + pParam->BSIM3v32pdibl2; + T0 = exp(-0.5 * pParam->BSIM3v32drout * pParam->BSIM3v32leff / T1); + T2 = (T0 + 2.0 * T0 * T0); + pParam->BSIM3v32thetaRout = pParam->BSIM3v32pdibl1 * T2 + + pParam->BSIM3v32pdibl2; - tmp = sqrt(pParam->BSIM3v32Xdep0); - tmp1 = pParam->BSIM3v32vbi - pParam->BSIM3v32phi; - tmp2 = model->BSIM3v32factor1 * tmp; + tmp = sqrt(pParam->BSIM3v32Xdep0); + tmp1 = pParam->BSIM3v32vbi - pParam->BSIM3v32phi; + tmp2 = model->BSIM3v32factor1 * tmp; - T0 = -0.5 * pParam->BSIM3v32dvt1w * pParam->BSIM3v32weff - * pParam->BSIM3v32leff / tmp2; - if (T0 > -EXP_THRESHOLD) - { T1 = exp(T0); - T2 = T1 * (1.0 + 2.0 * T1); - } - else - { T1 = MIN_EXP; - T2 = T1 * (1.0 + 2.0 * T1); - } - T0 = pParam->BSIM3v32dvt0w * T2; - T2 = T0 * tmp1; + T0 = -0.5 * pParam->BSIM3v32dvt1w * pParam->BSIM3v32weff + * pParam->BSIM3v32leff / tmp2; + if (T0 > -EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 * (1.0 + 2.0 * T1); + } + else + { T1 = MIN_EXP; + T2 = T1 * (1.0 + 2.0 * T1); + } + T0 = pParam->BSIM3v32dvt0w * T2; + T2 = T0 * tmp1; - T0 = -0.5 * pParam->BSIM3v32dvt1 * pParam->BSIM3v32leff / tmp2; - if (T0 > -EXP_THRESHOLD) - { T1 = exp(T0); - T3 = T1 * (1.0 + 2.0 * T1); - } - else - { T1 = MIN_EXP; - T3 = T1 * (1.0 + 2.0 * T1); - } - T3 = pParam->BSIM3v32dvt0 * T3 * tmp1; + T0 = -0.5 * pParam->BSIM3v32dvt1 * pParam->BSIM3v32leff / tmp2; + if (T0 > -EXP_THRESHOLD) + { T1 = exp(T0); + T3 = T1 * (1.0 + 2.0 * T1); + } + else + { T1 = MIN_EXP; + T3 = T1 * (1.0 + 2.0 * T1); + } + T3 = pParam->BSIM3v32dvt0 * T3 * tmp1; - T4 = model->BSIM3v32tox * pParam->BSIM3v32phi - / (pParam->BSIM3v32weff + pParam->BSIM3v32w0); + T4 = model->BSIM3v32tox * pParam->BSIM3v32phi + / (pParam->BSIM3v32weff + pParam->BSIM3v32w0); - T0 = sqrt(1.0 + pParam->BSIM3v32nlx / pParam->BSIM3v32leff); - T5 = pParam->BSIM3v32k1ox * (T0 - 1.0) * pParam->BSIM3v32sqrtPhi - + (pParam->BSIM3v32kt1 + pParam->BSIM3v32kt1l / pParam->BSIM3v32leff) - * (TRatio - 1.0); + T0 = sqrt(1.0 + pParam->BSIM3v32nlx / pParam->BSIM3v32leff); + T5 = pParam->BSIM3v32k1ox * (T0 - 1.0) * pParam->BSIM3v32sqrtPhi + + (pParam->BSIM3v32kt1 + pParam->BSIM3v32kt1l / pParam->BSIM3v32leff) + * (TRatio - 1.0); - tmp3 = model->BSIM3v32type * pParam->BSIM3v32vth0 - - T2 - T3 + pParam->BSIM3v32k3 * T4 + T5; - pParam->BSIM3v32vfbzb = tmp3 - pParam->BSIM3v32phi - pParam->BSIM3v32k1 - * pParam->BSIM3v32sqrtPhi; - /* End of vfbzb */ - } + tmp3 = model->BSIM3v32type * pParam->BSIM3v32vth0 + - T2 - T3 + pParam->BSIM3v32k3 * T4 + T5; + pParam->BSIM3v32vfbzb = tmp3 - pParam->BSIM3v32phi - pParam->BSIM3v32k1 + * pParam->BSIM3v32sqrtPhi; + /* End of vfbzb */ + } - /* adding delvto */ - here->BSIM3v32vth0 = pParam->BSIM3v32vth0 + here->BSIM3v32delvto; - here->BSIM3v32vfb = pParam->BSIM3v32vfb + model->BSIM3v32type * here->BSIM3v32delvto; - here->BSIM3v32vfbzb = pParam->BSIM3v32vfbzb + model->BSIM3v32type * here->BSIM3v32delvto; + /* adding delvto */ + here->BSIM3v32vth0 = pParam->BSIM3v32vth0 + here->BSIM3v32delvto; + here->BSIM3v32vfb = pParam->BSIM3v32vfb + model->BSIM3v32type * here->BSIM3v32delvto; + here->BSIM3v32vfbzb = pParam->BSIM3v32vfbzb + model->BSIM3v32type * here->BSIM3v32delvto; - /* low field mobility multiplier */ - here->BSIM3v32u0temp = pParam->BSIM3v32u0temp * here->BSIM3v32mulu0; + /* low field mobility multiplier */ + here->BSIM3v32u0temp = pParam->BSIM3v32u0temp * here->BSIM3v32mulu0; - here->BSIM3v32tconst = here->BSIM3v32u0temp * pParam->BSIM3v32elm / (model->BSIM3v32cox - * pParam->BSIM3v32weffCV * pParam->BSIM3v32leffCV * T0); + here->BSIM3v32tconst = here->BSIM3v32u0temp * pParam->BSIM3v32elm / (model->BSIM3v32cox + * pParam->BSIM3v32weffCV * pParam->BSIM3v32leffCV * T0); - /* process source/drain series resistance */ - /* acm model */ - if (model->BSIM3v32acmMod == 0) - { - here->BSIM3v32drainConductance = model->BSIM3v32sheetResistance - * here->BSIM3v32drainSquares; - here->BSIM3v32sourceConductance = model->BSIM3v32sheetResistance - * here->BSIM3v32sourceSquares; - } - else - { - if (here->BSIM3v32drainSquaresGiven) - { - here->BSIM3v32drainConductance = (model->BSIM3v32ld + model->BSIM3v32ldif)/(here->BSIM3v32w + model->BSIM3v32xw)*model->BSIM3v32rd - + model->BSIM3v32sheetResistance * here->BSIM3v32drainSquares + model->BSIM3v32rdc; - } - else - { - here->BSIM3v32drainConductance = ((model->BSIM3v32ld + model->BSIM3v32ldif)*model->BSIM3v32rd - + model->BSIM3v32hdif*model->BSIM3v32sheetResistance)/(here->BSIM3v32w + model->BSIM3v32xw) + model->BSIM3v32rdc; - } - if (here->BSIM3v32sourceSquaresGiven) - { - here->BSIM3v32sourceConductance = (model->BSIM3v32ld + model->BSIM3v32ldif)/(here->BSIM3v32w + model->BSIM3v32xw)*model->BSIM3v32rs - + model->BSIM3v32sheetResistance * here->BSIM3v32sourceSquares + model->BSIM3v32rsc; - } - else - { - here->BSIM3v32sourceConductance = ((model->BSIM3v32ld + model->BSIM3v32ldif)*model->BSIM3v32rs - + model->BSIM3v32hdif*model->BSIM3v32sheetResistance)/(here->BSIM3v32w + model->BSIM3v32xw) + model->BSIM3v32rsc; - } - } - if (here->BSIM3v32drainConductance > 0.0) - here->BSIM3v32drainConductance = 1.0 - / here->BSIM3v32drainConductance; - else - here->BSIM3v32drainConductance = 0.0; + /* process source/drain series resistance */ + /* acm model */ + if (model->BSIM3v32acmMod == 0) + { + here->BSIM3v32drainConductance = model->BSIM3v32sheetResistance + * here->BSIM3v32drainSquares; + here->BSIM3v32sourceConductance = model->BSIM3v32sheetResistance + * here->BSIM3v32sourceSquares; + } + else + { + if (here->BSIM3v32drainSquaresGiven) + { + here->BSIM3v32drainConductance = (model->BSIM3v32ld + model->BSIM3v32ldif)/(here->BSIM3v32w + model->BSIM3v32xw)*model->BSIM3v32rd + + model->BSIM3v32sheetResistance * here->BSIM3v32drainSquares + model->BSIM3v32rdc; + } + else + { + here->BSIM3v32drainConductance = ((model->BSIM3v32ld + model->BSIM3v32ldif)*model->BSIM3v32rd + + model->BSIM3v32hdif*model->BSIM3v32sheetResistance)/(here->BSIM3v32w + model->BSIM3v32xw) + model->BSIM3v32rdc; + } + if (here->BSIM3v32sourceSquaresGiven) + { + here->BSIM3v32sourceConductance = (model->BSIM3v32ld + model->BSIM3v32ldif)/(here->BSIM3v32w + model->BSIM3v32xw)*model->BSIM3v32rs + + model->BSIM3v32sheetResistance * here->BSIM3v32sourceSquares + model->BSIM3v32rsc; + } + else + { + here->BSIM3v32sourceConductance = ((model->BSIM3v32ld + model->BSIM3v32ldif)*model->BSIM3v32rs + + model->BSIM3v32hdif*model->BSIM3v32sheetResistance)/(here->BSIM3v32w + model->BSIM3v32xw) + model->BSIM3v32rsc; + } + } + if (here->BSIM3v32drainConductance > 0.0) + here->BSIM3v32drainConductance = 1.0 + / here->BSIM3v32drainConductance; + else + here->BSIM3v32drainConductance = 0.0; - if (here->BSIM3v32sourceConductance > 0.0) - here->BSIM3v32sourceConductance = 1.0 - / here->BSIM3v32sourceConductance; - else - here->BSIM3v32sourceConductance = 0.0; + if (here->BSIM3v32sourceConductance > 0.0) + here->BSIM3v32sourceConductance = 1.0 + / here->BSIM3v32sourceConductance; + else + here->BSIM3v32sourceConductance = 0.0; - here->BSIM3v32cgso = pParam->BSIM3v32cgso; - here->BSIM3v32cgdo = pParam->BSIM3v32cgdo; + here->BSIM3v32cgso = pParam->BSIM3v32cgso; + here->BSIM3v32cgdo = pParam->BSIM3v32cgdo; - Nvtm = model->BSIM3v32vtm * model->BSIM3v32jctEmissionCoeff; - if (model->BSIM3v32acmMod == 0) - { - if ((here->BSIM3v32sourceArea <= 0.0) && - (here->BSIM3v32sourcePerimeter <= 0.0)) - { SourceSatCurrent = 1.0e-14; - } - else - { SourceSatCurrent = here->BSIM3v32sourceArea - * model->BSIM3v32jctTempSatCurDensity - + here->BSIM3v32sourcePerimeter - * model->BSIM3v32jctSidewallTempSatCurDensity; - } - if ((SourceSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) - { here->BSIM3v32vjsm = Nvtm * log(model->BSIM3v32ijth - / SourceSatCurrent + 1.0); - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - here->BSIM3v32IsEvjsm = - SourceSatCurrent * exp(here->BSIM3v32vjsm / Nvtm); - break; - case BSIM3v32V32: - default: - /* Do nothing */ - break; - } - } + Nvtm = model->BSIM3v32vtm * model->BSIM3v32jctEmissionCoeff; + if (model->BSIM3v32acmMod == 0) + { + if ((here->BSIM3v32sourceArea <= 0.0) && + (here->BSIM3v32sourcePerimeter <= 0.0)) + { SourceSatCurrent = 1.0e-14; + } + else + { SourceSatCurrent = here->BSIM3v32sourceArea + * model->BSIM3v32jctTempSatCurDensity + + here->BSIM3v32sourcePerimeter + * model->BSIM3v32jctSidewallTempSatCurDensity; + } + if ((SourceSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) + { here->BSIM3v32vjsm = Nvtm * log(model->BSIM3v32ijth + / SourceSatCurrent + 1.0); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + here->BSIM3v32IsEvjsm = + SourceSatCurrent * exp(here->BSIM3v32vjsm / Nvtm); + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + } - if ((here->BSIM3v32drainArea <= 0.0) && - (here->BSIM3v32drainPerimeter <= 0.0)) - { DrainSatCurrent = 1.0e-14; - } - else - { DrainSatCurrent = here->BSIM3v32drainArea - * model->BSIM3v32jctTempSatCurDensity - + here->BSIM3v32drainPerimeter - * model->BSIM3v32jctSidewallTempSatCurDensity; - } - if ((DrainSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) - { here->BSIM3v32vjdm = Nvtm * log(model->BSIM3v32ijth - / DrainSatCurrent + 1.0); - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - here->BSIM3v32IsEvjdm = - DrainSatCurrent * exp(here->BSIM3v32vjdm / Nvtm); - break; - case BSIM3v32V32: - default: - /* Do nothing */ - break; - } - } - } - else - { - SourceSatCurrent = 0.0; - if (!here->BSIM3v32sourceAreaGiven) - { - here->BSIM3v32sourceArea = 2.0 * model->BSIM3v32hdif * pParam->BSIM3v32weff; - } - SourceSatCurrent = here->BSIM3v32sourceArea * model->BSIM3v32jctTempSatCurDensity; - if (!here->BSIM3v32sourcePerimeterGiven) - { - here->BSIM3v32sourcePerimeter = 4.0 * model->BSIM3v32hdif + 2.0 * pParam->BSIM3v32weff; - } - SourceSatCurrent = SourceSatCurrent + here->BSIM3v32sourcePerimeter * model->BSIM3v32jctSidewallTempSatCurDensity; - if (SourceSatCurrent <= 0.0) SourceSatCurrent = 1.0e-14; - if ((SourceSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) - { here->BSIM3v32vjsm = Nvtm * log(model->BSIM3v32ijth - / SourceSatCurrent + 1.0); - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - here->BSIM3v32IsEvjsm = - SourceSatCurrent * exp(here->BSIM3v32vjsm / Nvtm); - break; - case BSIM3v32V32: - default: - /* Do nothing */ - break; - } - } + if ((here->BSIM3v32drainArea <= 0.0) && + (here->BSIM3v32drainPerimeter <= 0.0)) + { DrainSatCurrent = 1.0e-14; + } + else + { DrainSatCurrent = here->BSIM3v32drainArea + * model->BSIM3v32jctTempSatCurDensity + + here->BSIM3v32drainPerimeter + * model->BSIM3v32jctSidewallTempSatCurDensity; + } + if ((DrainSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) + { here->BSIM3v32vjdm = Nvtm * log(model->BSIM3v32ijth + / DrainSatCurrent + 1.0); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + here->BSIM3v32IsEvjdm = + DrainSatCurrent * exp(here->BSIM3v32vjdm / Nvtm); + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + } + } + else + { + SourceSatCurrent = 0.0; + if (!here->BSIM3v32sourceAreaGiven) + { + here->BSIM3v32sourceArea = 2.0 * model->BSIM3v32hdif * pParam->BSIM3v32weff; + } + SourceSatCurrent = here->BSIM3v32sourceArea * model->BSIM3v32jctTempSatCurDensity; + if (!here->BSIM3v32sourcePerimeterGiven) + { + here->BSIM3v32sourcePerimeter = 4.0 * model->BSIM3v32hdif + 2.0 * pParam->BSIM3v32weff; + } + SourceSatCurrent = SourceSatCurrent + here->BSIM3v32sourcePerimeter * model->BSIM3v32jctSidewallTempSatCurDensity; + if (SourceSatCurrent <= 0.0) SourceSatCurrent = 1.0e-14; + if ((SourceSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) + { here->BSIM3v32vjsm = Nvtm * log(model->BSIM3v32ijth + / SourceSatCurrent + 1.0); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + here->BSIM3v32IsEvjsm = + SourceSatCurrent * exp(here->BSIM3v32vjsm / Nvtm); + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + } - DrainSatCurrent = 0.0; - if (!here->BSIM3v32drainAreaGiven) - { - here->BSIM3v32drainArea = 2.0 * model->BSIM3v32hdif * pParam->BSIM3v32weff; - } - DrainSatCurrent = here->BSIM3v32drainArea * model->BSIM3v32jctTempSatCurDensity; - if (!here->BSIM3v32drainPerimeterGiven) - { - here->BSIM3v32drainPerimeter = 4.0 * model->BSIM3v32hdif + 2.0 * pParam->BSIM3v32weff; - } - DrainSatCurrent = DrainSatCurrent + here->BSIM3v32drainPerimeter * model->BSIM3v32jctSidewallTempSatCurDensity; - if (DrainSatCurrent <= 0.0) DrainSatCurrent = 1.0e-14; - if ((DrainSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) - { here->BSIM3v32vjdm = Nvtm * log(model->BSIM3v32ijth - / DrainSatCurrent + 1.0); - /* Added revision dependent code */ - switch (model->BSIM3v32intVersion) { - case BSIM3v32V324: - case BSIM3v32V323: - case BSIM3v32V322: - here->BSIM3v32IsEvjdm = - DrainSatCurrent * exp(here->BSIM3v32vjdm / Nvtm); - break; - case BSIM3v32V32: - default: - /* Do nothing */ - break; - } - } - } - } + DrainSatCurrent = 0.0; + if (!here->BSIM3v32drainAreaGiven) + { + here->BSIM3v32drainArea = 2.0 * model->BSIM3v32hdif * pParam->BSIM3v32weff; + } + DrainSatCurrent = here->BSIM3v32drainArea * model->BSIM3v32jctTempSatCurDensity; + if (!here->BSIM3v32drainPerimeterGiven) + { + here->BSIM3v32drainPerimeter = 4.0 * model->BSIM3v32hdif + 2.0 * pParam->BSIM3v32weff; + } + DrainSatCurrent = DrainSatCurrent + here->BSIM3v32drainPerimeter * model->BSIM3v32jctSidewallTempSatCurDensity; + if (DrainSatCurrent <= 0.0) DrainSatCurrent = 1.0e-14; + if ((DrainSatCurrent > 0.0) && (model->BSIM3v32ijth > 0.0)) + { here->BSIM3v32vjdm = Nvtm * log(model->BSIM3v32ijth + / DrainSatCurrent + 1.0); + /* Added revision dependent code */ + switch (model->BSIM3v32intVersion) { + case BSIM3v32V324: + case BSIM3v32V323: + case BSIM3v32V322: + here->BSIM3v32IsEvjdm = + DrainSatCurrent * exp(here->BSIM3v32vjdm / Nvtm); + break; + case BSIM3v32V32: + default: + /* Do nothing */ + break; + } + } + } + } } return(OK); } diff --git a/src/spicelib/devices/bsim3v32/b3v32trunc.c b/src/spicelib/devices/bsim3v32/b3v32trunc.c index f37510761..976377af6 100644 --- a/src/spicelib/devices/bsim3v32/b3v32trunc.c +++ b/src/spicelib/devices/bsim3v32/b3v32trunc.c @@ -3,7 +3,7 @@ /********** * Copyright 2001 Regents of the University of California. All rights reserved. * File: b3trunc.c of BSIM3v3.2.4 - * Author: 1995 Min-Chie Jeng and Mansun Chan. + * Author: 1995 Min-Chie Jeng and Mansun Chan. * Author: 1997-1999 Weidong Liu. * Author: 2001 Xuemei Xi * Modified by Poalo Nenzi 2002 @@ -28,8 +28,8 @@ BSIM3v32instance *here; for (; model != NULL; model = model->BSIM3v32nextModel) { for (here = model->BSIM3v32instances; here != NULL; - here = here->BSIM3v32nextInstance) - { + here = here->BSIM3v32nextInstance) + { #ifdef STEPDEBUG debugtemp = *timeStep; #endif /* STEPDEBUG */ @@ -38,7 +38,7 @@ BSIM3v32instance *here; CKTterr(here->BSIM3v32qd,ckt,timeStep); #ifdef STEPDEBUG if(debugtemp != *timeStep) - { printf("device %s reduces step from %g to %g\n", + { printf("device %s reduces step from %g to %g\n", here->BSIM3v32name,debugtemp,*timeStep); } #endif /* STEPDEBUG */ diff --git a/src/spicelib/devices/bsim3v32/bsim3v32def.h b/src/spicelib/devices/bsim3v32/bsim3v32def.h index 5c7e47919..188f2bfe4 100644 --- a/src/spicelib/devices/bsim3v32/bsim3v32def.h +++ b/src/spicelib/devices/bsim3v32/bsim3v32def.h @@ -14,7 +14,7 @@ File: bsim3v32def.h #include "ngspice/gendefs.h" #include "ngspice/cktdefs.h" #include "ngspice/complex.h" -#include "ngspice/noisedef.h" +#include "ngspice/noisedef.h" typedef struct sBSIM3v32instance { @@ -32,7 +32,7 @@ typedef struct sBSIM3v32instance /* MCJ */ double BSIM3v32ueff; - double BSIM3v32thetavth; + double BSIM3v32thetavth; double BSIM3v32von; double BSIM3v32vdsat; double BSIM3v32cgdo; @@ -44,7 +44,7 @@ typedef struct sBSIM3v32instance double BSIM3v32l; double BSIM3v32w; - double BSIM3v32m; + double BSIM3v32m; double BSIM3v32drainArea; double BSIM3v32sourceArea; double BSIM3v32drainSquares; @@ -120,7 +120,7 @@ typedef struct sBSIM3v32instance unsigned BSIM3v32lGiven :1; unsigned BSIM3v32wGiven :1; - unsigned BSIM3v32mGiven :1; + unsigned BSIM3v32mGiven :1; unsigned BSIM3v32drainAreaGiven :1; unsigned BSIM3v32sourceAreaGiven :1; unsigned BSIM3v32drainSquaresGiven :1; @@ -217,29 +217,29 @@ struct bsim3v32SizeDependParam double Width; double Length; - double BSIM3v32cdsc; - double BSIM3v32cdscb; - double BSIM3v32cdscd; - double BSIM3v32cit; - double BSIM3v32nfactor; + double BSIM3v32cdsc; + double BSIM3v32cdscb; + double BSIM3v32cdscd; + double BSIM3v32cit; + double BSIM3v32nfactor; double BSIM3v32xj; - double BSIM3v32vsat; - double BSIM3v32at; - double BSIM3v32a0; - double BSIM3v32ags; - double BSIM3v32a1; - double BSIM3v32a2; - double BSIM3v32keta; + double BSIM3v32vsat; + double BSIM3v32at; + double BSIM3v32a0; + double BSIM3v32ags; + double BSIM3v32a1; + double BSIM3v32a2; + double BSIM3v32keta; double BSIM3v32nsub; - double BSIM3v32npeak; - double BSIM3v32ngate; - double BSIM3v32gamma1; - double BSIM3v32gamma2; - double BSIM3v32vbx; - double BSIM3v32vbi; - double BSIM3v32vbm; - double BSIM3v32vbsc; - double BSIM3v32xt; + double BSIM3v32npeak; + double BSIM3v32ngate; + double BSIM3v32gamma1; + double BSIM3v32gamma2; + double BSIM3v32vbx; + double BSIM3v32vbi; + double BSIM3v32vbm; + double BSIM3v32vbsc; + double BSIM3v32xt; double BSIM3v32phi; double BSIM3v32litl; double BSIM3v32k1; @@ -251,14 +251,14 @@ struct bsim3v32SizeDependParam double BSIM3v32k3b; double BSIM3v32w0; double BSIM3v32nlx; - double BSIM3v32dvt0; - double BSIM3v32dvt1; - double BSIM3v32dvt2; - double BSIM3v32dvt0w; - double BSIM3v32dvt1w; - double BSIM3v32dvt2w; - double BSIM3v32drout; - double BSIM3v32dsub; + double BSIM3v32dvt0; + double BSIM3v32dvt1; + double BSIM3v32dvt2; + double BSIM3v32dvt0w; + double BSIM3v32dvt1w; + double BSIM3v32dvt2w; + double BSIM3v32drout; + double BSIM3v32dsub; double BSIM3v32vth0; double BSIM3v32ua; double BSIM3v32ua1; @@ -271,20 +271,20 @@ struct bsim3v32SizeDependParam double BSIM3v32voff; double BSIM3v32vfb; double BSIM3v32delta; - double BSIM3v32rdsw; - double BSIM3v32rds0; - double BSIM3v32prwg; - double BSIM3v32prwb; - double BSIM3v32prt; - double BSIM3v32eta0; - double BSIM3v32etab; - double BSIM3v32pclm; - double BSIM3v32pdibl1; - double BSIM3v32pdibl2; - double BSIM3v32pdiblb; - double BSIM3v32pscbe1; - double BSIM3v32pscbe2; - double BSIM3v32pvag; + double BSIM3v32rdsw; + double BSIM3v32rds0; + double BSIM3v32prwg; + double BSIM3v32prwb; + double BSIM3v32prt; + double BSIM3v32eta0; + double BSIM3v32etab; + double BSIM3v32pclm; + double BSIM3v32pdibl1; + double BSIM3v32pdibl2; + double BSIM3v32pdiblb; + double BSIM3v32pscbe1; + double BSIM3v32pscbe2; + double BSIM3v32pvag; double BSIM3v32wr; double BSIM3v32dwg; double BSIM3v32dwb; @@ -327,14 +327,14 @@ struct bsim3v32SizeDependParam double BSIM3v32cgbo; double BSIM3v32tconst; - double BSIM3v32u0temp; - double BSIM3v32vsattemp; - double BSIM3v32sqrtPhi; - double BSIM3v32phis3; - double BSIM3v32Xdep0; - double BSIM3v32sqrtXdep0; + double BSIM3v32u0temp; + double BSIM3v32vsattemp; + double BSIM3v32sqrtPhi; + double BSIM3v32phis3; + double BSIM3v32Xdep0; + double BSIM3v32sqrtXdep0; double BSIM3v32theta0vb0; - double BSIM3v32thetaRout; + double BSIM3v32thetaRout; double BSIM3v32cof1; double BSIM3v32cof2; @@ -350,12 +350,12 @@ struct bsim3v32SizeDependParam }; -typedef struct sBSIM3v32model +typedef struct sBSIM3v32model { int BSIM3v32modType; struct sBSIM3v32model *BSIM3v32nextModel; BSIM3v32instance *BSIM3v32instances; - IFuid BSIM3v32modName; + IFuid BSIM3v32modName; int BSIM3v32type; int BSIM3v32mobMod; @@ -364,39 +364,39 @@ typedef struct sBSIM3v32model int BSIM3v32noiMod; int BSIM3v32binUnit; int BSIM3v32paramChk; - char *BSIM3v32version; + char *BSIM3v32version; /* The following field is an integer coding * of BSIM3v32version. - */ - int BSIM3v32intVersion; + */ + int BSIM3v32intVersion; #define BSIM3v32V324 324 /* BSIM3v32 V3.2.4 */ #define BSIM3v32V323 323 /* BSIM3v32 V3.2.3 */ #define BSIM3v32V322 322 /* BSIM3v32 V3.2.2 */ #define BSIM3v32V32 32 /* BSIM3v32 V3.2 */ #define BSIM3v32V3OLD 0 /* Old model */ - double BSIM3v32tox; + double BSIM3v32tox; double BSIM3v32toxm; - double BSIM3v32cdsc; - double BSIM3v32cdscb; - double BSIM3v32cdscd; - double BSIM3v32cit; - double BSIM3v32nfactor; + double BSIM3v32cdsc; + double BSIM3v32cdscb; + double BSIM3v32cdscd; + double BSIM3v32cit; + double BSIM3v32nfactor; double BSIM3v32xj; - double BSIM3v32vsat; - double BSIM3v32at; - double BSIM3v32a0; - double BSIM3v32ags; - double BSIM3v32a1; - double BSIM3v32a2; - double BSIM3v32keta; + double BSIM3v32vsat; + double BSIM3v32at; + double BSIM3v32a0; + double BSIM3v32ags; + double BSIM3v32a1; + double BSIM3v32a2; + double BSIM3v32keta; double BSIM3v32nsub; - double BSIM3v32npeak; - double BSIM3v32ngate; - double BSIM3v32gamma1; - double BSIM3v32gamma2; - double BSIM3v32vbx; - double BSIM3v32vbm; - double BSIM3v32xt; + double BSIM3v32npeak; + double BSIM3v32ngate; + double BSIM3v32gamma1; + double BSIM3v32gamma2; + double BSIM3v32vbx; + double BSIM3v32vbm; + double BSIM3v32xt; double BSIM3v32k1; double BSIM3v32kt1; double BSIM3v32kt1l; @@ -406,14 +406,14 @@ typedef struct sBSIM3v32model double BSIM3v32k3b; double BSIM3v32w0; double BSIM3v32nlx; - double BSIM3v32dvt0; - double BSIM3v32dvt1; - double BSIM3v32dvt2; - double BSIM3v32dvt0w; - double BSIM3v32dvt1w; - double BSIM3v32dvt2w; - double BSIM3v32drout; - double BSIM3v32dsub; + double BSIM3v32dvt0; + double BSIM3v32dvt1; + double BSIM3v32dvt2; + double BSIM3v32dvt0w; + double BSIM3v32dvt1w; + double BSIM3v32dvt2w; + double BSIM3v32drout; + double BSIM3v32dsub; double BSIM3v32vth0; double BSIM3v32ua; double BSIM3v32ua1; @@ -425,19 +425,19 @@ typedef struct sBSIM3v32model double BSIM3v32ute; double BSIM3v32voff; double BSIM3v32delta; - double BSIM3v32rdsw; + double BSIM3v32rdsw; double BSIM3v32prwg; double BSIM3v32prwb; - double BSIM3v32prt; - double BSIM3v32eta0; - double BSIM3v32etab; - double BSIM3v32pclm; - double BSIM3v32pdibl1; - double BSIM3v32pdibl2; + double BSIM3v32prt; + double BSIM3v32eta0; + double BSIM3v32etab; + double BSIM3v32pclm; + double BSIM3v32pdibl1; + double BSIM3v32pdibl2; double BSIM3v32pdiblb; - double BSIM3v32pscbe1; - double BSIM3v32pscbe2; - double BSIM3v32pvag; + double BSIM3v32pscbe1; + double BSIM3v32pscbe2; + double BSIM3v32pvag; double BSIM3v32wr; double BSIM3v32dwg; double BSIM3v32dwb; @@ -481,27 +481,27 @@ typedef struct sBSIM3v32model double BSIM3v32rsc; /* Length Dependence */ - double BSIM3v32lcdsc; - double BSIM3v32lcdscb; - double BSIM3v32lcdscd; - double BSIM3v32lcit; - double BSIM3v32lnfactor; + double BSIM3v32lcdsc; + double BSIM3v32lcdscb; + double BSIM3v32lcdscd; + double BSIM3v32lcit; + double BSIM3v32lnfactor; double BSIM3v32lxj; - double BSIM3v32lvsat; - double BSIM3v32lat; - double BSIM3v32la0; - double BSIM3v32lags; - double BSIM3v32la1; - double BSIM3v32la2; - double BSIM3v32lketa; + double BSIM3v32lvsat; + double BSIM3v32lat; + double BSIM3v32la0; + double BSIM3v32lags; + double BSIM3v32la1; + double BSIM3v32la2; + double BSIM3v32lketa; double BSIM3v32lnsub; - double BSIM3v32lnpeak; - double BSIM3v32lngate; - double BSIM3v32lgamma1; - double BSIM3v32lgamma2; - double BSIM3v32lvbx; - double BSIM3v32lvbm; - double BSIM3v32lxt; + double BSIM3v32lnpeak; + double BSIM3v32lngate; + double BSIM3v32lgamma1; + double BSIM3v32lgamma2; + double BSIM3v32lvbx; + double BSIM3v32lvbm; + double BSIM3v32lxt; double BSIM3v32lk1; double BSIM3v32lkt1; double BSIM3v32lkt1l; @@ -511,14 +511,14 @@ typedef struct sBSIM3v32model double BSIM3v32lk3b; double BSIM3v32lw0; double BSIM3v32lnlx; - double BSIM3v32ldvt0; - double BSIM3v32ldvt1; - double BSIM3v32ldvt2; - double BSIM3v32ldvt0w; - double BSIM3v32ldvt1w; - double BSIM3v32ldvt2w; - double BSIM3v32ldrout; - double BSIM3v32ldsub; + double BSIM3v32ldvt0; + double BSIM3v32ldvt1; + double BSIM3v32ldvt2; + double BSIM3v32ldvt0w; + double BSIM3v32ldvt1w; + double BSIM3v32ldvt2w; + double BSIM3v32ldrout; + double BSIM3v32ldsub; double BSIM3v32lvth0; double BSIM3v32lua; double BSIM3v32lua1; @@ -530,19 +530,19 @@ typedef struct sBSIM3v32model double BSIM3v32lute; double BSIM3v32lvoff; double BSIM3v32ldelta; - double BSIM3v32lrdsw; + double BSIM3v32lrdsw; double BSIM3v32lprwg; double BSIM3v32lprwb; - double BSIM3v32lprt; - double BSIM3v32leta0; - double BSIM3v32letab; - double BSIM3v32lpclm; - double BSIM3v32lpdibl1; - double BSIM3v32lpdibl2; + double BSIM3v32lprt; + double BSIM3v32leta0; + double BSIM3v32letab; + double BSIM3v32lpclm; + double BSIM3v32lpdibl1; + double BSIM3v32lpdibl2; double BSIM3v32lpdiblb; - double BSIM3v32lpscbe1; - double BSIM3v32lpscbe2; - double BSIM3v32lpvag; + double BSIM3v32lpscbe1; + double BSIM3v32lpscbe2; + double BSIM3v32lpvag; double BSIM3v32lwr; double BSIM3v32ldwg; double BSIM3v32ldwb; @@ -568,27 +568,27 @@ typedef struct sBSIM3v32model double BSIM3v32lmoin; /* Width Dependence */ - double BSIM3v32wcdsc; - double BSIM3v32wcdscb; - double BSIM3v32wcdscd; - double BSIM3v32wcit; - double BSIM3v32wnfactor; + double BSIM3v32wcdsc; + double BSIM3v32wcdscb; + double BSIM3v32wcdscd; + double BSIM3v32wcit; + double BSIM3v32wnfactor; double BSIM3v32wxj; - double BSIM3v32wvsat; - double BSIM3v32wat; - double BSIM3v32wa0; - double BSIM3v32wags; - double BSIM3v32wa1; - double BSIM3v32wa2; - double BSIM3v32wketa; + double BSIM3v32wvsat; + double BSIM3v32wat; + double BSIM3v32wa0; + double BSIM3v32wags; + double BSIM3v32wa1; + double BSIM3v32wa2; + double BSIM3v32wketa; double BSIM3v32wnsub; - double BSIM3v32wnpeak; - double BSIM3v32wngate; - double BSIM3v32wgamma1; - double BSIM3v32wgamma2; - double BSIM3v32wvbx; - double BSIM3v32wvbm; - double BSIM3v32wxt; + double BSIM3v32wnpeak; + double BSIM3v32wngate; + double BSIM3v32wgamma1; + double BSIM3v32wgamma2; + double BSIM3v32wvbx; + double BSIM3v32wvbm; + double BSIM3v32wxt; double BSIM3v32wk1; double BSIM3v32wkt1; double BSIM3v32wkt1l; @@ -598,14 +598,14 @@ typedef struct sBSIM3v32model double BSIM3v32wk3b; double BSIM3v32ww0; double BSIM3v32wnlx; - double BSIM3v32wdvt0; - double BSIM3v32wdvt1; - double BSIM3v32wdvt2; - double BSIM3v32wdvt0w; - double BSIM3v32wdvt1w; - double BSIM3v32wdvt2w; - double BSIM3v32wdrout; - double BSIM3v32wdsub; + double BSIM3v32wdvt0; + double BSIM3v32wdvt1; + double BSIM3v32wdvt2; + double BSIM3v32wdvt0w; + double BSIM3v32wdvt1w; + double BSIM3v32wdvt2w; + double BSIM3v32wdrout; + double BSIM3v32wdsub; double BSIM3v32wvth0; double BSIM3v32wua; double BSIM3v32wua1; @@ -617,19 +617,19 @@ typedef struct sBSIM3v32model double BSIM3v32wute; double BSIM3v32wvoff; double BSIM3v32wdelta; - double BSIM3v32wrdsw; + double BSIM3v32wrdsw; double BSIM3v32wprwg; double BSIM3v32wprwb; - double BSIM3v32wprt; - double BSIM3v32weta0; - double BSIM3v32wetab; - double BSIM3v32wpclm; - double BSIM3v32wpdibl1; - double BSIM3v32wpdibl2; + double BSIM3v32wprt; + double BSIM3v32weta0; + double BSIM3v32wetab; + double BSIM3v32wpclm; + double BSIM3v32wpdibl1; + double BSIM3v32wpdibl2; double BSIM3v32wpdiblb; - double BSIM3v32wpscbe1; - double BSIM3v32wpscbe2; - double BSIM3v32wpvag; + double BSIM3v32wpscbe1; + double BSIM3v32wpscbe2; + double BSIM3v32wpvag; double BSIM3v32wwr; double BSIM3v32wdwg; double BSIM3v32wdwb; @@ -655,27 +655,27 @@ typedef struct sBSIM3v32model double BSIM3v32wmoin; /* Cross-term Dependence */ - double BSIM3v32pcdsc; - double BSIM3v32pcdscb; - double BSIM3v32pcdscd; - double BSIM3v32pcit; - double BSIM3v32pnfactor; + double BSIM3v32pcdsc; + double BSIM3v32pcdscb; + double BSIM3v32pcdscd; + double BSIM3v32pcit; + double BSIM3v32pnfactor; double BSIM3v32pxj; - double BSIM3v32pvsat; - double BSIM3v32pat; - double BSIM3v32pa0; - double BSIM3v32pags; - double BSIM3v32pa1; - double BSIM3v32pa2; - double BSIM3v32pketa; + double BSIM3v32pvsat; + double BSIM3v32pat; + double BSIM3v32pa0; + double BSIM3v32pags; + double BSIM3v32pa1; + double BSIM3v32pa2; + double BSIM3v32pketa; double BSIM3v32pnsub; - double BSIM3v32pnpeak; - double BSIM3v32pngate; - double BSIM3v32pgamma1; - double BSIM3v32pgamma2; - double BSIM3v32pvbx; - double BSIM3v32pvbm; - double BSIM3v32pxt; + double BSIM3v32pnpeak; + double BSIM3v32pngate; + double BSIM3v32pgamma1; + double BSIM3v32pgamma2; + double BSIM3v32pvbx; + double BSIM3v32pvbm; + double BSIM3v32pxt; double BSIM3v32pk1; double BSIM3v32pkt1; double BSIM3v32pkt1l; @@ -685,14 +685,14 @@ typedef struct sBSIM3v32model double BSIM3v32pk3b; double BSIM3v32pw0; double BSIM3v32pnlx; - double BSIM3v32pdvt0; - double BSIM3v32pdvt1; - double BSIM3v32pdvt2; - double BSIM3v32pdvt0w; - double BSIM3v32pdvt1w; - double BSIM3v32pdvt2w; - double BSIM3v32pdrout; - double BSIM3v32pdsub; + double BSIM3v32pdvt0; + double BSIM3v32pdvt1; + double BSIM3v32pdvt2; + double BSIM3v32pdvt0w; + double BSIM3v32pdvt1w; + double BSIM3v32pdvt2w; + double BSIM3v32pdrout; + double BSIM3v32pdsub; double BSIM3v32pvth0; double BSIM3v32pua; double BSIM3v32pua1; @@ -707,16 +707,16 @@ typedef struct sBSIM3v32model double BSIM3v32prdsw; double BSIM3v32pprwg; double BSIM3v32pprwb; - double BSIM3v32pprt; - double BSIM3v32peta0; - double BSIM3v32petab; - double BSIM3v32ppclm; - double BSIM3v32ppdibl1; - double BSIM3v32ppdibl2; + double BSIM3v32pprt; + double BSIM3v32peta0; + double BSIM3v32petab; + double BSIM3v32ppclm; + double BSIM3v32ppdibl1; + double BSIM3v32ppdibl2; double BSIM3v32ppdiblb; - double BSIM3v32ppscbe1; - double BSIM3v32ppscbe2; - double BSIM3v32ppvag; + double BSIM3v32ppscbe1; + double BSIM3v32ppscbe2; + double BSIM3v32ppvag; double BSIM3v32pwr; double BSIM3v32pdwg; double BSIM3v32pdwb; @@ -794,7 +794,7 @@ typedef struct sBSIM3v32model /* Pre-calculated constants */ /* MCJ: move to size-dependent param. */ - double BSIM3v32vtm; + double BSIM3v32vtm; double BSIM3v32cox; double BSIM3v32cof1; double BSIM3v32cof2; @@ -811,13 +811,13 @@ typedef struct sBSIM3v32model double BSIM3v32unitLengthSidewallTempJctCap; double BSIM3v32unitLengthGateSidewallTempJctCap; - double BSIM3v32oxideTrapDensityA; - double BSIM3v32oxideTrapDensityB; - double BSIM3v32oxideTrapDensityC; - double BSIM3v32em; - double BSIM3v32ef; - double BSIM3v32af; - double BSIM3v32kf; + double BSIM3v32oxideTrapDensityA; + double BSIM3v32oxideTrapDensityB; + double BSIM3v32oxideTrapDensityC; + double BSIM3v32em; + double BSIM3v32ef; + double BSIM3v32af; + double BSIM3v32kf; struct bsim3v32SizeDependParam *pSizeDependParamKnot; @@ -844,7 +844,7 @@ typedef struct sBSIM3v32model unsigned BSIM3v32agsGiven :1; unsigned BSIM3v32a1Given :1; unsigned BSIM3v32a2Given :1; - unsigned BSIM3v32ketaGiven :1; + unsigned BSIM3v32ketaGiven :1; unsigned BSIM3v32nsubGiven :1; unsigned BSIM3v32npeakGiven :1; unsigned BSIM3v32ngateGiven :1; @@ -862,14 +862,14 @@ typedef struct sBSIM3v32model unsigned BSIM3v32k3bGiven :1; unsigned BSIM3v32w0Given :1; unsigned BSIM3v32nlxGiven :1; - unsigned BSIM3v32dvt0Given :1; - unsigned BSIM3v32dvt1Given :1; - unsigned BSIM3v32dvt2Given :1; - unsigned BSIM3v32dvt0wGiven :1; - unsigned BSIM3v32dvt1wGiven :1; - unsigned BSIM3v32dvt2wGiven :1; - unsigned BSIM3v32droutGiven :1; - unsigned BSIM3v32dsubGiven :1; + unsigned BSIM3v32dvt0Given :1; + unsigned BSIM3v32dvt1Given :1; + unsigned BSIM3v32dvt2Given :1; + unsigned BSIM3v32dvt0wGiven :1; + unsigned BSIM3v32dvt1wGiven :1; + unsigned BSIM3v32dvt2wGiven :1; + unsigned BSIM3v32droutGiven :1; + unsigned BSIM3v32dsubGiven :1; unsigned BSIM3v32vth0Given :1; unsigned BSIM3v32uaGiven :1; unsigned BSIM3v32ua1Given :1; @@ -880,20 +880,20 @@ typedef struct sBSIM3v32model unsigned BSIM3v32u0Given :1; unsigned BSIM3v32uteGiven :1; unsigned BSIM3v32voffGiven :1; - unsigned BSIM3v32rdswGiven :1; - unsigned BSIM3v32prwgGiven :1; - unsigned BSIM3v32prwbGiven :1; - unsigned BSIM3v32prtGiven :1; - unsigned BSIM3v32eta0Given :1; - unsigned BSIM3v32etabGiven :1; - unsigned BSIM3v32pclmGiven :1; - unsigned BSIM3v32pdibl1Given :1; - unsigned BSIM3v32pdibl2Given :1; - unsigned BSIM3v32pdiblbGiven :1; - unsigned BSIM3v32pscbe1Given :1; - unsigned BSIM3v32pscbe2Given :1; - unsigned BSIM3v32pvagGiven :1; - unsigned BSIM3v32deltaGiven :1; + unsigned BSIM3v32rdswGiven :1; + unsigned BSIM3v32prwgGiven :1; + unsigned BSIM3v32prwbGiven :1; + unsigned BSIM3v32prtGiven :1; + unsigned BSIM3v32eta0Given :1; + unsigned BSIM3v32etabGiven :1; + unsigned BSIM3v32pclmGiven :1; + unsigned BSIM3v32pdibl1Given :1; + unsigned BSIM3v32pdibl2Given :1; + unsigned BSIM3v32pdiblbGiven :1; + unsigned BSIM3v32pscbe1Given :1; + unsigned BSIM3v32pscbe2Given :1; + unsigned BSIM3v32pvagGiven :1; + unsigned BSIM3v32deltaGiven :1; unsigned BSIM3v32wrGiven :1; unsigned BSIM3v32dwgGiven :1; unsigned BSIM3v32dwbGiven :1; @@ -906,7 +906,7 @@ typedef struct sBSIM3v32model unsigned BSIM3v32vfbGiven :1; /* CV model */ - unsigned BSIM3v32elmGiven :1; + unsigned BSIM3v32elmGiven :1; unsigned BSIM3v32cgslGiven :1; unsigned BSIM3v32cgdlGiven :1; unsigned BSIM3v32ckappaGiven :1; @@ -928,7 +928,7 @@ typedef struct sBSIM3v32model unsigned BSIM3v32tpbswgGiven :1; /* acm model */ - unsigned BSIM3v32hdifGiven :1; + unsigned BSIM3v32hdifGiven :1; unsigned BSIM3v32ldifGiven :1; unsigned BSIM3v32ldGiven :1; unsigned BSIM3v32rdGiven :1; @@ -949,7 +949,7 @@ typedef struct sBSIM3v32model unsigned BSIM3v32lagsGiven :1; unsigned BSIM3v32la1Given :1; unsigned BSIM3v32la2Given :1; - unsigned BSIM3v32lketaGiven :1; + unsigned BSIM3v32lketaGiven :1; unsigned BSIM3v32lnsubGiven :1; unsigned BSIM3v32lnpeakGiven :1; unsigned BSIM3v32lngateGiven :1; @@ -967,14 +967,14 @@ typedef struct sBSIM3v32model unsigned BSIM3v32lk3bGiven :1; unsigned BSIM3v32lw0Given :1; unsigned BSIM3v32lnlxGiven :1; - unsigned BSIM3v32ldvt0Given :1; - unsigned BSIM3v32ldvt1Given :1; - unsigned BSIM3v32ldvt2Given :1; - unsigned BSIM3v32ldvt0wGiven :1; - unsigned BSIM3v32ldvt1wGiven :1; - unsigned BSIM3v32ldvt2wGiven :1; - unsigned BSIM3v32ldroutGiven :1; - unsigned BSIM3v32ldsubGiven :1; + unsigned BSIM3v32ldvt0Given :1; + unsigned BSIM3v32ldvt1Given :1; + unsigned BSIM3v32ldvt2Given :1; + unsigned BSIM3v32ldvt0wGiven :1; + unsigned BSIM3v32ldvt1wGiven :1; + unsigned BSIM3v32ldvt2wGiven :1; + unsigned BSIM3v32ldroutGiven :1; + unsigned BSIM3v32ldsubGiven :1; unsigned BSIM3v32lvth0Given :1; unsigned BSIM3v32luaGiven :1; unsigned BSIM3v32lua1Given :1; @@ -985,20 +985,20 @@ typedef struct sBSIM3v32model unsigned BSIM3v32lu0Given :1; unsigned BSIM3v32luteGiven :1; unsigned BSIM3v32lvoffGiven :1; - unsigned BSIM3v32lrdswGiven :1; - unsigned BSIM3v32lprwgGiven :1; - unsigned BSIM3v32lprwbGiven :1; - unsigned BSIM3v32lprtGiven :1; - unsigned BSIM3v32leta0Given :1; - unsigned BSIM3v32letabGiven :1; - unsigned BSIM3v32lpclmGiven :1; - unsigned BSIM3v32lpdibl1Given :1; - unsigned BSIM3v32lpdibl2Given :1; - unsigned BSIM3v32lpdiblbGiven :1; - unsigned BSIM3v32lpscbe1Given :1; - unsigned BSIM3v32lpscbe2Given :1; - unsigned BSIM3v32lpvagGiven :1; - unsigned BSIM3v32ldeltaGiven :1; + unsigned BSIM3v32lrdswGiven :1; + unsigned BSIM3v32lprwgGiven :1; + unsigned BSIM3v32lprwbGiven :1; + unsigned BSIM3v32lprtGiven :1; + unsigned BSIM3v32leta0Given :1; + unsigned BSIM3v32letabGiven :1; + unsigned BSIM3v32lpclmGiven :1; + unsigned BSIM3v32lpdibl1Given :1; + unsigned BSIM3v32lpdibl2Given :1; + unsigned BSIM3v32lpdiblbGiven :1; + unsigned BSIM3v32lpscbe1Given :1; + unsigned BSIM3v32lpscbe2Given :1; + unsigned BSIM3v32lpvagGiven :1; + unsigned BSIM3v32ldeltaGiven :1; unsigned BSIM3v32lwrGiven :1; unsigned BSIM3v32ldwgGiven :1; unsigned BSIM3v32ldwbGiven :1; @@ -1010,7 +1010,7 @@ typedef struct sBSIM3v32model unsigned BSIM3v32lvfbGiven :1; /* CV model */ - unsigned BSIM3v32lelmGiven :1; + unsigned BSIM3v32lelmGiven :1; unsigned BSIM3v32lcgslGiven :1; unsigned BSIM3v32lcgdlGiven :1; unsigned BSIM3v32lckappaGiven :1; @@ -1036,7 +1036,7 @@ typedef struct sBSIM3v32model unsigned BSIM3v32wagsGiven :1; unsigned BSIM3v32wa1Given :1; unsigned BSIM3v32wa2Given :1; - unsigned BSIM3v32wketaGiven :1; + unsigned BSIM3v32wketaGiven :1; unsigned BSIM3v32wnsubGiven :1; unsigned BSIM3v32wnpeakGiven :1; unsigned BSIM3v32wngateGiven :1; @@ -1054,14 +1054,14 @@ typedef struct sBSIM3v32model unsigned BSIM3v32wk3bGiven :1; unsigned BSIM3v32ww0Given :1; unsigned BSIM3v32wnlxGiven :1; - unsigned BSIM3v32wdvt0Given :1; - unsigned BSIM3v32wdvt1Given :1; - unsigned BSIM3v32wdvt2Given :1; - unsigned BSIM3v32wdvt0wGiven :1; - unsigned BSIM3v32wdvt1wGiven :1; - unsigned BSIM3v32wdvt2wGiven :1; - unsigned BSIM3v32wdroutGiven :1; - unsigned BSIM3v32wdsubGiven :1; + unsigned BSIM3v32wdvt0Given :1; + unsigned BSIM3v32wdvt1Given :1; + unsigned BSIM3v32wdvt2Given :1; + unsigned BSIM3v32wdvt0wGiven :1; + unsigned BSIM3v32wdvt1wGiven :1; + unsigned BSIM3v32wdvt2wGiven :1; + unsigned BSIM3v32wdroutGiven :1; + unsigned BSIM3v32wdsubGiven :1; unsigned BSIM3v32wvth0Given :1; unsigned BSIM3v32wuaGiven :1; unsigned BSIM3v32wua1Given :1; @@ -1072,20 +1072,20 @@ typedef struct sBSIM3v32model unsigned BSIM3v32wu0Given :1; unsigned BSIM3v32wuteGiven :1; unsigned BSIM3v32wvoffGiven :1; - unsigned BSIM3v32wrdswGiven :1; - unsigned BSIM3v32wprwgGiven :1; - unsigned BSIM3v32wprwbGiven :1; - unsigned BSIM3v32wprtGiven :1; - unsigned BSIM3v32weta0Given :1; - unsigned BSIM3v32wetabGiven :1; - unsigned BSIM3v32wpclmGiven :1; - unsigned BSIM3v32wpdibl1Given :1; - unsigned BSIM3v32wpdibl2Given :1; - unsigned BSIM3v32wpdiblbGiven :1; - unsigned BSIM3v32wpscbe1Given :1; - unsigned BSIM3v32wpscbe2Given :1; - unsigned BSIM3v32wpvagGiven :1; - unsigned BSIM3v32wdeltaGiven :1; + unsigned BSIM3v32wrdswGiven :1; + unsigned BSIM3v32wprwgGiven :1; + unsigned BSIM3v32wprwbGiven :1; + unsigned BSIM3v32wprtGiven :1; + unsigned BSIM3v32weta0Given :1; + unsigned BSIM3v32wetabGiven :1; + unsigned BSIM3v32wpclmGiven :1; + unsigned BSIM3v32wpdibl1Given :1; + unsigned BSIM3v32wpdibl2Given :1; + unsigned BSIM3v32wpdiblbGiven :1; + unsigned BSIM3v32wpscbe1Given :1; + unsigned BSIM3v32wpscbe2Given :1; + unsigned BSIM3v32wpvagGiven :1; + unsigned BSIM3v32wdeltaGiven :1; unsigned BSIM3v32wwrGiven :1; unsigned BSIM3v32wdwgGiven :1; unsigned BSIM3v32wdwbGiven :1; @@ -1097,7 +1097,7 @@ typedef struct sBSIM3v32model unsigned BSIM3v32wvfbGiven :1; /* CV model */ - unsigned BSIM3v32welmGiven :1; + unsigned BSIM3v32welmGiven :1; unsigned BSIM3v32wcgslGiven :1; unsigned BSIM3v32wcgdlGiven :1; unsigned BSIM3v32wckappaGiven :1; @@ -1123,7 +1123,7 @@ typedef struct sBSIM3v32model unsigned BSIM3v32pagsGiven :1; unsigned BSIM3v32pa1Given :1; unsigned BSIM3v32pa2Given :1; - unsigned BSIM3v32pketaGiven :1; + unsigned BSIM3v32pketaGiven :1; unsigned BSIM3v32pnsubGiven :1; unsigned BSIM3v32pnpeakGiven :1; unsigned BSIM3v32pngateGiven :1; @@ -1141,14 +1141,14 @@ typedef struct sBSIM3v32model unsigned BSIM3v32pk3bGiven :1; unsigned BSIM3v32pw0Given :1; unsigned BSIM3v32pnlxGiven :1; - unsigned BSIM3v32pdvt0Given :1; - unsigned BSIM3v32pdvt1Given :1; - unsigned BSIM3v32pdvt2Given :1; - unsigned BSIM3v32pdvt0wGiven :1; - unsigned BSIM3v32pdvt1wGiven :1; - unsigned BSIM3v32pdvt2wGiven :1; - unsigned BSIM3v32pdroutGiven :1; - unsigned BSIM3v32pdsubGiven :1; + unsigned BSIM3v32pdvt0Given :1; + unsigned BSIM3v32pdvt1Given :1; + unsigned BSIM3v32pdvt2Given :1; + unsigned BSIM3v32pdvt0wGiven :1; + unsigned BSIM3v32pdvt1wGiven :1; + unsigned BSIM3v32pdvt2wGiven :1; + unsigned BSIM3v32pdroutGiven :1; + unsigned BSIM3v32pdsubGiven :1; unsigned BSIM3v32pvth0Given :1; unsigned BSIM3v32puaGiven :1; unsigned BSIM3v32pua1Given :1; @@ -1159,20 +1159,20 @@ typedef struct sBSIM3v32model unsigned BSIM3v32pu0Given :1; unsigned BSIM3v32puteGiven :1; unsigned BSIM3v32pvoffGiven :1; - unsigned BSIM3v32prdswGiven :1; - unsigned BSIM3v32pprwgGiven :1; - unsigned BSIM3v32pprwbGiven :1; - unsigned BSIM3v32pprtGiven :1; - unsigned BSIM3v32peta0Given :1; - unsigned BSIM3v32petabGiven :1; - unsigned BSIM3v32ppclmGiven :1; - unsigned BSIM3v32ppdibl1Given :1; - unsigned BSIM3v32ppdibl2Given :1; - unsigned BSIM3v32ppdiblbGiven :1; - unsigned BSIM3v32ppscbe1Given :1; - unsigned BSIM3v32ppscbe2Given :1; - unsigned BSIM3v32ppvagGiven :1; - unsigned BSIM3v32pdeltaGiven :1; + unsigned BSIM3v32prdswGiven :1; + unsigned BSIM3v32pprwgGiven :1; + unsigned BSIM3v32pprwbGiven :1; + unsigned BSIM3v32pprtGiven :1; + unsigned BSIM3v32peta0Given :1; + unsigned BSIM3v32petabGiven :1; + unsigned BSIM3v32ppclmGiven :1; + unsigned BSIM3v32ppdibl1Given :1; + unsigned BSIM3v32ppdibl2Given :1; + unsigned BSIM3v32ppdiblbGiven :1; + unsigned BSIM3v32ppscbe1Given :1; + unsigned BSIM3v32ppscbe2Given :1; + unsigned BSIM3v32ppvagGiven :1; + unsigned BSIM3v32pdeltaGiven :1; unsigned BSIM3v32pwrGiven :1; unsigned BSIM3v32pdwgGiven :1; unsigned BSIM3v32pdwbGiven :1; @@ -1184,7 +1184,7 @@ typedef struct sBSIM3v32model unsigned BSIM3v32pvfbGiven :1; /* CV model */ - unsigned BSIM3v32pelmGiven :1; + unsigned BSIM3v32pelmGiven :1; unsigned BSIM3v32pcgslGiven :1; unsigned BSIM3v32pcgdlGiven :1; unsigned BSIM3v32pckappaGiven :1; @@ -1217,15 +1217,15 @@ typedef struct sBSIM3v32model unsigned BSIM3v32bulkJctGateSideGradingCoeffGiven :1; unsigned BSIM3v32unitLengthGateSidewallJctCapGiven :1; unsigned BSIM3v32jctEmissionCoeffGiven :1; - unsigned BSIM3v32jctTempExponentGiven :1; + unsigned BSIM3v32jctTempExponentGiven :1; - unsigned BSIM3v32oxideTrapDensityAGiven :1; - unsigned BSIM3v32oxideTrapDensityBGiven :1; - unsigned BSIM3v32oxideTrapDensityCGiven :1; - unsigned BSIM3v32emGiven :1; - unsigned BSIM3v32efGiven :1; - unsigned BSIM3v32afGiven :1; - unsigned BSIM3v32kfGiven :1; + unsigned BSIM3v32oxideTrapDensityAGiven :1; + unsigned BSIM3v32oxideTrapDensityBGiven :1; + unsigned BSIM3v32oxideTrapDensityCGiven :1; + unsigned BSIM3v32emGiven :1; + unsigned BSIM3v32efGiven :1; + unsigned BSIM3v32afGiven :1; + unsigned BSIM3v32kfGiven :1; unsigned BSIM3v32LintGiven :1; unsigned BSIM3v32LlGiven :1; @@ -1286,8 +1286,8 @@ typedef struct sBSIM3v32model /* model parameters */ #define BSIM3v32_MOD_CAPMOD 101 #define BSIM3v32_MOD_ACMMOD 102 -#define BSIM3v32_MOD_MOBMOD 103 -#define BSIM3v32_MOD_NOIMOD 104 +#define BSIM3v32_MOD_MOBMOD 103 +#define BSIM3v32_MOD_NOIMOD 104 #define BSIM3v32_MOD_TOX 105 @@ -1301,14 +1301,14 @@ typedef struct sBSIM3v32model #define BSIM3v32_MOD_A0 113 #define BSIM3v32_MOD_A1 114 #define BSIM3v32_MOD_A2 115 -#define BSIM3v32_MOD_KETA 116 +#define BSIM3v32_MOD_KETA 116 #define BSIM3v32_MOD_NSUB 117 #define BSIM3v32_MOD_NPEAK 118 #define BSIM3v32_MOD_NGATE 120 #define BSIM3v32_MOD_GAMMA1 121 #define BSIM3v32_MOD_GAMMA2 122 #define BSIM3v32_MOD_VBX 123 -#define BSIM3v32_MOD_BINUNIT 124 +#define BSIM3v32_MOD_BINUNIT 124 #define BSIM3v32_MOD_VBM 125 @@ -1408,7 +1408,7 @@ typedef struct sBSIM3v32model #define BSIM3v32_MOD_LA0 258 #define BSIM3v32_MOD_LA1 259 #define BSIM3v32_MOD_LA2 260 -#define BSIM3v32_MOD_LKETA 261 +#define BSIM3v32_MOD_LKETA 261 #define BSIM3v32_MOD_LNSUB 262 #define BSIM3v32_MOD_LNPEAK 263 #define BSIM3v32_MOD_LNGATE 265 @@ -1476,7 +1476,7 @@ typedef struct sBSIM3v32model #define BSIM3v32_MOD_LCDSCD 327 #define BSIM3v32_MOD_LAGS 328 - + #define BSIM3v32_MOD_LFRINGE 331 #define BSIM3v32_MOD_LELM 332 @@ -1505,7 +1505,7 @@ typedef struct sBSIM3v32model #define BSIM3v32_MOD_WA0 388 #define BSIM3v32_MOD_WA1 389 #define BSIM3v32_MOD_WA2 390 -#define BSIM3v32_MOD_WKETA 391 +#define BSIM3v32_MOD_WKETA 391 #define BSIM3v32_MOD_WNSUB 392 #define BSIM3v32_MOD_WNPEAK 393 #define BSIM3v32_MOD_WNGATE 395 @@ -1602,7 +1602,7 @@ typedef struct sBSIM3v32model #define BSIM3v32_MOD_PA0 518 #define BSIM3v32_MOD_PA1 519 #define BSIM3v32_MOD_PA2 520 -#define BSIM3v32_MOD_PKETA 521 +#define BSIM3v32_MOD_PKETA 521 #define BSIM3v32_MOD_PNSUB 522 #define BSIM3v32_MOD_PNPEAK 523 #define BSIM3v32_MOD_PNGATE 525 @@ -1811,8 +1811,8 @@ typedef struct sBSIM3v32model #include "bsim3v32ext.h" extern void BSIM3v32evaluate(double,double,double,BSIM3v32instance*,BSIM3v32model*, - double*,double*,double*, double*, double*, double*, double*, - double*, double*, double*, double*, double*, double*, double*, + double*,double*,double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, CKTcircuit*); extern int BSIM3v32debug(BSIM3v32model*, BSIM3v32instance*, CKTcircuit*, int); extern int BSIM3v32checkModel(BSIM3v32model*, BSIM3v32instance*, CKTcircuit*); diff --git a/src/spicelib/devices/bsim3v32/bsim3v32ext.h b/src/spicelib/devices/bsim3v32/bsim3v32ext.h index b61b05109..b64496f6d 100644 --- a/src/spicelib/devices/bsim3v32/bsim3v32ext.h +++ b/src/spicelib/devices/bsim3v32/bsim3v32ext.h @@ -20,7 +20,7 @@ extern void BSIM3v32mosCap(CKTcircuit*, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double*, double*, double*, double*, double*, double*, double*, double*, - double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, double*); extern int BSIM3v32param(int,IFvalue*,GENinstance*,IFvalue*); extern int BSIM3v32pzLoad(GENmodel*,CKTcircuit*,SPcomplex*); diff --git a/src/spicelib/devices/bsim3v32/bsim3v32init.c b/src/spicelib/devices/bsim3v32/bsim3v32init.c index 954088002..544a189d6 100644 --- a/src/spicelib/devices/bsim3v32/bsim3v32init.c +++ b/src/spicelib/devices/bsim3v32/bsim3v32init.c @@ -52,7 +52,7 @@ SPICEdev BSIM3v32info = { /* DEVaccept */ NULL, /* DEVdestroy */ BSIM3v32destroy, /* DEVmodDelete */ BSIM3v32mDelete, - /* DEVdelete */ BSIM3v32delete, + /* DEVdelete */ BSIM3v32delete, /* DEVsetic */ BSIM3v32getic, /* DEVask */ BSIM3v32ask, /* DEVmodAsk */ BSIM3v32mAsk, @@ -69,7 +69,7 @@ SPICEdev BSIM3v32info = { #ifdef CIDER /* DEVdump */ NULL, /* DEVacct */ NULL, -#endif +#endif /* DEVinstSize */ &BSIM3v32iSize, /* DEVmodSize */ &BSIM3v32mSize