From 99cfe7bc81fa6fce7390e290d690d231d64fdf51 Mon Sep 17 00:00:00 2001 From: Holger Vogt Date: Sun, 23 Feb 2020 14:28:29 +0100 Subject: [PATCH] MOS output characteristics with and witout drain series resistance --- examples/various/nmos_out_BSIM330.sp | 37 ++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 examples/various/nmos_out_BSIM330.sp diff --git a/examples/various/nmos_out_BSIM330.sp b/examples/various/nmos_out_BSIM330.sp new file mode 100644 index 000000000..20338b5a3 --- /dev/null +++ b/examples/various/nmos_out_BSIM330.sp @@ -0,0 +1,37 @@ +***** NMOS Transistor BSIM3 (Id-Vds) with Rd *** + +M1 2 1 3 4 n1 W=1u L=0.35u Pd=1.5u Ps=1.5u ad=1.5p as=1.5p +vgs 1 0 3.5 +vds 2 0 0.1 +vss 3 0 0 +vbs 4 0 0 + +* drain series resistor +R2 2 22 1k +M2 22 1 32 4 n1 W=1u L=0.35u Pd=1.5u Ps=1.5u ad=1.5p as=1.5p +vss2 32 0 0 + + +.options Temp=27.0 + +* BSIM3v3.3.0 model with modified default parameters 0.18µm +.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15 +.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15 + +.control +set xgridwidth=2 +set xbrushwidth=3 +dc vds 0 2 0.05 vgs 0 2 0.4 +set nolegend +plot vss#branch title 'Drain current versus drain voltage' xlabel 'Drain voltage' ylabel 'Drain current' +unset nolegend +set color0=white +plot vss2#branch vs v(22) title 'Series resistor: Drain current versus drain voltage' xlabel 'Drain voltage' ylabel 'Drain current' +.endc + +.end + + + + +