diff --git a/examples/sp/sp3.cir b/examples/sp/sp3.cir
new file mode 100644
index 000000000..60c873376
--- /dev/null
+++ b/examples/sp/sp3.cir
@@ -0,0 +1,27 @@
+Example of VSRC as voltage ports
+* https://qucs-help.readthedocs.io/en/spice4qucs/RF.html fig. 13.2
+*
+*
+V1 in 0 dc 0 ac 1 portnum 1 z0 50 ; pwr 0.001 freq 2.3e9
+
+C1 in 0 318.3n
+L1  in out 1.592m
+C2 out 0 318.3n
+
+V2 out 0 dc 0 ac 0 portnum 2 z0 50 ; pwr 0.002 freq 3.2e9
+
+.control
+sp dec 100 1 1e6 0
+display
+set xbrushwidth=5
+set xgridwidth=2
+plot mag(S_1_1) mag(S_1_2) mag(S_2_1) mag(S_2_2)
+plot S_1_1 smithgrid
+plot S_1_2 polar
+set hcopydevtype = svg
+hardcopy plot_1.svg  S_1_2 polar
+hardcopy plot_2.svg  S_1_1 smithgrid
+
+.endc
+
+.end
diff --git a/examples/sp/sp4.cir b/examples/sp/sp4.cir
new file mode 100644
index 000000000..8af1f72b2
--- /dev/null
+++ b/examples/sp/sp4.cir
@@ -0,0 +1,20 @@
+Example of VSRC as power ports * *
+
+V1 in 0 dc 0 ac 1 portnum 1 z0 100
+*V1 in 0 dc 1 ac 1
+Rpt in x 100
+C1 x 0 1e-9
+R2 x out 10
+V2 out 0 dc 0 ac 0 portnum 2 z0 50
+*V2 out 0 dc 0 ac 0
+V3 x 0 portnum 3 z0 200
+
+.sp lin 100 1e8 1e9 1
+*.ac dec 100 1 1e8
+
+.control
+run
+quit
+.endc
+
+.end