From 925cb49ff204af266c66414e76fd3e962983dbd0 Mon Sep 17 00:00:00 2001 From: Holger Vogt Date: Sat, 1 Sep 2018 23:09:16 +0200 Subject: [PATCH] Add some description, correct minor bugs. --- .../xspice/table/modelcards/modelcard.nmos | 2 +- .../xspice/table/modelcards/modelcard.pmos | 2 +- .../xspice/table/table-generator-b4-2d.sp | 26 ++++++++++++++----- .../xspice/table/table-generator-b4-3d.sp | 25 ++++++++++++++---- examples/xspice/table/table-generator-q-2d.sp | 15 ++++++++--- 5 files changed, 53 insertions(+), 17 deletions(-) diff --git a/examples/xspice/table/modelcards/modelcard.nmos b/examples/xspice/table/modelcards/modelcard.nmos index 9723bb968..3cb67da6b 100644 --- a/examples/xspice/table/modelcards/modelcard.nmos +++ b/examples/xspice/table/modelcards/modelcard.nmos @@ -12,7 +12,7 @@ ** Lmin=0.02 Lmax=10 Wmin=0.6 Wmax=20 ** By Mohan Dunga, Wenwei Yang 05/18/2007 -.MODEL N1 NMOS LEVEL = 14 +.MODEL NBSIM4 NMOS LEVEL = 14 +VERSION = 4.7 BINUNIT = 1 PARAMCHK= 0 MOBMOD = 0 +CAPMOD = 1 IGCMOD = 1 IGBMOD = 1 GEOMOD = 1 diff --git a/examples/xspice/table/modelcards/modelcard.pmos b/examples/xspice/table/modelcards/modelcard.pmos index 19a3309d0..256314932 100644 --- a/examples/xspice/table/modelcards/modelcard.pmos +++ b/examples/xspice/table/modelcards/modelcard.pmos @@ -12,7 +12,7 @@ ** Lmin=0.02 Lmax=10 Wmin=0.6 Wmax=20 ** By Mohan Dunga, Wenwei Yang 05/18/2007 -.MODEL P1 PMOS LEVEL = 14 +.MODEL PBSIM4 PMOS LEVEL = 14 +VERSION = 4.6.5 BINUNIT = 1 PARAMCHK= 0 MOBMOD = 0 +CAPMOD = 2 IGCMOD = 1 IGBMOD = 1 GEOMOD = 1 diff --git a/examples/xspice/table/table-generator-b4-2d.sp b/examples/xspice/table/table-generator-b4-2d.sp index 7d8e63e9c..6b4c42a6b 100644 --- a/examples/xspice/table/table-generator-b4-2d.sp +++ b/examples/xspice/table/table-generator-b4-2d.sp @@ -1,4 +1,17 @@ ** NMOSFET: table generator with BSIM4 2D (Vdrain, Vgate) +* This file may be run by 'ngspice table-generator-b4-2d.sp' +* It will generate a 2D data table by simulating the MOS drain current +* as function of drain and gate voltages. The simulation uses +* the ngspice BSIM4.6.1 MOS model and Berkeley model parameters. +* This table is an input file for the XSPICE 2D table model. +* You have to select NMOS or PMOS by manually editing this file: currently +* PMOS is selected. For NMOS change '*' in column 1 +* for CSPARAM, m1, outfile, echo *table... +* In addition you may change the step sizes vdstep vgstep vbstep in CSPARAM +* to obtain the required resolution for the data. +* These tables will contain pure dc data. For transient simulation you may +* need to add some capacitors to the device model for a 'real world' simulation. + *NMOS *.csparam vdstart=-0.1 *.csparam vdstop=1.8 @@ -16,19 +29,20 @@ .csparam vgstep=0.01 ** Circuit Description ** -*m1 2 1 3 0 n1 L=0.13u W=10.0u rgeoMod=1 -m1 2 1 3 0 p1 L=0.13u W=10.0u rgeoMod=1 +*m1 2 1 3 0 nbsim4 L=0.13u W=10.0u rgeoMod=1 +m1 2 1 3 0 pbsim4 L=0.13u W=10.0u rgeoMod=1 vgs 1 0 1.8 vds 2 0 1.8 vss 3 0 0 .control ** output file ** -set outfile = "bsim4n-2d-1.table" +*set outfile = "bsim4n-2d-1.table" +set outfile = "bsim4p-2d-1.table" -*dc vds 0 1.8 0.05 vgs 0 1.8 0.3 save i(vss) -echo *table for nmos bsim 4 > $outfile +*echo *table for nmos bsim 4 > $outfile +echo *table for pmos bsim 4 > $outfile let xcount = floor((vdstop-vdstart)/vdstep) + 1 let ycount = floor((vgstop-vgstart)/vgstep) + 1 @@ -81,7 +95,7 @@ end .endc - .include ./modelcards/modelcard.pmos .include ./modelcards/modelcard.nmos + .end diff --git a/examples/xspice/table/table-generator-b4-3d.sp b/examples/xspice/table/table-generator-b4-3d.sp index 12d786508..c21c4281c 100644 --- a/examples/xspice/table/table-generator-b4-3d.sp +++ b/examples/xspice/table/table-generator-b4-3d.sp @@ -1,4 +1,17 @@ -** NMOSFET: table generator with BSIM4 2D (Vdrain, Vgate) +** NMOSFET: table generator with BSIM4 3D (Vdrain, Vgate, Vbulk) +* This file may be run by 'ngspice table-generator-b4-3d.sp' +* It will generate a 3D data table by simulating the MOS drain current +* as function of drain and gate voltages. The simulation uses +* the ngspice BSIM4.6.1 MOS model and Berkeley model parameters. +* This table is an input file for the XSPICE 3D table model. +* You have to select NMOS or PMOS by manually editing this file: currently +* NMOS is selected. For PMOS change '*' in column 1 +* for CSPARAM, m1, outfile, echo *table... +* In addition you may change the step sizes vdstep vgstep vbstep in CSPARAM +* to obtain the required resolution for the data. +* These tables will contain pure dc data. For transient simulation you may +* need to add some capacitors to the device model for a 'real world' simulation. + *NMOS .csparam vdstart=-0.1 .csparam vdstop=1.8 @@ -22,8 +35,8 @@ *.csparam vbstep=0.2 ** Circuit Description ** -m1 2 1 3 4 n1 L=0.13u W=10.0u rgeoMod=1 -*m1 2 1 3 4 p1 L=0.13u W=10.0u rgeoMod=1 +m1 2 1 3 4 nbsim4 L=0.13u W=10.0u rgeoMod=1 +*m1 2 1 3 4 pbsim4 L=0.13u W=10.0u rgeoMod=1 vgs 1 0 1.8 vds 2 0 1.8 vss 3 0 0 @@ -32,9 +45,11 @@ vbs 4 0 0 .control ** output file ** set outfile = "bsim4n-3d-1.table" +*set outfile = "bsim4p-3d-1.table" save i(vss) echo * 3D table for nmos bsim 4 > $outfile +*echo * 3D table for nmos bsim 4 > $outfile let xcount = floor((vdstop-vdstart)/vdstep) + 1 let ycount = floor((vgstop-vgstart)/vgstep) + 1 @@ -101,7 +116,7 @@ while lcz < zcount end .endc - -.include ./modelcards/modelcard.pmos .include ./modelcards/modelcard.nmos +.include ./modelcards/modelcard.pmos + .end diff --git a/examples/xspice/table/table-generator-q-2d.sp b/examples/xspice/table/table-generator-q-2d.sp index d27bfc4f7..2c174dd06 100644 --- a/examples/xspice/table/table-generator-q-2d.sp +++ b/examples/xspice/table/table-generator-q-2d.sp @@ -1,5 +1,15 @@ ** npn bipolar: table generator with q 2D (Vce, Ib) -*NMOS +* This file may be run by 'ngspice table-generator-q-2d.sp' +* It will generate a 2D data table by simulating the bipolar collector current +* as function of collector voltage and base current. The simulation uses +* the ngspice bipolar model and model parameters of a clc409 transitor. +* This table is an input file for the XSPICE 2D table model. +* You may change the step sizes vcstep ibstep in CSPARAM +* to obtain the required resolution for the data. +* These tables will contain pure dc data. For transient simulation you may +* need to add some capacitors to the device model for a 'real world' simulation. + +*NPN .csparam vcstart=-0.2 .csparam vcstop=6.4 .csparam vcstep=0.05 @@ -79,14 +89,11 @@ while lcy < ycount let lcy = lcy + 1 end - - label next end .endc - .MODEL QINN NPN + IS =0.166f BF =3.239E+02 NF =1.000E+00 VAF=8.457E+01 + IKF=2.462E-02 ISE=2.956E-17 NE =1.197E+00 BR =3.719E+01