From 8c98b70e45ebd495602cdaa12c2a953c18d61d09 Mon Sep 17 00:00:00 2001 From: Holger Vogt Date: Sat, 28 Jan 2023 14:54:25 +0100 Subject: [PATCH] Add input file dedicated to batch mode, to be run with ngspice -b -r inv.out bsimbulk_inverter_bach.sp --- .../osdi/bsimbulk/bsimbulk_inverter_batch.sp | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 examples/osdi/bsimbulk/bsimbulk_inverter_batch.sp diff --git a/examples/osdi/bsimbulk/bsimbulk_inverter_batch.sp b/examples/osdi/bsimbulk/bsimbulk_inverter_batch.sp new file mode 100644 index 000000000..ad469d653 --- /dev/null +++ b/examples/osdi/bsimbulk/bsimbulk_inverter_batch.sp @@ -0,0 +1,31 @@ +* BSIMBULK model vers. 107 +* simple inverter +* to be started in batch mode with raw file, e.g. +* ngspice -b -r invout.raw bsimbulk_inverter_batch.sp + +.param Vcc = 1.2 +.csparam vcc='Vcc' + +* Path to the models +.include Modelcards/model.l + +* the voltage sources: +Vdd vdd gnd DC 'Vcc' +V1 in gnd pulse(0 'Vcc' 0p 200p 100p 1n 2n) +Vmeas vss 0 0 + +Xnot1 in vdd vss out not1 +*Rout out 0 1k + +.subckt not1 a vdd vss z +Np1 z a vdd vdd BSIMBULK_osdi_P l=0.1u w=1u as=0.26235p ad=0.26235p ps=2.51u pd=2.51u +Nn1 z a vss vss BSIMBULK_osdi_N l=0.1u w=0.5u as=0.131175p ad=0.131175p ps=1.52u pd=1.52u +c3 a vss 0.384f +c2 z vss 0.576f +.ends + +* simulation command: +.tran 10ps 10ns +.dc V1 0 'vcc' 'vcc/100' + +.end