From 4bccb4791a9bcf8d39877182164e42c3783e131c Mon Sep 17 00:00:00 2001 From: Kevin Zheng Date: Thu, 12 Sep 2019 19:34:52 -0700 Subject: [PATCH 1/3] Add parser outputs to gitignore --- .gitignore | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/.gitignore b/.gitignore index 10731e4f7..8ec6a6ed7 100644 --- a/.gitignore +++ b/.gitignore @@ -77,3 +77,7 @@ Makefile.in # Visual Studio user options files **/*.vcxproj.user +src/frontend/parse-bison.c +src/frontend/parse-bison.h +src/spicelib/parser/inpptree-parser.c +src/spicelib/parser/inpptree-parser.h From cf5c32dc165f6f23c8fa29a92c18861ff4e59d62 Mon Sep 17 00:00:00 2001 From: Kevin Zheng Date: Thu, 12 Sep 2019 19:13:32 -0700 Subject: [PATCH 2/3] Fix indentation --- src/maths/ni/niconv.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/maths/ni/niconv.c b/src/maths/ni/niconv.c index 9c70b8120..c147caf43 100644 --- a/src/maths/ni/niconv.c +++ b/src/maths/ni/niconv.c @@ -33,7 +33,7 @@ NIconvTest(CKTcircuit *ckt) for (i=1;i<=size;i++) { new = ckt->CKTrhs [i] ; old = ckt->CKTrhsOld [i] ; - printf("chk for convergence: %s new: %g old: %g\n",CKTnodName(ckt,i),new,old); + printf("chk for convergence: %s new: %g old: %g\n",CKTnodName(ckt,i),new,old); } #endif /* STEPDEBUG */ for (i=1;i<=size;i++) { @@ -51,10 +51,10 @@ NIconvTest(CKTcircuit *ckt) if (fabs(new-old) >tol ) { #ifdef STEPDEBUG printf(" non-convergence at node (type=3) %s (fabs(new-old)>tol --> fabs(%g-%g)>%g)\n",CKTnodName(ckt,i),new,old,tol); - printf(" reltol: %g voltTol: %g (tol=reltol*(MAX(fabs(old),fabs(new))) + voltTol)\n",ckt->CKTreltol,ckt->CKTvoltTol); + printf(" reltol: %g voltTol: %g (tol=reltol*(MAX(fabs(old),fabs(new))) + voltTol)\n",ckt->CKTreltol,ckt->CKTvoltTol); #endif /* STEPDEBUG */ - ckt->CKTtroubleNode = i; - ckt->CKTtroubleElt = NULL; + ckt->CKTtroubleNode = i; + ckt->CKTtroubleElt = NULL; return(1); } } else { @@ -63,10 +63,10 @@ NIconvTest(CKTcircuit *ckt) if (fabs(new-old) >tol ) { #ifdef STEPDEBUG printf(" non-convergence at node (type=%d) %s (fabs(new-old)>tol --> fabs(%g-%g)>%g)\n",node->type,CKTnodName(ckt,i),new,old,tol); - printf(" reltol: %g abstol: %g (tol=reltol*(MAX(fabs(old),fabs(new))) + abstol)\n",ckt->CKTreltol,ckt->CKTabstol); + printf(" reltol: %g abstol: %g (tol=reltol*(MAX(fabs(old),fabs(new))) + abstol)\n",ckt->CKTreltol,ckt->CKTabstol); #endif /* STEPDEBUG */ - ckt->CKTtroubleNode = i; - ckt->CKTtroubleElt = NULL; + ckt->CKTtroubleNode = i; + ckt->CKTtroubleElt = NULL; return(1); } } From dc181dea2e2922c5d1b8f0d30030b1d796fdda00 Mon Sep 17 00:00:00 2001 From: Kevin Zheng Date: Tue, 12 May 2020 12:52:33 -0700 Subject: [PATCH 3/3] Remove commented-out code Debug information about non-convergence was moved to CKTncDump(). Remove the duplicate, commented-out code. --- src/spicelib/analysis/dcop.c | 34 ---------------------------------- src/spicelib/analysis/dcpss.c | 30 ------------------------------ src/spicelib/analysis/dctran.c | 30 ------------------------------ 3 files changed, 94 deletions(-) diff --git a/src/spicelib/analysis/dcop.c b/src/spicelib/analysis/dcop.c index 385f740d8..b7781c02a 100644 --- a/src/spicelib/analysis/dcop.c +++ b/src/spicelib/analysis/dcop.c @@ -86,40 +86,6 @@ DCop(CKTcircuit *ckt, int notused) if(converged != 0) { fprintf(stdout,"\nDC solution failed -\n"); CKTncDump(ckt); -/* - CKTnode *node; - double new, old, tol; - int i=1; - - fprintf(stdout,"\nDC solution failed -\n\n"); - fprintf(stdout,"Last Node Voltages\n"); - fprintf(stdout,"------------------\n\n"); - fprintf(stdout,"%-30s %20s %20s\n", "Node", "Last Voltage", - "Previous Iter"); - fprintf(stdout,"%-30s %20s %20s\n", "----", "------------", - "-------------"); - for(node=ckt->CKTnodes->next;node;node=node->next) { - if (strstr(node->name, "#branch") || !strchr(node->name, '#')) { - new = ckt->CKTrhsOld [i] ; - old = ckt->CKTrhs [i] ; - fprintf(stdout,"%-30s %20g %20g", node->name, new, old); - if(node->type == SP_VOLTAGE) { - tol = ckt->CKTreltol * (MAX(fabs(old),fabs(new))) + - ckt->CKTvoltTol; - } else { - tol = ckt->CKTreltol * (MAX(fabs(old),fabs(new))) + - ckt->CKTabstol; - } - if (fabs(new-old) >tol ) { - fprintf(stdout," *"); - } - fprintf(stdout,"\n"); - } - i++; - } - fprintf(stdout,"\n"); - SPfrontEnd->OUTendPlot (plot); */ - return(converged); } diff --git a/src/spicelib/analysis/dcpss.c b/src/spicelib/analysis/dcpss.c index adde7f581..ecc82dbd8 100644 --- a/src/spicelib/analysis/dcpss.c +++ b/src/spicelib/analysis/dcpss.c @@ -288,36 +288,6 @@ DCpss(CKTcircuit *ckt, if(converged != 0) { fprintf(stdout,"\nTransient solution failed -\n"); CKTncDump(ckt); -/* CKTnode *node; - double new, old, tol; - int i=1; - - fprintf(stdout,"\nTransient solution failed -\n\n"); - fprintf(stdout,"Last Node Voltages\n"); - fprintf(stdout,"------------------\n\n"); - fprintf(stdout,"%-30s %20s %20s\n", "Node", "Last Voltage", - "Previous Iter"); - fprintf(stdout,"%-30s %20s %20s\n", "----", "------------", - "-------------"); - for(node=ckt->CKTnodes->next;node;node=node->next) { - if (strstr(node->name, "#branch") || !strchr(node->name, '#')) { - new = ckt->CKTrhsOld [i] ; - old = ckt->CKTrhs [i] ; - fprintf(stdout,"%-30s %20g %20g", node->name, new, old); - if(node->type == SP_VOLTAGE) { - tol = ckt->CKTreltol * (MAX(fabs(old),fabs(new))) + - ckt->CKTvoltTol; - } else { - tol = ckt->CKTreltol * (MAX(fabs(old),fabs(new))) + - ckt->CKTabstol; - } - if (fabs(new-old) >tol ) { - fprintf(stdout," *"); - } - fprintf(stdout,"\n"); - } - i++; - } */ fprintf(stdout,"\n"); fflush(stdout); } else if (!ft_noacctprint && !ft_noinitprint) { diff --git a/src/spicelib/analysis/dctran.c b/src/spicelib/analysis/dctran.c index 6e6a03f77..4170a9a60 100644 --- a/src/spicelib/analysis/dctran.c +++ b/src/spicelib/analysis/dctran.c @@ -229,36 +229,6 @@ DCtran(CKTcircuit *ckt, if(converged != 0) { fprintf(stdout,"\nTransient solution failed -\n"); CKTncDump(ckt); -/* CKTnode *node; - double new, old, tol; - int i=1; - - fprintf(stdout,"\nTransient solution failed -\n\n"); - fprintf(stdout,"Last Node Voltages\n"); - fprintf(stdout,"------------------\n\n"); - fprintf(stdout,"%-30s %20s %20s\n", "Node", "Last Voltage", - "Previous Iter"); - fprintf(stdout,"%-30s %20s %20s\n", "----", "------------", - "-------------"); - for(node=ckt->CKTnodes->next;node;node=node->next) { - if (strstr(node->name, "#branch") || !strchr(node->name, '#')) { - new = ckt->CKTrhsOld [i] ; - old = ckt->CKTrhs [i] ; - fprintf(stdout,"%-30s %20g %20g", node->name, new, old); - if(node->type == SP_VOLTAGE) { - tol = ckt->CKTreltol * (MAX(fabs(old),fabs(new))) + - ckt->CKTvoltTol; - } else { - tol = ckt->CKTreltol * (MAX(fabs(old),fabs(new))) + - ckt->CKTabstol; - } - if (fabs(new-old) >tol ) { - fprintf(stdout," *"); - } - fprintf(stdout,"\n"); - } - i++; - } */ fprintf(stdout,"\n"); fflush(stdout); } else if (!ft_noacctprint && !ft_noinitprint) {