From 7aa8ed017069baa65123903c1d2bcab088ec4963 Mon Sep 17 00:00:00 2001
From: dwarning <dwarning>
Date: Fri, 28 Feb 2025 16:52:00 +0100
Subject: [PATCH] Involve optional d-s shunt in ac and pz analysis

---
 src/spicelib/devices/vdmos/vdmosacld.c | 6 ++++--
 src/spicelib/devices/vdmos/vdmospzld.c | 6 ++++--
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/spicelib/devices/vdmos/vdmosacld.c b/src/spicelib/devices/vdmos/vdmosacld.c
index b5f5e3138..5e5315611 100644
--- a/src/spicelib/devices/vdmos/vdmosacld.c
+++ b/src/spicelib/devices/vdmos/vdmosacld.c
@@ -96,8 +96,8 @@ VDMOSacLoad(GENmodel *inModel, CKTcircuit *ckt)
             *(here->VDMOSDPgpPtr +1) -= xgd;
             *(here->VDMOSSPgpPtr +1) -= xgs;
 
-            *(here->VDMOSDdPtr) += here->VDMOSdrainConductance;
-            *(here->VDMOSSsPtr) += here->VDMOSsourceConductance;
+            *(here->VDMOSDdPtr) += here->VDMOSdrainConductance + here->VDMOSdsConductance;
+            *(here->VDMOSSsPtr) += here->VDMOSsourceConductance + here->VDMOSdsConductance;
             *(here->VDMOSDPdpPtr) += here->VDMOSdrainConductance+
                     here->VDMOSgds+xrev*(here->VDMOSgm);
             *(here->VDMOSSPspPtr) += here->VDMOSsourceConductance+
@@ -110,6 +110,8 @@ VDMOSacLoad(GENmodel *inModel, CKTcircuit *ckt)
             *(here->VDMOSSPgpPtr) -= (xnrm-xrev)*here->VDMOSgm;
             *(here->VDMOSSPsPtr) -= here->VDMOSsourceConductance;
             *(here->VDMOSSPdpPtr) -= here->VDMOSgds+xrev*(here->VDMOSgm);
+            *(here->VDMOSDsPtr) += (-here->VDMOSdsConductance);
+            *(here->VDMOSSdPtr) += (-here->VDMOSdsConductance);
             /* gate resistor */
             *(here->VDMOSGgPtr) += (here->VDMOSgateConductance);
             *(here->VDMOSGPgpPtr) += (here->VDMOSgateConductance);
diff --git a/src/spicelib/devices/vdmos/vdmospzld.c b/src/spicelib/devices/vdmos/vdmospzld.c
index 6c3742547..65e6ebc11 100644
--- a/src/spicelib/devices/vdmos/vdmospzld.c
+++ b/src/spicelib/devices/vdmos/vdmospzld.c
@@ -70,8 +70,8 @@ VDMOSpzLoad(GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
             *(here->VDMOSSPgpPtr   ) -= xgs*s->real;
             *(here->VDMOSSPgpPtr +1) -= xgs*s->imag;
 
-            *(here->VDMOSDdPtr) += here->VDMOSdrainConductance;
-            *(here->VDMOSSsPtr) += here->VDMOSsourceConductance;
+            *(here->VDMOSDdPtr) += here->VDMOSdrainConductance + here->VDMOSdsConductance;
+            *(here->VDMOSSsPtr) += here->VDMOSsourceConductance + here->VDMOSdsConductance;
             *(here->VDMOSDPdpPtr) += here->VDMOSdrainConductance+
                     here->VDMOSgds+xrev*(here->VDMOSgm);
             *(here->VDMOSSPspPtr) += here->VDMOSsourceConductance+
@@ -84,6 +84,8 @@ VDMOSpzLoad(GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
             *(here->VDMOSSPgpPtr) -= (xnrm-xrev)*here->VDMOSgm;
             *(here->VDMOSSPsPtr) -= here->VDMOSsourceConductance;
             *(here->VDMOSSPdpPtr) -= here->VDMOSgds+xrev*(here->VDMOSgm);
+            *(here->VDMOSDsPtr) += (-here->VDMOSdsConductance);
+            *(here->VDMOSSdPtr) += (-here->VDMOSdsConductance);
             /* gate resistor */
             *(here->VDMOSGgPtr) += (here->VDMOSgateConductance);
             *(here->VDMOSGPgpPtr) += (here->VDMOSgateConductance);