From 70ba37b149779b0ec34c3c3ca9b9711d0dff9f0b Mon Sep 17 00:00:00 2001 From: Holger Vogt Date: Fri, 20 Aug 2021 20:22:12 +0200 Subject: [PATCH] Example OpAmp which converge for op only with optran: TLV6001 and TLV9002 --- examples/optran/TLV6001-test.cir | 34 +++ examples/optran/TLV9002-test.cir | 34 +++ examples/optran/models/TLV6001.LIB | 382 ++++++++++++++++++++++++++ examples/optran/models/TLV9002.lib | 422 +++++++++++++++++++++++++++++ 4 files changed, 872 insertions(+) create mode 100644 examples/optran/TLV6001-test.cir create mode 100644 examples/optran/TLV9002-test.cir create mode 100644 examples/optran/models/TLV6001.LIB create mode 100644 examples/optran/models/TLV9002.lib diff --git a/examples/optran/TLV6001-test.cir b/examples/optran/TLV6001-test.cir new file mode 100644 index 000000000..e71b1d24e --- /dev/null +++ b/examples/optran/TLV6001-test.cir @@ -0,0 +1,34 @@ +.title KiCad schematic +.include "./models/TLV6001.LIB" +Vsignal1 Vin GND dc 2.5 ac 1 +Vcc1 Vcc GND 5 +R1 Vin Net-_R1-Pad2_ 1000 +R2 Vout Net-_R1-Pad2_ 1meg +R3 Vcc Net-_R3-Pad2_ 10k +R4 Net-_R3-Pad2_ GND 10k +XU1 Net-_R3-Pad2_ Net-_R1-Pad2_ Vcc GND Vout TLV6001 +.save @vsignal1[i] +.save @vcc1[i] +.save @r1[i] +.save @r2[i] +.save @r3[i] +.save @r4[i] +.save V(Net-_R1-Pad2_) +.save V(Net-_R3-Pad2_) +.save V(Vcc) +.save V(Vin) +.save V(Vout) +.ac dec 10 100m 20k + +*.options NOOPITER GMINSTEPS=0 +*.options RELTOL=1e-3 VNTOL=1u PIVTOL=1e-11 + +.control +optran 1 1 1 100n 10u 0 +run +plot db(Vout) +set units=degrees +plot ph(Vout) +.endc + +.end diff --git a/examples/optran/TLV9002-test.cir b/examples/optran/TLV9002-test.cir new file mode 100644 index 000000000..c4355c0d3 --- /dev/null +++ b/examples/optran/TLV9002-test.cir @@ -0,0 +1,34 @@ +.title KiCad schematic +.include "./models/TLV9002.LIB" +Vsignal1 Vin GND dc 2.5 ac 1 +Vcc1 Vcc GND 5 +R1 Vin Net-_R1-Pad2_ 1000 +R2 Vout Net-_R1-Pad2_ 1meg +R3 Vcc Net-_R3-Pad2_ 10k +R4 Net-_R3-Pad2_ GND 10k +XU1 Net-_R3-Pad2_ Net-_R1-Pad2_ Vcc GND Vout TLV9002 +.save @vsignal1[i] +.save @vcc1[i] +.save @r1[i] +.save @r2[i] +.save @r3[i] +.save @r4[i] +.save V(Net-_R1-Pad2_) +.save V(Net-_R3-Pad2_) +.save V(Vcc) +.save V(Vin) +.save V(Vout) +.ac dec 10 100m 20k + +*.options NOOPITER GMINSTEPS=0 +*.options RELTOL=1e-3 VNTOL=1u PIVTOL=1e-11 + +.control +optran 0 0 0 100n 10u 0 +run +plot db(Vout) +set units=degrees +plot ph(Vout) +.endc + +.end diff --git a/examples/optran/models/TLV6001.LIB b/examples/optran/models/TLV6001.LIB new file mode 100644 index 000000000..52cbfd163 --- /dev/null +++ b/examples/optran/models/TLV6001.LIB @@ -0,0 +1,382 @@ +*$ +* TLV6001 +***************************************************************************** +* (C) Copyright 2019 Texas Instruments Incorporated. All rights reserved. +***************************************************************************** +** This model is designed as an aid for customers of Texas Instruments. +** TI and its licensors and suppliers make no warranties, either expressed +** or implied, with respect to this model, including the warranties of +** merchantability or fitness for a particular purpose. The model is +** provided solely on an "as is" basis. The entire risk as to its quality +** and performance is with the customer +***************************************************************************** +* +* This model is subject to change without notice. Texas Instruments +* Incorporated is not responsible for updating this model. +* +***************************************************************************** +* +** Released by: Online Design Tools, Texas Instruments Inc. +* Part: TLV6001 +* Date: 19FEB2019 +* Model Type: Generic (suitable for all analysis types) +* EVM Order Number: N/A +* EVM Users Guide: N/A +* Datasheet: SBOS779D -JUNE 2016-REVISED MAY 2017 +* Created with Green-Williams-Lis Op Amp Macro-model Architecture +* +* Model Version: Final 1.2 +* +***************************************************************************** +* +* Updates: +* +* Final 1.2 +* VOS drift feature is added +* Added Unique subckt name, removed Claw ABS. +* Simplified subckt for current noise. +* +* Final 1.1 +* Release to Web. +* +**************************************************************************** +* Model Usage Notes: +* 1. The following parameters are modeled: +* OPEN-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Aol) +* UNITY GAIN BANDWIDTH (GBW) +* INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR) +* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR) +* DIFFERENTIAL INPUT IMPEDANCE (Zid) +* COMMON-MODE INPUT IMPEDANCE (Zic) +* OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo) +* OUTPUT CURRENT THROUGH THE SUPPLY (Iout) +* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en) +* INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in) +* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo) +* SHORT-CIRCUIT OUTPUT CURRENT (Isc) +* QUIESCENT CURRENT (Iq) +* SETTLING TIME VS. CAPACITIVE LOAD (ts) +* SLEW RATE (SR) +* SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD +* LARGE SIGNAL RESPONSE +* OVERLOAD RECOVERY TIME (tor) +* INPUT BIAS CURRENT (Ib) +* INPUT OFFSET CURRENT (Ios) +* INPUT OFFSET VOLTAGE (Vos) +* INPUT OFFSET VOLTAGE VS. TEMPERATURE (Vos Drift) +* INPUT COMMON-MODE VOLTAGE RANGE (Vcm) +* INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm) +* INPUT/OUTPUT ESD CELLS (ESDin, ESDout) +****************************************************** +.subckt TLV6001 IN+ IN- VCC VEE OUT +****************************************************** +* MODEL DEFINITIONS: +.model BB_SW VSWITCH(Ron=50 Roff=1e9 Von=700e-3 Voff=0) +.model ESD_SW VSWITCH(Ron=50 Roff=1e9 Von=500e-3 Voff=100e-3) +.model OL_SW VSWITCH(Ron=1e-3 Roff=1e9 Von=900e-3 Voff=800e-3) +.model OR_SW VSWITCH(Ron=10e-3 Roff=1e9 Von=1e-3 Voff=0) +.model R_NOISELESS RES(T_ABS=-273.15) +****************************************************** +XV_OS N032 N038 VOS_DRIFT_TLV6001 +R1 N035 N033 R_NOISELESS 1e-3 +R2 N044 ESDn R_NOISELESS 1e-3 +R3 N056 0 R_NOISELESS 1e9 +C1 N056 0 1 +R4 VCC_B N055 R_NOISELESS 1e-3 +C2 N055 0 1e-15 +C3 N057 0 1e-15 +R5 N057 VEE_B R_NOISELESS 1e-3 +G1 N035 N036 N006 N005 1e-3 +R6 MID N042 R_NOISELESS 1e9 +VCM_MIN N043 VEE_B -0.2 +R7 N043 MID R_NOISELESS 1e9 +VCM_MAX N042 VCC_B 0.2 +XVCM_CLAMP N036 MID N039 MID N042 N043 VCCS_EXT_LIM_TLV6001 +R8 N039 MID R_NOISELESS 1 +C4 N040 MID 1e-15 +R9 N039 N040 R_NOISELESS 1e-3 +V4 N053 OUT 0 +XIQ+ VIMON MID VCC MID VCCS_LIM_IQ_TLV6001 +XIQ- MID VIMON VEE MID VCCS_LIM_IQ_TLV6001 +R12 VCC_B N009 R_NOISELESS 1e3 +R13 N028 VEE_B R_NOISELESS 1e3 +XCLAWp VIMON MID N009 VCC_B VCCS_LIM_CLAWp_TLV6001 +XCLAWn MID VIMON VEE_B N028 VCCS_LIM_CLAWn_TLV6001 +R14 VEE_CLP MID R_NOISELESS 1e3 +R15 MID VCC_CLP R_NOISELESS 1e3 +R16 N010 N009 R_NOISELESS 1e-3 +R17 N029 N028 R_NOISELESS 1e-3 +C5 MID N010 1e-15 +C6 N029 MID 1e-15 +R18 VOUT_S N046 R_NOISELESS 100 +C7 VOUT_S MID 1e-9 +G2 MID VCC_CLP N010 MID 1e-3 +G3 MID VEE_CLP N029 MID 1e-3 +XCL_AMP N003 N034 VIMON MID N013 N026 CLAMP_AMP_LO_TLV6001 +V_ISCp N003 MID 13.5 +V_ISCn N034 MID -12.5 +R19 N034 MID R_NOISELESS 1e9 +R20 N026 MID R_NOISELESS 1 +C8 N027 MID 1e-15 +R21 MID N013 R_NOISELESS 1 +R22 MID N003 R_NOISELESS 1e9 +C9 MID N014 1e-15 +XCLAW_AMP VCC_CLP VEE_CLP VOUT_S MID N011 N024 CLAMP_AMP_LO_TLV6001 +R23 VEE_CLP MID R_NOISELESS 1e9 +R24 N024 MID R_NOISELESS 1 +C10 N025 MID 1e-15 +R25 MID N011 R_NOISELESS 1 +R26 MID VCC_CLP R_NOISELESS 1e9 +C11 MID N012 1e-15 +XCL_SRC N014 N027 CL_CLAMP MID VCCS_LIM_4_TLV6001 +XCLAW_SRC N012 N025 CLAW_CLAMP MID VCCS_LIM_3_TLV6001 +R27 N011 N012 R_NOISELESS 1e-3 +R28 N025 N024 R_NOISELESS 1e-3 +R29 N013 N014 R_NOISELESS 1e-3 +R30 N027 N026 R_NOISELESS 1e-3 +R33 VIMON N045 R_NOISELESS 100 +C13 VIMON MID 1e-9 +C_DIFF ESDp ESDn 1e-12 +C_CMn ESDn MID 5e-12 +C_CMp MID ESDp 5e-12 +I_Q VCC VEE 75e-6 +I_B N036 MID 1e-12 +I_OS N044 MID 1e-15 +R34 IN+ ESDp R_NOISELESS 10e-3 +R35 IN- ESDn R_NOISELESS 10e-3 +R36 N030 MID R_NOISELESS 1 +R37 N037 MID R_NOISELESS 1e9 +R38 MID N022 R_NOISELESS 1 +R39 MID N008 R_NOISELESS 1e9 +XGR_AMP N008 N037 N021 MID N022 N030 CLAMP_AMP_HI_TLV6001 +XGR_SRC N023 N031 CLAMP MID VCCS_LIM_GR_TLV6001 +C17 MID N023 1e-15 +C18 N031 MID 1e-15 +V_GRn N037 MID -160 +V_GRp N008 MID 160 +R40 N022 N023 R_NOISELESS 1e-3 +R41 N031 N030 R_NOISELESS 1e-3 +R42 VSENSE N021 R_NOISELESS 1e-3 +C19 MID N021 1e-15 +R43 MID VSENSE R_NOISELESS 1e3 +G5 N032 N033 N002 MID 1e-3 +G8 MID CLAW_CLAMP N047 MID 1e-3 +R45 MID CLAW_CLAMP R_NOISELESS 1e3 +G9 MID CL_CLAMP CLAW_CLAMP MID 1e-3 +R46 MID CL_CLAMP R_NOISELESS 1e3 +R47 N054 VCLP R_NOISELESS 100 +C24 MID VCLP 1e-9 +E4 N054 MID CL_CLAMP MID 1 +R52 MID ESDp R_NOISELESS 1e12 +R53 ESDn MID R_NOISELESS 1e12 +R58 N033 N032 R_NOISELESS 1e3 +R59 N055 N056 R_NOISELESS 1e6 +R60 N056 N057 R_NOISELESS 1e6 +R67 N036 N035 R_NOISELESS 1e3 +G15 MID VSENSE CLAMP MID 1e-3 +V_ORp N020 VCLP 1.8 +V_ORn N015 VCLP -1.8 +E1 MID 0 N056 0 1 +S8 N018 CLAMP CLAMP N018 OR_SW +S9 CLAMP N017 N017 CLAMP OR_SW +Xe_n N038 ESDp VNSE_TLV6001 +Xi_nn ESDn MID FEMT_TLV6001 +Xi_np N038 MID FEMT_TLV6001 +XVCCS_LIMIT_1 N040 N044 MID N041 VCCS_LIM_1_TLV6001 +XVCCS_LIMIT_2 N041 MID MID CLAMP VCCS_LIM_2_TLV6001 +R44 N041 MID R_NOISELESS 1e6 +R68 CLAMP MID R_NOISELESS 1e6 +C20 CLAMP MID 84.3e-9 +G7 MID N047 VSENSE MID 1e-6 +R69 N047 MID R_NOISELESS 1e6 +C25 N047 MID 5.3e-14 +XOL_SENSE_TLV6001 MID N060 N059 N062 OL_SENSE_TLV6001 +R31 N060 MID R_NOISELESS 1 +R51 N060 SW_OL R_NOISELESS 100 +C12 SW_OL MID 1e-12 +H2 N058 MID V11 -1 +H3 N061 MID V12 1 +V11 N017 N016 0 +V12 N018 N019 0 +R77 N058 N059 R_NOISELESS 100 +C28 N059 MID 1e-12 +R78 N061 N062 R_NOISELESS 100 +C29 N062 MID 1e-12 +G14 MID N016 N015 MID 1 +G16 MID N019 N020 MID 1 +R75 N016 MID R_NOISELESS 1 +R76 N019 MID R_NOISELESS 1 +G17 0 VCC_B VCC 0 1 +G18 0 VEE_B VEE 0 1 +R79 VCC_B 0 R_NOISELESS 1 +R80 VEE_B 0 R_NOISELESS 1 +C27 N002 N001 21.22e-12 +R81 N002 MID R_NOISELESS 5.64e3 +R82 N002 N001 R_NOISELESS 1e8 +G_adjust2 MID N001 ESDp MID 1.03 +C14 N006 N007 13.26e-12 +R48 N006 MID R_NOISELESS 2.82e3 +R49 N006 N007 R_NOISELESS 1e8 +G22 MID N007 VCC_B MID 998e-3 +R88 N007 MID R_NOISELESS 1 +C15 N005 N004 13.26e-12 +R54 N005 MID R_NOISELESS 2.82e3 +R55 N005 N004 R_NOISELESS 1e8 +G4 MID N004 VEE_B MID 998e-3 +R56 N004 MID R_NOISELESS 1 +Rx N053 N052 R_NOISELESS 1e6 +Rdummy N053 MID R_NOISELESS 1e5 +G6 MID N048 CL_CLAMP N053 89.3 +Rdc1 N048 MID R_NOISELESS 1 +R32 N048 N049 R_NOISELESS 1e4 +R50 N049 MID R_NOISELESS 2.65e3 +G10 MID N050 N049 MID 4.77 +C16 N049 N048 5.31e-6 +R63 N050 MID R_NOISELESS 1 +R64 N050 N051 R_NOISELESS 1e4 +R65 N051 MID R_NOISELESS 10.01 +C22 N051 N050 159e-15 +R89 N001 MID R_NOISELESS 1 +S2 VCC ESDn ESDn VCC ESD_SW +S3 VCC ESDp ESDp VCC ESD_SW +S4 ESDn VEE VEE ESDn ESD_SW +S5 ESDp VEE VEE ESDp ESD_SW +E2 N046 MID OUT MID 1 +R10 MID N046 R_NOISELESS 1e9 +H1 N045 MID V4 1e3 +R11 MID N045 R_NOISELESS 1e9 +S6 VCC OUT OUT VCC ESD_SW +S7 OUT VEE VEE OUT ESD_SW +S1 N049 N048 SW_OL MID OL_SW +XVCCS_LIM_ZO_TLV6001 N051 MID MID N052 VCCS_LIM_ZO_TLV6001 +R57 N052 MID R_NOISELESS 1 +.ends TLV6001 +* +.SUBCKT VOS_DRIFT_TLV6001 VOS+ VOS- +.PARAM DC = 595.218e-6 +.PARAM POL = 1 +.PARAM DRIFT = 2.00E-06 +E1 VOS+ VOS- VALUE={DC+POL*DRIFT*(TEMP-27)} +.ENDS +* +.subckt CLAMP_AMP_HI_TLV6001 VC+ VC- VIN COM VO+ VO- +.param G=10 +GVo+ COM Vo+ Value = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)} +GVo- COM Vo- Value = {IF(V(VIN,COM)V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)} +GVo- COM Vo- Value = {IF(V(VIN,COM)10e-3 | V(4,1)>10e-3),1,0)} +.ends OL_SENSE_TLV6001 +* +.subckt VCCS_LIM_ZO_TLV6001 VC+ VC- IOUT+ IOUT- +.param Gain = 1e3 +.param Ipos =30e3 +.param Ineg = -30e3 +G1 IOUT+ IOUT- VALUE={LIMIT(Gain*V(VC+,VC-),Ineg,Ipos)} +.ends VCCS_LIM_ZO_TLV6001 +* diff --git a/examples/optran/models/TLV9002.lib b/examples/optran/models/TLV9002.lib new file mode 100644 index 000000000..24b450a31 --- /dev/null +++ b/examples/optran/models/TLV9002.lib @@ -0,0 +1,422 @@ +* TLV9002 - Rev. C +* Created by Paul Goedeke; May 01, 2018 - Revised by GPAMPS Team; 2021-06-10 +* Created with Green-Williams-Lis Op Amp Macro-model Architecture +* Copyright 2018 by Texas Instruments Corporation +****************************************************** +* MACRO-MODEL SIMULATED PARAMETERS: +****************************************************** +* OPEN-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Aol) +* UNITY GAIN BANDWIDTH (GBW) +* INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR) +* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR) +* DIFFERENTIAL INPUT IMPEDANCE (Zid) +* COMMON-MODE INPUT IMPEDANCE (Zic) +* OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo) +* OUTPUT CURRENT THROUGH THE SUPPLY (Iout) +* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en) +* INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in) +* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo) +* SHORT-CIRCUIT OUTPUT CURRENT (Isc) +* QUIESCENT CURRENT (Iq) +* SETTLING TIME VS. CAPACITIVE LOAD (ts) +* SLEW RATE (SR) +* SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD +* LARGE SIGNAL RESPONSE +* OVERLOAD RECOVERY TIME (tor) +* INPUT BIAS CURRENT (Ib) +* INPUT OFFSET CURRENT (Ios) +* INPUT OFFSET VOLTAGE (Vos) +* INPUT COMMON-MODE VOLTAGE RANGE (Vcm) +* INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm) +* INPUT/OUTPUT ESD CELLS (ESDin, ESDout) +****************************************************** +.subckt TLV9002 IN+ IN- VCC VEE OUT +****************************************************** +* MODEL DEFINITIONS: +.model BB_SW VSWITCH(Ron=50 Roff=1e12 Von=700e-3 Voff=0) +.model ESD_SW VSWITCH(Ron=50 Roff=1e12 Von=250e-3 Voff=0) +.model OL_SW VSWITCH(Ron=1e-3 Roff=1e9 Von=900e-3 Voff=800e-3) +.model OR_SW VSWITCH(Ron=10e-3 Roff=1e9 Von=1e-3 Voff=0) +.model R_NOISELESS RES(T_ABS=-273.15) +****************************************************** + + +I_OS ESDn MID 3P +I_B 33 MID 5P +V_GRp 58 MID 180 +V_GRn 59 MID -180 +V_ISCp 52 MID 42 +V_ISCn 53 MID -42 +V_ORn 41 VCLP -1.22 +V11 57 40 0 +V_ORp 39 VCLP 1.22 +V12 56 38 0 +V4 29 OUT 0 +VCM_MIN 79 VEE_B -100M +VCM_MAX 80 VCC_B 100M +I_Q VCC VEE 60U +V_OS 22 33 396.11U +XVOS_VCM 21 22 VCC VEE VOS_SRC_0 +C30 23 24 15.92U +R85 24 MID R_NOISELESS 30K +R84 24 23 R_NOISELESS 10K +R83 23 MID R_NOISELESS 1 +GVCCS10 26 MID 25 MID -1 +C29 27 MID 19.89F +R82 25 27 R_NOISELESS 10K +R81 25 28 R_NOISELESS 70K +R80 28 MID R_NOISELESS 1 +GVCCS9 28 MID 24 MID -3.8 +GVCCS4 23 MID CL_CLAMP 29 -87 +R79 30 MID R_NOISELESS 1 +XU1 31 MID MID 30 VCCS_LIM_ZO_0 +R78 31 MID R_NOISELESS 101 +C22 31 26 15.92F +R65 31 26 R_NOISELESS 10K +R64 26 MID R_NOISELESS 1 +R63 29 30 R_NOISELESS 400K +XCLAWn MID VIMON VEE_B 32 VCCS_LIM_CLAW-_0 +Xe_n ESDp 33 VNSE_0 +Xi_nn ESDn MID FEMT_0_0 +Xi_np MID 33 FEMT_0_0 +S5 VEE ESDp VEE ESDp S_VSWITCH_1 +S4 VEE ESDn VEE ESDn S_VSWITCH_2 +S2 ESDn VCC ESDn VCC S_VSWITCH_3 +S3 ESDp VCC ESDp VCC S_VSWITCH_4 +C28 34 MID 1P +R77 35 34 R_NOISELESS 100 +C27 36 MID 1P +R76 37 36 R_NOISELESS 100 +R75 MID 38 R_NOISELESS 1 +GVCCS8 38 MID 39 MID -1 +R74 40 MID R_NOISELESS 1 +GVCCS7 40 MID 41 MID -1 +C25 42 MID 25F +R69 MID 42 R_NOISELESS 1MEG +GVCCS6 42 MID VSENSE MID -1U +C20 CLAMP MID 151.6N +R68 MID CLAMP R_NOISELESS 1MEG +XVCCS_LIM_2 43 MID MID CLAMP VCCS_LIM_2_0 +R44 MID 43 R_NOISELESS 1MEG +XVCCS_LIM_1 44 45 MID 43 VCCS_LIM_1_0 +Rdummy MID 29 R_NOISELESS 40K +R61 MID 46 R_NOISELESS 273.3609 +C16 46 47 1.1018N +R58 47 46 R_NOISELESS 100MEG +GVCCS2 47 MID VEE_B MID -258.98M +R57 MID 47 R_NOISELESS 1 +R56 MID 48 R_NOISELESS 273.3609 +C15 48 49 1.1018N +R55 49 48 R_NOISELESS 100MEG +GVCCS1 49 MID VCC_B MID -258.98M +R54 MID 49 R_NOISELESS 1 +R49 MID 50 R_NOISELESS 337.4K +C14 50 51 591.7F +R48 51 50 R_NOISELESS 100MEG +G_adjust 51 MID ESDp MID -44.81M +Rsrc MID 51 R_NOISELESS 1 +XIQPos VIMON MID MID VCC VCCS_LIMIT_IQ_0 +XIQNeg MID VIMON VEE MID VCCS_LIMIT_IQ_0 +C_DIFF ESDp ESDn 1P +XCL_AMP 52 53 VIMON MID 54 55 CLAMP_AMP_LO_0 +SOR_SWp CLAMP 56 CLAMP 56 S_VSWITCH_5 +SOR_SWn 57 CLAMP 57 CLAMP S_VSWITCH_6 +XGR_AMP 58 59 60 MID 61 62 CLAMP_AMP_HI_0 +R39 58 MID R_NOISELESS 1T +R37 59 MID R_NOISELESS 1T +R42 VSENSE 60 R_NOISELESS 1M +C19 60 MID 1F +R38 61 MID R_NOISELESS 1 +R36 MID 62 R_NOISELESS 1 +R40 61 63 R_NOISELESS 1M +R41 62 64 R_NOISELESS 1M +C17 63 MID 1F +C18 MID 64 1F +XGR_SRC 63 64 CLAMP MID VCCS_LIM_GR_0 +R21 54 MID R_NOISELESS 1 +R20 MID 55 R_NOISELESS 1 +R29 54 65 R_NOISELESS 1M +R30 55 66 R_NOISELESS 1M +C9 65 MID 1F +C8 MID 66 1F +XCL_SRC 65 66 CL_CLAMP MID VCCS_LIM_4_0 +R22 52 MID R_NOISELESS 1T +R19 MID 53 R_NOISELESS 1T +XCLAWp VIMON MID 67 VCC_B VCCS_LIM_CLAW+_0 +R12 67 VCC_B R_NOISELESS 1K +R16 67 68 R_NOISELESS 1M +R13 VEE_B 32 R_NOISELESS 1K +R17 69 32 R_NOISELESS 1M +C6 69 MID 1F +C5 MID 68 1F +G2 VCC_CLP MID 68 MID -1M +R15 VCC_CLP MID R_NOISELESS 1K +G3 VEE_CLP MID 69 MID -1M +R14 MID VEE_CLP R_NOISELESS 1K +XCLAW_AMP VCC_CLP VEE_CLP VOUT_S MID 70 71 CLAMP_AMP_LO_0 +R26 VCC_CLP MID R_NOISELESS 1T +R23 VEE_CLP MID R_NOISELESS 1T +R25 70 MID R_NOISELESS 1 +R24 MID 71 R_NOISELESS 1 +R27 70 72 R_NOISELESS 1M +R28 71 73 R_NOISELESS 1M +C11 72 MID 1F +C10 MID 73 1F +XCLAW_SRC 72 73 CLAW_CLAMP MID VCCS_LIM_3_0 +H2 37 MID V11 -1 +H3 35 MID V12 1 +C12 SW_OL MID 100P +R32 74 SW_OL R_NOISELESS 100 +R31 74 MID R_NOISELESS 1 +XOL_SENSE MID 74 36 34 OL_SENSE_0 +S1 23 24 SW_OL MID S_VSWITCH_7 +H1 75 MID V4 1K +S7 VEE OUT VEE OUT S_VSWITCH_8 +S6 OUT VCC OUT VCC S_VSWITCH_9 +R11 MID 76 R_NOISELESS 1T +R18 76 VOUT_S R_NOISELESS 100 +C7 VOUT_S MID 1P +E5 76 MID OUT MID 1 +C13 VIMON MID 1N +R33 75 VIMON R_NOISELESS 100 +R10 MID 75 R_NOISELESS 1T +R47 77 VCLP R_NOISELESS 100 +C24 VCLP MID 100P +E4 77 MID CL_CLAMP MID 1 +R46 MID CL_CLAMP R_NOISELESS 1K +G9 CL_CLAMP MID CLAW_CLAMP MID -1M +R45 MID CLAW_CLAMP R_NOISELESS 1K +G8 CLAW_CLAMP MID 42 MID -1M +R43 MID VSENSE R_NOISELESS 1K +G15 VSENSE MID CLAMP MID -1M +C4 44 MID 1F +R9 44 78 R_NOISELESS 1M +R7 MID 79 R_NOISELESS 1T +R6 80 MID R_NOISELESS 1T +R8 MID 78 R_NOISELESS 1 +XVCM_CLAMP 81 MID 78 MID 80 79 VCCS_EXT_LIM_0 +E1 MID 0 82 0 1 +R89 VEE_B 0 R_NOISELESS 1 +R5 83 VEE_B R_NOISELESS 1M +C3 83 0 1F +R60 82 83 R_NOISELESS 1MEG +C1 82 0 100e-9 +R3 82 0 R_NOISELESS 1T +R59 84 82 R_NOISELESS 1MEG +C2 84 0 1F +R4 VCC_B 84 R_NOISELESS 1M +R88 VCC_B 0 R_NOISELESS 1 +G17 VEE_B 0 VEE 0 -1 +G16 VCC_B 0 VCC 0 -1 +R_PSR 85 81 R_NOISELESS 1K +G_PSR 81 85 48 46 -1M +R2 45 ESDn R_NOISELESS 1M +R1 85 86 R_NOISELESS 1M +R_CMR 21 86 R_NOISELESS 1K +G_CMR 86 21 50 MID -1M +C_CMn ESDn MID 5P +C_CMp MID ESDp 5P +R53 ESDn MID R_NOISELESS 1T +R52 MID ESDp R_NOISELESS 1T +R35 IN- ESDn R_NOISELESS 10M +R34 IN+ ESDp R_NOISELESS 10M + +.MODEL S_VSWITCH_1 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) +.MODEL S_VSWITCH_2 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) +.MODEL S_VSWITCH_3 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) +.MODEL S_VSWITCH_4 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) +.MODEL S_VSWITCH_5 VSWITCH (RON=10M ROFF=1T VON=10M VOFF=0) +.MODEL S_VSWITCH_6 VSWITCH (RON=10M ROFF=1T VON=10M VOFF=0) +.MODEL S_VSWITCH_7 VSWITCH (RON=1M ROFF=1T VON=500M VOFF=100M) +.MODEL S_VSWITCH_8 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) +.MODEL S_VSWITCH_9 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=100M) + +.ENDS TLV9002 +* +.SUBCKT VOS_SRC_0 V+ V- REF+ REF- +E1 V+ 1 TABLE {(V(REF+, V-))} = ++(0, 0.8E-3) ++(1, 0.8E-3) ++(1.3, 0) ++(5.5, 0) +E2 1 V- TABLE {(V(V-, REF-))}= ++(-0.7, -2E-4) ++(-0.5, -2E-4) ++(-0.4, 0) ++(5.5, 0) +.ENDS VOS_SRC_0 +* + + +.SUBCKT VCCS_LIM_ZO_0 VC+ VC- IOUT+ IOUT- +.PARAM GAIN = 100 +.PARAM IPOS = 35E3 +.PARAM INEG = -35E3 +G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)} +.ENDS +* + + +.SUBCKT VCCS_LIM_CLAW-_0 VC+ VC- IOUT+ IOUT- +G1 IOUT+ IOUT- TABLE {ABS(V(VC+,VC-))} = ++(00.0000, 0.00001) ++(14.0000, 0.000379) ++(28.0000, 0.000877) ++(37.3333, 0.001382) ++(37.8000, 0.00142) ++(38.7333, 0.001493) ++(39.6667, 0.001583) ++(40.6000, 0.001703) ++(41.5333, 0.00191) ++(42.0000, 0.00204) +.ENDS VCCS_LIM_CLAW-_0 +* + + +.SUBCKT VNSE_0 1 2 +.PARAM FLW=10 +.PARAM NLF=115 +.PARAM NVR=27 +.PARAM GLF={PWR(FLW,0.25)*NLF/1164} +.PARAM RNV={1.184*PWR(NVR,2)} +.MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16 +I1 0 7 10E-3 +I2 0 8 10E-3 +D1 7 0 DVN +D2 8 0 DVN +E1 3 6 7 8 {GLF} +R1 3 0 1E9 +R2 3 0 1E9 +R3 3 6 1E9 +E2 6 4 5 0 10 +R4 5 0 {RNV} +R5 5 0 {RNV} +R6 3 4 1E9 +R7 4 0 1E9 +E3 1 2 3 4 1 +.ENDS +* + + +.SUBCKT FEMT_0_0 1 2 +.PARAM FLWF=0.001 +.PARAM NLFF=23 +.PARAM NVRF=23 +.PARAM GLFF={PWR(FLWF,0.25)*NLFF/1164} +.PARAM RNVF={1.184*PWR(NVRF,2)} +.MODEL DVNF D KF={PWR(FLWF,0.5)/1E11} IS=1.0E-16 +I1 0 7 10E-3 +I2 0 8 10E-3 +D1 7 0 DVNF +D2 8 0 DVNF +E1 3 6 7 8 {GLFF} +R1 3 0 1E9 +R2 3 0 1E9 +R3 3 6 1E9 +E2 6 4 5 0 10 +R4 5 0 {RNVF} +R5 5 0 {RNVF} +R6 3 4 1E9 +R7 4 0 1E9 +G1 1 2 3 4 1E-6 +.ENDS +* + + +.SUBCKT VCCS_LIM_2_0 VC+ VC- IOUT+ IOUT- +.PARAM GAIN = 11.15E-3 +.PARAM IPOS = 0.352 +.PARAM INEG = -0.352 +G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)} +.ENDS +* + + +.SUBCKT VCCS_LIM_1_0 VC+ VC- IOUT+ IOUT- +.PARAM GAIN = 1E-4 +.PARAM IPOS = .5 +.PARAM INEG = -.5 +G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)} +.ENDS +* + + +.SUBCKT VCCS_LIMIT_IQ_0 VC+ VC- IOUT+ IOUT- +.PARAM GAIN = 1E-3 +G1 IOUT- IOUT+ VALUE={IF( (V(VC+,VC-)<=0),0,GAIN*V(VC+,VC-) )} +.ENDS +* + + +.SUBCKT CLAMP_AMP_LO_0 VC+ VC- VIN COM VO+ VO- +.PARAM G=1 +GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)} +GVO- COM VO- VALUE = {IF(V(VIN,COM)V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)} +GVO- COM VO- VALUE = {IF(V(VIN,COM)10E-3 | V(OLP,COM)>10E-3),1,0)} +.ENDS +* + + +.SUBCKT VCCS_EXT_LIM_0 VIN+ VIN- IOUT- IOUT+ VP+ VP- +.PARAM GAIN = 1 +G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))} +.ENDS +* + +