diff --git a/src/spicelib/devices/bsim3v1s/Makefile.am b/src/spicelib/devices/bsim3v1s/Makefile.am new file mode 100644 index 000000000..2b64574f7 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/Makefile.am @@ -0,0 +1,34 @@ +## Process this file with automake to produce Makefile.in + +noinst_LIBRARIES = libbsim3v1s.a + +libbsim3v1s_a_SOURCES = \ + b3v1s.c \ + b3v1sacld.c \ + b3v1sask.c \ + b3v1scheck.c \ + b3v1scvtest.c \ + b3v1sdel.c \ + b3v1sdest.c \ + b3v1sgetic.c \ + b3v1sld.c \ + b3v1smask.c \ + b3v1smdel.c \ + b3v1smpar.c \ + b3v1snoi.c \ + b3v1spar.c \ + b3v1spzld.c \ + b3v1sset.c \ + b3v1stemp.c \ + b3v1strunc.c \ + bsim3v1sdef.h \ + bsim3v1sext.h \ + bsim3v1sinit.c \ + bsim3v1sinit.h \ + bsim3v1sitf.h + + + +INCLUDES = -I$(top_srcdir)/src/include + +MAINTAINERCLEANFILES = Makefile.in diff --git a/src/spicelib/devices/bsim3v1s/b3v1s.c b/src/spicelib/devices/bsim3v1s/b3v1s.c new file mode 100644 index 000000000..1d1d81311 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1s.c @@ -0,0 +1,444 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1s.c +**********/ + +#include "ngspice.h" +#include "devdefs.h" +#include "bsim3v1sdef.h" +#include "suffix.h" + +IFparm BSIM3v1SpTable[] = { /* parameters */ +IOP( "l", BSIM3v1S_L, IF_REAL , "Length"), +IOP( "w", BSIM3v1S_W, IF_REAL , "Width"), +IOP( "ad", BSIM3v1S_AD, IF_REAL , "Drain area"), +IOP( "as", BSIM3v1S_AS, IF_REAL , "Source area"), +IOP( "pd", BSIM3v1S_PD, IF_REAL , "Drain perimeter"), +IOP( "ps", BSIM3v1S_PS, IF_REAL , "Source perimeter"), +IOP( "nrd", BSIM3v1S_NRD, IF_REAL , "Number of squares in drain"), +IOP( "nrs", BSIM3v1S_NRS, IF_REAL , "Number of squares in source"), +IOP( "off", BSIM3v1S_OFF, IF_FLAG , "Device is initially off"), +IOP( "nqsmod", BSIM3v1S_NQSMOD, IF_INTEGER, "Non-quasi-static model selector"), +IP( "ic", BSIM3v1S_IC, IF_REALVEC , "Vector of DS,GS,BS initial voltages"), +OP( "gmbs", BSIM3v1S_GMBS, IF_REAL, "Gmb"), +OP( "gm", BSIM3v1S_GM, IF_REAL, "Gm"), +OP( "gds", BSIM3v1S_GDS, IF_REAL, "Gds"), +OP( "vdsat", BSIM3v1S_VDSAT, IF_REAL, "Vdsat"), +OP( "vth", BSIM3v1S_VON, IF_REAL, "Vth"), +OP( "id", BSIM3v1S_CD, IF_REAL, "Ids"), +OP( "vbs", BSIM3v1S_VBS, IF_REAL, "Vbs"), +OP( "vgs", BSIM3v1S_VGS, IF_REAL, "Vgs"), +OP( "vds", BSIM3v1S_VDS, IF_REAL, "Vds"), +/* serban */ +IOP( "m", BSIM3v1S_M, IF_REAL , "Multiplication factor"), +}; + +IFparm BSIM3v1SmPTable[] = { /* model parameters */ +IOP( "capmod", BSIM3v1S_MOD_CAPMOD, IF_INTEGER, "Capacitance model selector"), +IOP( "nqsmod", BSIM3v1S_MOD_NQSMOD, IF_INTEGER, "Non-quasi-static model selector"), +IOP( "mobmod", BSIM3v1S_MOD_MOBMOD, IF_INTEGER, "Mobility model selector"), +IOP( "noimod", BSIM3v1S_MOD_NOIMOD, IF_INTEGER, "Noise model selector"), +IOP( "paramchk", BSIM3v1S_MOD_PARAMCHK, IF_INTEGER, "Model parameter checking selector"), +IOP( "binunit", BSIM3v1S_MOD_BINUNIT, IF_INTEGER, "Bin unit selector"), +IOP( "version", BSIM3v1S_MOD_VERSION, IF_REAL, " parameter for model version"), +IOP( "tox", BSIM3v1S_MOD_TOX, IF_REAL, "Gate oxide thickness in meters"), + +IOP( "cdsc", BSIM3v1S_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"), +IOP( "cdscb", BSIM3v1S_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"), +IOP( "cdscd", BSIM3v1S_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"), +IOP( "cit", BSIM3v1S_MOD_CIT, IF_REAL, "Interface state capacitance"), +IOP( "nfactor", BSIM3v1S_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"), +IOP( "xj", BSIM3v1S_MOD_XJ, IF_REAL, "Junction depth in meters"), +IOP( "vsat", BSIM3v1S_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"), +IOP( "at", BSIM3v1S_MOD_AT, IF_REAL, "Temperature coefficient of vsat"), +IOP( "a0", BSIM3v1S_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."), +IOP( "ags", BSIM3v1S_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."), +IOP( "a1", BSIM3v1S_MOD_A1, IF_REAL, "Non-saturation effect coefficient"), +IOP( "a2", BSIM3v1S_MOD_A2, IF_REAL, "Non-saturation effect coefficient"), +IOP( "keta", BSIM3v1S_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."), +IOP( "nsub", BSIM3v1S_MOD_NSUB, IF_REAL, "Substrate doping concentration"), +IOP( "nch", BSIM3v1S_MOD_NPEAK, IF_REAL, "Channel doping concentration"), +IOP( "ngate", BSIM3v1S_MOD_NGATE, IF_REAL, "Poly-gate doping concentration"), +IOP( "gamma1", BSIM3v1S_MOD_GAMMA1, IF_REAL, "Vth body coefficient"), +IOP( "gamma2", BSIM3v1S_MOD_GAMMA2, IF_REAL, "Vth body coefficient"), +IOP( "vbx", BSIM3v1S_MOD_VBX, IF_REAL, "Vth transition body Voltage"), +IOP( "vbm", BSIM3v1S_MOD_VBM, IF_REAL, "Maximum body voltage"), + +IOP( "xt", BSIM3v1S_MOD_XT, IF_REAL, "Doping depth"), +IOP( "k1", BSIM3v1S_MOD_K1, IF_REAL, "Bulk effect coefficient 1"), +IOP( "kt1", BSIM3v1S_MOD_KT1, IF_REAL, "Temperature coefficient of Vth"), +IOP( "kt1l", BSIM3v1S_MOD_KT1L, IF_REAL, "Temperature coefficient of Vth"), +IOP( "kt2", BSIM3v1S_MOD_KT2, IF_REAL, "Body-coefficient of kt1"), +IOP( "k2", BSIM3v1S_MOD_K2, IF_REAL, "Bulk effect coefficient 2"), +IOP( "k3", BSIM3v1S_MOD_K3, IF_REAL, "Narrow width effect coefficient"), +IOP( "k3b", BSIM3v1S_MOD_K3B, IF_REAL, "Body effect coefficient of k3"), +IOP( "w0", BSIM3v1S_MOD_W0, IF_REAL, "Narrow width effect parameter"), +IOP( "nlx", BSIM3v1S_MOD_NLX, IF_REAL, "Lateral non-uniform doping effect"), +IOP( "dvt0", BSIM3v1S_MOD_DVT0, IF_REAL, "Short channel effect coeff. 0"), +IOP( "dvt1", BSIM3v1S_MOD_DVT1, IF_REAL, "Short channel effect coeff. 1"), +IOP( "dvt2", BSIM3v1S_MOD_DVT2, IF_REAL, "Short channel effect coeff. 2"), +IOP( "dvt0w", BSIM3v1S_MOD_DVT0W, IF_REAL, "Narrow Width coeff. 0"), +IOP( "dvt1w", BSIM3v1S_MOD_DVT1W, IF_REAL, "Narrow Width effect coeff. 1"), +IOP( "dvt2w", BSIM3v1S_MOD_DVT2W, IF_REAL, "Narrow Width effect coeff. 2"), +IOP( "drout", BSIM3v1S_MOD_DROUT, IF_REAL, "DIBL coefficient of output resistance"), +IOP( "dsub", BSIM3v1S_MOD_DSUB, IF_REAL, "DIBL coefficient in the subthreshold region"), +IOP( "vth0", BSIM3v1S_MOD_VTH0, IF_REAL,"Threshold voltage"), +IOP( "vtho", BSIM3v1S_MOD_VTH0, IF_REAL,"Threshold voltage"), +IOP( "ua", BSIM3v1S_MOD_UA, IF_REAL, "Linear gate dependence of mobility"), +IOP( "ua1", BSIM3v1S_MOD_UA1, IF_REAL, "Temperature coefficient of ua"), +IOP( "ub", BSIM3v1S_MOD_UB, IF_REAL, "Quadratic gate dependence of mobility"), +IOP( "ub1", BSIM3v1S_MOD_UB1, IF_REAL, "Temperature coefficient of ub"), +IOP( "uc", BSIM3v1S_MOD_UC, IF_REAL, "Body-bias dependence of mobility"), +IOP( "uc1", BSIM3v1S_MOD_UC1, IF_REAL, "Temperature coefficient of uc"), +IOP( "u0", BSIM3v1S_MOD_U0, IF_REAL, "Low-field mobility at Tnom"), +IOP( "ute", BSIM3v1S_MOD_UTE, IF_REAL, "Temperature coefficient of mobility"), +IOP( "voff", BSIM3v1S_MOD_VOFF, IF_REAL, "Threshold voltage offset"), +IOP( "tnom", BSIM3v1S_MOD_TNOM, IF_REAL, "Parameter measurement temperature"), +IOP( "cgso", BSIM3v1S_MOD_CGSO, IF_REAL, "Gate-source overlap capacitance per width"), +IOP( "cgdo", BSIM3v1S_MOD_CGDO, IF_REAL, "Gate-drain overlap capacitance per width"), +IOP( "cgbo", BSIM3v1S_MOD_CGBO, IF_REAL, "Gate-bulk overlap capacitance per length"), +IOP( "xpart", BSIM3v1S_MOD_XPART, IF_REAL, "Channel charge partitioning"), +IOP( "elm", BSIM3v1S_MOD_ELM, IF_REAL, "Non-quasi-static Elmore Constant Parameter"), +IOP( "delta", BSIM3v1S_MOD_DELTA, IF_REAL, "Effective Vds parameter"), +IOP( "rsh", BSIM3v1S_MOD_RSH, IF_REAL, "Source-drain sheet resistance"), +IOP( "rdsw", BSIM3v1S_MOD_RDSW, IF_REAL, "Source-drain resistance per width"), + +IOP( "prwg", BSIM3v1S_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "), +IOP( "prwb", BSIM3v1S_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "), + +IOP( "prt", BSIM3v1S_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "), +IOP( "eta0", BSIM3v1S_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"), +IOP( "etab", BSIM3v1S_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"), +IOP( "pclm", BSIM3v1S_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"), +IOP( "pdiblc1", BSIM3v1S_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblc2", BSIM3v1S_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"), +IOP( "pdiblcb", BSIM3v1S_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"), +IOP( "pscbe1", BSIM3v1S_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pscbe2", BSIM3v1S_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"), +IOP( "pvag", BSIM3v1S_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"), +IOP( "js", BSIM3v1S_MOD_JS, IF_REAL, "Source/drain junction reverse saturation current density"), +IOP( "jsw", BSIM3v1S_MOD_JSW, IF_REAL, "Sidewall junction reverse saturation current density"), +IOP( "pb", BSIM3v1S_MOD_PB, IF_REAL, "Source/drain junction built-in potential"), +IOP( "nj", BSIM3v1S_MOD_NJ, IF_REAL, "Source/drain junction emission coefficient"), +IOP( "xti", BSIM3v1S_MOD_XTI, IF_REAL, "Junction current temperature exponent"), +IOP( "mj", BSIM3v1S_MOD_MJ, IF_REAL, "Source/drain bottom junction capacitance grading coefficient"), +IOP( "pbsw", BSIM3v1S_MOD_PBSW, IF_REAL, "Source/drain sidewall junction capacitance built in potential"), +IOP( "mjsw", BSIM3v1S_MOD_MJSW, IF_REAL, "Source/drain sidewall junction capacitance grading coefficient"), +IOP( "pbswg", BSIM3v1S_MOD_PBSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance built in potential"), +IOP( "mjswg", BSIM3v1S_MOD_MJSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance grading coefficient"), +IOP( "cj", BSIM3v1S_MOD_CJ, IF_REAL, "Source/drain bottom junction capacitance per unit area"), +IOP( "vfbcv", BSIM3v1S_MOD_VFBCV, IF_REAL, "Flat Band Voltage parameter for capmod=0 only"), +IOP( "cjsw", BSIM3v1S_MOD_CJSW, IF_REAL, "Source/drain sidewall junction capacitance per unit periphery"), + +IOP( "cjswg", BSIM3v1S_MOD_CJSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance per unit width"), +IOP( "lint", BSIM3v1S_MOD_LINT, IF_REAL, "Length reduction parameter"), +IOP( "ll", BSIM3v1S_MOD_LL, IF_REAL, "Length reduction parameter"), +IOP( "lln", BSIM3v1S_MOD_LLN, IF_REAL, "Length reduction parameter"), +IOP( "lw", BSIM3v1S_MOD_LW, IF_REAL, "Length reduction parameter"), +IOP( "lwn", BSIM3v1S_MOD_LWN, IF_REAL, "Length reduction parameter"), +IOP( "lwl", BSIM3v1S_MOD_LWL, IF_REAL, "Length reduction parameter"), +IOP( "lmin", BSIM3v1S_MOD_LMIN, IF_REAL, "Minimum length for the model"), +IOP( "lmax", BSIM3v1S_MOD_LMAX, IF_REAL, "Maximum length for the model"), + +IOP( "wr", BSIM3v1S_MOD_WR, IF_REAL, "Width dependence of rds"), +IOP( "wint", BSIM3v1S_MOD_WINT, IF_REAL, "Width reduction parameter"), +IOP( "dwg", BSIM3v1S_MOD_DWG, IF_REAL, "Width reduction parameter"), +IOP( "dwb", BSIM3v1S_MOD_DWB, IF_REAL, "Width reduction parameter"), + +IOP( "wl", BSIM3v1S_MOD_WL, IF_REAL, "Width reduction parameter"), +IOP( "wln", BSIM3v1S_MOD_WLN, IF_REAL, "Width reduction parameter"), +IOP( "ww", BSIM3v1S_MOD_WW, IF_REAL, "Width reduction parameter"), +IOP( "wwn", BSIM3v1S_MOD_WWN, IF_REAL, "Width reduction parameter"), +IOP( "wwl", BSIM3v1S_MOD_WWL, IF_REAL, "Width reduction parameter"), +IOP( "wmin", BSIM3v1S_MOD_WMIN, IF_REAL, "Minimum width for the model"), +IOP( "wmax", BSIM3v1S_MOD_WMAX, IF_REAL, "Maximum width for the model"), + +IOP( "b0", BSIM3v1S_MOD_B0, IF_REAL, "Abulk narrow width parameter"), +IOP( "b1", BSIM3v1S_MOD_B1, IF_REAL, "Abulk narrow width parameter"), + +IOP( "cgsl", BSIM3v1S_MOD_CGSL, IF_REAL, "New C-V model parameter"), +IOP( "cgdl", BSIM3v1S_MOD_CGDL, IF_REAL, "New C-V model parameter"), +IOP( "ckappa", BSIM3v1S_MOD_CKAPPA, IF_REAL, "New C-V model parameter"), +IOP( "cf", BSIM3v1S_MOD_CF, IF_REAL, "Fringe capacitance parameter"), +IOP( "clc", BSIM3v1S_MOD_CLC, IF_REAL, "Vdsat parameter for C-V model"), +IOP( "cle", BSIM3v1S_MOD_CLE, IF_REAL, "Vdsat parameter for C-V model"), +IOP( "dwc", BSIM3v1S_MOD_DWC, IF_REAL, "Delta W for C-V model"), +IOP( "dlc", BSIM3v1S_MOD_DLC, IF_REAL, "Delta L for C-V model"), + +IOP( "alpha0", BSIM3v1S_MOD_ALPHA0, IF_REAL, "substrate current model parameter"), +IOP( "beta0", BSIM3v1S_MOD_BETA0, IF_REAL, "substrate current model parameter"), + +IOP( "lcdsc", BSIM3v1S_MOD_LCDSC, IF_REAL, "Length dependence of cdsc"), +IOP( "lcdscb", BSIM3v1S_MOD_LCDSCB, IF_REAL, "Length dependence of cdscb"), +IOP( "lcdscd", BSIM3v1S_MOD_LCDSCD, IF_REAL, "Length dependence of cdscd"), +IOP( "lcit", BSIM3v1S_MOD_LCIT, IF_REAL, "Length dependence of cit"), +IOP( "lnfactor", BSIM3v1S_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor"), +IOP( "lxj", BSIM3v1S_MOD_LXJ, IF_REAL, "Length dependence of xj"), +IOP( "lvsat", BSIM3v1S_MOD_LVSAT, IF_REAL, "Length dependence of vsat"), +IOP( "lat", BSIM3v1S_MOD_LAT, IF_REAL, "Length dependence of at"), +IOP( "la0", BSIM3v1S_MOD_LA0, IF_REAL, "Length dependence of a0"), +IOP( "lags", BSIM3v1S_MOD_LAGS, IF_REAL, "Length dependence of ags"), +IOP( "la1", BSIM3v1S_MOD_LA1, IF_REAL, "Length dependence of a1"), +IOP( "la2", BSIM3v1S_MOD_LA2, IF_REAL, "Length dependence of a2"), +IOP( "lketa", BSIM3v1S_MOD_LKETA, IF_REAL, "Length dependence of keta"), +IOP( "lnsub", BSIM3v1S_MOD_LNSUB, IF_REAL, "Length dependence of nsub"), +IOP( "lnch", BSIM3v1S_MOD_LNPEAK, IF_REAL, "Length dependence of nch"), +IOP( "lngate", BSIM3v1S_MOD_LNGATE, IF_REAL, "Length dependence of ngate"), +IOP( "lgamma1", BSIM3v1S_MOD_LGAMMA1, IF_REAL, "Length dependence of gamma1"), +IOP( "lgamma2", BSIM3v1S_MOD_LGAMMA2, IF_REAL, "Length dependence of gamma2"), +IOP( "lvbx", BSIM3v1S_MOD_LVBX, IF_REAL, "Length dependence of vbx"), +IOP( "lvbm", BSIM3v1S_MOD_LVBM, IF_REAL, "Length dependence of vbm"), +IOP( "lxt", BSIM3v1S_MOD_LXT, IF_REAL, "Length dependence of xt"), +IOP( "lk1", BSIM3v1S_MOD_LK1, IF_REAL, "Length dependence of k1"), +IOP( "lkt1", BSIM3v1S_MOD_LKT1, IF_REAL, "Length dependence of kt1"), +IOP( "lkt1l", BSIM3v1S_MOD_LKT1L, IF_REAL, "Length dependence of kt1l"), +IOP( "lkt2", BSIM3v1S_MOD_LKT2, IF_REAL, "Length dependence of kt2"), +IOP( "lk2", BSIM3v1S_MOD_LK2, IF_REAL, "Length dependence of k2"), +IOP( "lk3", BSIM3v1S_MOD_LK3, IF_REAL, "Length dependence of k3"), +IOP( "lk3b", BSIM3v1S_MOD_LK3B, IF_REAL, "Length dependence of k3b"), +IOP( "lw0", BSIM3v1S_MOD_LW0, IF_REAL, "Length dependence of w0"), +IOP( "lnlx", BSIM3v1S_MOD_LNLX, IF_REAL, "Length dependence of nlx"), +IOP( "ldvt0", BSIM3v1S_MOD_LDVT0, IF_REAL, "Length dependence of dvt0"), +IOP( "ldvt1", BSIM3v1S_MOD_LDVT1, IF_REAL, "Length dependence of dvt1"), +IOP( "ldvt2", BSIM3v1S_MOD_LDVT2, IF_REAL, "Length dependence of dvt2"), +IOP( "ldvt0w", BSIM3v1S_MOD_LDVT0W, IF_REAL, "Length dependence of dvt0w"), +IOP( "ldvt1w", BSIM3v1S_MOD_LDVT1W, IF_REAL, "Length dependence of dvt1w"), +IOP( "ldvt2w", BSIM3v1S_MOD_LDVT2W, IF_REAL, "Length dependence of dvt2w"), +IOP( "ldrout", BSIM3v1S_MOD_LDROUT, IF_REAL, "Length dependence of drout"), +IOP( "ldsub", BSIM3v1S_MOD_LDSUB, IF_REAL, "Length dependence of dsub"), +IOP( "lvth0", BSIM3v1S_MOD_LVTH0, IF_REAL,"Length dependence of vto"), +IOP( "lvtho", BSIM3v1S_MOD_LVTH0, IF_REAL,"Length dependence of vto"), +IOP( "lua", BSIM3v1S_MOD_LUA, IF_REAL, "Length dependence of ua"), +IOP( "lua1", BSIM3v1S_MOD_LUA1, IF_REAL, "Length dependence of ua1"), +IOP( "lub", BSIM3v1S_MOD_LUB, IF_REAL, "Length dependence of ub"), +IOP( "lub1", BSIM3v1S_MOD_LUB1, IF_REAL, "Length dependence of ub1"), +IOP( "luc", BSIM3v1S_MOD_LUC, IF_REAL, "Length dependence of uc"), +IOP( "luc1", BSIM3v1S_MOD_LUC1, IF_REAL, "Length dependence of uc1"), +IOP( "lu0", BSIM3v1S_MOD_LU0, IF_REAL, "Length dependence of u0"), +IOP( "lute", BSIM3v1S_MOD_LUTE, IF_REAL, "Length dependence of ute"), +IOP( "lvoff", BSIM3v1S_MOD_LVOFF, IF_REAL, "Length dependence of voff"), +IOP( "lelm", BSIM3v1S_MOD_LELM, IF_REAL, "Length dependence of elm"), +IOP( "ldelta", BSIM3v1S_MOD_LDELTA, IF_REAL, "Length dependence of delta"), +IOP( "lrdsw", BSIM3v1S_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "), + +IOP( "lprwg", BSIM3v1S_MOD_LPRWG, IF_REAL, "Length dependence of prwg "), +IOP( "lprwb", BSIM3v1S_MOD_LPRWB, IF_REAL, "Length dependence of prwb "), + +IOP( "lprt", BSIM3v1S_MOD_LPRT, IF_REAL, "Length dependence of prt "), +IOP( "leta0", BSIM3v1S_MOD_LETA0, IF_REAL, "Length dependence of eta0"), +IOP( "letab", BSIM3v1S_MOD_LETAB, IF_REAL, "Length dependence of etab"), +IOP( "lpclm", BSIM3v1S_MOD_LPCLM, IF_REAL, "Length dependence of pclm"), +IOP( "lpdiblc1", BSIM3v1S_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"), +IOP( "lpdiblc2", BSIM3v1S_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"), +IOP( "lpdiblcb", BSIM3v1S_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"), +IOP( "lpscbe1", BSIM3v1S_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"), +IOP( "lpscbe2", BSIM3v1S_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"), +IOP( "lpvag", BSIM3v1S_MOD_LPVAG, IF_REAL, "Length dependence of pvag"), +IOP( "lwr", BSIM3v1S_MOD_LWR, IF_REAL, "Length dependence of wr"), +IOP( "ldwg", BSIM3v1S_MOD_LDWG, IF_REAL, "Length dependence of dwg"), +IOP( "ldwb", BSIM3v1S_MOD_LDWB, IF_REAL, "Length dependence of dwb"), +IOP( "lb0", BSIM3v1S_MOD_LB0, IF_REAL, "Length dependence of b0"), +IOP( "lb1", BSIM3v1S_MOD_LB1, IF_REAL, "Length dependence of b1"), +IOP( "lcgsl", BSIM3v1S_MOD_LCGSL, IF_REAL, "Length dependence of cgsl"), +IOP( "lcgdl", BSIM3v1S_MOD_LCGDL, IF_REAL, "Length dependence of cgdl"), +IOP( "lckappa", BSIM3v1S_MOD_LCKAPPA, IF_REAL, "Length dependence of ckappa"), +IOP( "lcf", BSIM3v1S_MOD_LCF, IF_REAL, "Length dependence of cf"), +IOP( "lclc", BSIM3v1S_MOD_LCLC, IF_REAL, "Length dependence of clc"), +IOP( "lcle", BSIM3v1S_MOD_LCLE, IF_REAL, "Length dependence of cle"), +IOP( "lalpha0", BSIM3v1S_MOD_LALPHA0, IF_REAL, "Length dependence of alpha0"), +IOP( "lbeta0", BSIM3v1S_MOD_LBETA0, IF_REAL, "Length dependence of beta0"), +IOP( "lvfbcv", BSIM3v1S_MOD_LVFBCV, IF_REAL, "Length dependence of vfbcv"), +IOP( "wcdsc", BSIM3v1S_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"), +IOP( "wcdscb", BSIM3v1S_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"), +IOP( "wcdscd", BSIM3v1S_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"), +IOP( "wcit", BSIM3v1S_MOD_WCIT, IF_REAL, "Width dependence of cit"), +IOP( "wnfactor", BSIM3v1S_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"), +IOP( "wxj", BSIM3v1S_MOD_WXJ, IF_REAL, "Width dependence of xj"), +IOP( "wvsat", BSIM3v1S_MOD_WVSAT, IF_REAL, "Width dependence of vsat"), +IOP( "wat", BSIM3v1S_MOD_WAT, IF_REAL, "Width dependence of at"), +IOP( "wa0", BSIM3v1S_MOD_WA0, IF_REAL, "Width dependence of a0"), +IOP( "wags", BSIM3v1S_MOD_WAGS, IF_REAL, "Width dependence of ags"), +IOP( "wa1", BSIM3v1S_MOD_WA1, IF_REAL, "Width dependence of a1"), +IOP( "wa2", BSIM3v1S_MOD_WA2, IF_REAL, "Width dependence of a2"), +IOP( "wketa", BSIM3v1S_MOD_WKETA, IF_REAL, "Width dependence of keta"), +IOP( "wnsub", BSIM3v1S_MOD_WNSUB, IF_REAL, "Width dependence of nsub"), +IOP( "wnch", BSIM3v1S_MOD_WNPEAK, IF_REAL, "Width dependence of nch"), +IOP( "wngate", BSIM3v1S_MOD_WNGATE, IF_REAL, "Width dependence of ngate"), +IOP( "wgamma1", BSIM3v1S_MOD_WGAMMA1, IF_REAL, "Width dependence of gamma1"), +IOP( "wgamma2", BSIM3v1S_MOD_WGAMMA2, IF_REAL, "Width dependence of gamma2"), +IOP( "wvbx", BSIM3v1S_MOD_WVBX, IF_REAL, "Width dependence of vbx"), +IOP( "wvbm", BSIM3v1S_MOD_WVBM, IF_REAL, "Width dependence of vbm"), +IOP( "wxt", BSIM3v1S_MOD_WXT, IF_REAL, "Width dependence of xt"), +IOP( "wk1", BSIM3v1S_MOD_WK1, IF_REAL, "Width dependence of k1"), +IOP( "wkt1", BSIM3v1S_MOD_WKT1, IF_REAL, "Width dependence of kt1"), +IOP( "wkt1l", BSIM3v1S_MOD_WKT1L, IF_REAL, "Width dependence of kt1l"), +IOP( "wkt2", BSIM3v1S_MOD_WKT2, IF_REAL, "Width dependence of kt2"), +IOP( "wk2", BSIM3v1S_MOD_WK2, IF_REAL, "Width dependence of k2"), +IOP( "wk3", BSIM3v1S_MOD_WK3, IF_REAL, "Width dependence of k3"), +IOP( "wk3b", BSIM3v1S_MOD_WK3B, IF_REAL, "Width dependence of k3b"), +IOP( "ww0", BSIM3v1S_MOD_WW0, IF_REAL, "Width dependence of w0"), +IOP( "wnlx", BSIM3v1S_MOD_WNLX, IF_REAL, "Width dependence of nlx"), +IOP( "wdvt0", BSIM3v1S_MOD_WDVT0, IF_REAL, "Width dependence of dvt0"), +IOP( "wdvt1", BSIM3v1S_MOD_WDVT1, IF_REAL, "Width dependence of dvt1"), +IOP( "wdvt2", BSIM3v1S_MOD_WDVT2, IF_REAL, "Width dependence of dvt2"), +IOP( "wdvt0w", BSIM3v1S_MOD_WDVT0W, IF_REAL, "Width dependence of dvt0w"), +IOP( "wdvt1w", BSIM3v1S_MOD_WDVT1W, IF_REAL, "Width dependence of dvt1w"), +IOP( "wdvt2w", BSIM3v1S_MOD_WDVT2W, IF_REAL, "Width dependence of dvt2w"), +IOP( "wdrout", BSIM3v1S_MOD_WDROUT, IF_REAL, "Width dependence of drout"), +IOP( "wdsub", BSIM3v1S_MOD_WDSUB, IF_REAL, "Width dependence of dsub"), +IOP( "wvth0", BSIM3v1S_MOD_WVTH0, IF_REAL,"Width dependence of vto"), +IOP( "wvtho", BSIM3v1S_MOD_WVTH0, IF_REAL,"Width dependence of vto"), +IOP( "wua", BSIM3v1S_MOD_WUA, IF_REAL, "Width dependence of ua"), +IOP( "wua1", BSIM3v1S_MOD_WUA1, IF_REAL, "Width dependence of ua1"), +IOP( "wub", BSIM3v1S_MOD_WUB, IF_REAL, "Width dependence of ub"), +IOP( "wub1", BSIM3v1S_MOD_WUB1, IF_REAL, "Width dependence of ub1"), +IOP( "wuc", BSIM3v1S_MOD_WUC, IF_REAL, "Width dependence of uc"), +IOP( "wuc1", BSIM3v1S_MOD_WUC1, IF_REAL, "Width dependence of uc1"), +IOP( "wu0", BSIM3v1S_MOD_WU0, IF_REAL, "Width dependence of u0"), +IOP( "wute", BSIM3v1S_MOD_WUTE, IF_REAL, "Width dependence of ute"), +IOP( "wvoff", BSIM3v1S_MOD_WVOFF, IF_REAL, "Width dependence of voff"), +IOP( "welm", BSIM3v1S_MOD_WELM, IF_REAL, "Width dependence of elm"), +IOP( "wdelta", BSIM3v1S_MOD_WDELTA, IF_REAL, "Width dependence of delta"), +IOP( "wrdsw", BSIM3v1S_MOD_WRDSW, IF_REAL, "Width dependence of rdsw "), + +IOP( "wprwg", BSIM3v1S_MOD_WPRWG, IF_REAL, "Width dependence of prwg "), +IOP( "wprwb", BSIM3v1S_MOD_WPRWB, IF_REAL, "Width dependence of prwb "), + +IOP( "wprt", BSIM3v1S_MOD_WPRT, IF_REAL, "Width dependence of prt"), +IOP( "weta0", BSIM3v1S_MOD_WETA0, IF_REAL, "Width dependence of eta0"), +IOP( "wetab", BSIM3v1S_MOD_WETAB, IF_REAL, "Width dependence of etab"), +IOP( "wpclm", BSIM3v1S_MOD_WPCLM, IF_REAL, "Width dependence of pclm"), +IOP( "wpdiblc1", BSIM3v1S_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"), +IOP( "wpdiblc2", BSIM3v1S_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"), +IOP( "wpdiblcb", BSIM3v1S_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"), +IOP( "wpscbe1", BSIM3v1S_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"), +IOP( "wpscbe2", BSIM3v1S_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"), +IOP( "wpvag", BSIM3v1S_MOD_WPVAG, IF_REAL, "Width dependence of pvag"), +IOP( "wwr", BSIM3v1S_MOD_WWR, IF_REAL, "Width dependence of wr"), +IOP( "wdwg", BSIM3v1S_MOD_WDWG, IF_REAL, "Width dependence of dwg"), +IOP( "wdwb", BSIM3v1S_MOD_WDWB, IF_REAL, "Width dependence of dwb"), +IOP( "wb0", BSIM3v1S_MOD_WB0, IF_REAL, "Width dependence of b0"), +IOP( "wb1", BSIM3v1S_MOD_WB1, IF_REAL, "Width dependence of b1"), +IOP( "wcgsl", BSIM3v1S_MOD_WCGSL, IF_REAL, "Width dependence of cgsl"), +IOP( "wcgdl", BSIM3v1S_MOD_WCGDL, IF_REAL, "Width dependence of cgdl"), +IOP( "wckappa", BSIM3v1S_MOD_WCKAPPA, IF_REAL, "Width dependence of ckappa"), +IOP( "wcf", BSIM3v1S_MOD_WCF, IF_REAL, "Width dependence of cf"), +IOP( "wclc", BSIM3v1S_MOD_WCLC, IF_REAL, "Width dependence of clc"), +IOP( "wcle", BSIM3v1S_MOD_WCLE, IF_REAL, "Width dependence of cle"), +IOP( "walpha0", BSIM3v1S_MOD_WALPHA0, IF_REAL, "Width dependence of alpha0"), +IOP( "wbeta0", BSIM3v1S_MOD_WBETA0, IF_REAL, "Width dependence of beta0"), +IOP( "wvfbcv", BSIM3v1S_MOD_WVFBCV, IF_REAL, "Width dependence of vfbcv"), + +IOP( "pcdsc", BSIM3v1S_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"), +IOP( "pcdscb", BSIM3v1S_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"), +IOP( "pcdscd", BSIM3v1S_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"), +IOP( "pcit", BSIM3v1S_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"), +IOP( "pnfactor", BSIM3v1S_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"), +IOP( "pxj", BSIM3v1S_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"), +IOP( "pvsat", BSIM3v1S_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"), +IOP( "pat", BSIM3v1S_MOD_PAT, IF_REAL, "Cross-term dependence of at"), +IOP( "pa0", BSIM3v1S_MOD_PA0, IF_REAL, "Cross-term dependence of a0"), +IOP( "pags", BSIM3v1S_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"), +IOP( "pa1", BSIM3v1S_MOD_PA1, IF_REAL, "Cross-term dependence of a1"), +IOP( "pa2", BSIM3v1S_MOD_PA2, IF_REAL, "Cross-term dependence of a2"), +IOP( "pketa", BSIM3v1S_MOD_PKETA, IF_REAL, "Cross-term dependence of keta"), +IOP( "pnsub", BSIM3v1S_MOD_PNSUB, IF_REAL, "Cross-term dependence of nsub"), +IOP( "pnch", BSIM3v1S_MOD_PNPEAK, IF_REAL, "Cross-term dependence of nch"), +IOP( "pngate", BSIM3v1S_MOD_PNGATE, IF_REAL, "Cross-term dependence of ngate"), +IOP( "pgamma1", BSIM3v1S_MOD_PGAMMA1, IF_REAL, "Cross-term dependence of gamma1"), +IOP( "pgamma2", BSIM3v1S_MOD_PGAMMA2, IF_REAL, "Cross-term dependence of gamma2"), +IOP( "pvbx", BSIM3v1S_MOD_PVBX, IF_REAL, "Cross-term dependence of vbx"), +IOP( "pvbm", BSIM3v1S_MOD_PVBM, IF_REAL, "Cross-term dependence of vbm"), +IOP( "pxt", BSIM3v1S_MOD_PXT, IF_REAL, "Cross-term dependence of xt"), +IOP( "pk1", BSIM3v1S_MOD_PK1, IF_REAL, "Cross-term dependence of k1"), +IOP( "pkt1", BSIM3v1S_MOD_PKT1, IF_REAL, "Cross-term dependence of kt1"), +IOP( "pkt1l", BSIM3v1S_MOD_PKT1L, IF_REAL, "Cross-term dependence of kt1l"), +IOP( "pkt2", BSIM3v1S_MOD_PKT2, IF_REAL, "Cross-term dependence of kt2"), +IOP( "pk2", BSIM3v1S_MOD_PK2, IF_REAL, "Cross-term dependence of k2"), +IOP( "pk3", BSIM3v1S_MOD_PK3, IF_REAL, "Cross-term dependence of k3"), +IOP( "pk3b", BSIM3v1S_MOD_PK3B, IF_REAL, "Cross-term dependence of k3b"), +IOP( "pw0", BSIM3v1S_MOD_PW0, IF_REAL, "Cross-term dependence of w0"), +IOP( "pnlx", BSIM3v1S_MOD_PNLX, IF_REAL, "Cross-term dependence of nlx"), +IOP( "pdvt0", BSIM3v1S_MOD_PDVT0, IF_REAL, "Cross-term dependence of dvt0"), +IOP( "pdvt1", BSIM3v1S_MOD_PDVT1, IF_REAL, "Cross-term dependence of dvt1"), +IOP( "pdvt2", BSIM3v1S_MOD_PDVT2, IF_REAL, "Cross-term dependence of dvt2"), +IOP( "pdvt0w", BSIM3v1S_MOD_PDVT0W, IF_REAL, "Cross-term dependence of dvt0w"), +IOP( "pdvt1w", BSIM3v1S_MOD_PDVT1W, IF_REAL, "Cross-term dependence of dvt1w"), +IOP( "pdvt2w", BSIM3v1S_MOD_PDVT2W, IF_REAL, "Cross-term dependence of dvt2w"), +IOP( "pdrout", BSIM3v1S_MOD_PDROUT, IF_REAL, "Cross-term dependence of drout"), +IOP( "pdsub", BSIM3v1S_MOD_PDSUB, IF_REAL, "Cross-term dependence of dsub"), +IOP( "pvth0", BSIM3v1S_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), +IOP( "pvtho", BSIM3v1S_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"), +IOP( "pua", BSIM3v1S_MOD_PUA, IF_REAL, "Cross-term dependence of ua"), +IOP( "pua1", BSIM3v1S_MOD_PUA1, IF_REAL, "Cross-term dependence of ua1"), +IOP( "pub", BSIM3v1S_MOD_PUB, IF_REAL, "Cross-term dependence of ub"), +IOP( "pub1", BSIM3v1S_MOD_PUB1, IF_REAL, "Cross-term dependence of ub1"), +IOP( "puc", BSIM3v1S_MOD_PUC, IF_REAL, "Cross-term dependence of uc"), +IOP( "puc1", BSIM3v1S_MOD_PUC1, IF_REAL, "Cross-term dependence of uc1"), +IOP( "pu0", BSIM3v1S_MOD_PU0, IF_REAL, "Cross-term dependence of u0"), +IOP( "pute", BSIM3v1S_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"), +IOP( "pvoff", BSIM3v1S_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"), +IOP( "pelm", BSIM3v1S_MOD_PELM, IF_REAL, "Cross-term dependence of elm"), +IOP( "pdelta", BSIM3v1S_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"), +IOP( "prdsw", BSIM3v1S_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "), + +IOP( "pprwg", BSIM3v1S_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "), +IOP( "pprwb", BSIM3v1S_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "), + +IOP( "pprt", BSIM3v1S_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "), +IOP( "peta0", BSIM3v1S_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"), +IOP( "petab", BSIM3v1S_MOD_PETAB, IF_REAL, "Cross-term dependence of etab"), +IOP( "ppclm", BSIM3v1S_MOD_PPCLM, IF_REAL, "Cross-term dependence of pclm"), +IOP( "ppdiblc1", BSIM3v1S_MOD_PPDIBL1, IF_REAL, "Cross-term dependence of pdiblc1"), +IOP( "ppdiblc2", BSIM3v1S_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc2"), +IOP( "ppdiblcb", BSIM3v1S_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"), +IOP( "ppscbe1", BSIM3v1S_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"), +IOP( "ppscbe2", BSIM3v1S_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"), +IOP( "ppvag", BSIM3v1S_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"), +IOP( "pwr", BSIM3v1S_MOD_PWR, IF_REAL, "Cross-term dependence of wr"), +IOP( "pdwg", BSIM3v1S_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"), +IOP( "pdwb", BSIM3v1S_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"), +IOP( "pb0", BSIM3v1S_MOD_PB0, IF_REAL, "Cross-term dependence of b0"), +IOP( "pb1", BSIM3v1S_MOD_PB1, IF_REAL, "Cross-term dependence of b1"), +IOP( "pcgsl", BSIM3v1S_MOD_PCGSL, IF_REAL, "Cross-term dependence of cgsl"), +IOP( "pcgdl", BSIM3v1S_MOD_PCGDL, IF_REAL, "Cross-term dependence of cgdl"), +IOP( "pckappa", BSIM3v1S_MOD_PCKAPPA, IF_REAL, "Cross-term dependence of ckappa"), +IOP( "pcf", BSIM3v1S_MOD_PCF, IF_REAL, "Cross-term dependence of cf"), +IOP( "pclc", BSIM3v1S_MOD_PCLC, IF_REAL, "Cross-term dependence of clc"), +IOP( "pcle", BSIM3v1S_MOD_PCLE, IF_REAL, "Cross-term dependence of cle"), +IOP( "palpha0", BSIM3v1S_MOD_PALPHA0, IF_REAL, "Cross-term dependence of alpha0"), +IOP( "pbeta0", BSIM3v1S_MOD_PBETA0, IF_REAL, "Cross-term dependence of beta0"), +IOP( "pvfbcv", BSIM3v1S_MOD_PVFBCV, IF_REAL, "Cross-term dependence of vfbcv"), + +IOP( "noia", BSIM3v1S_MOD_NOIA, IF_REAL, "Flicker noise parameter"), +IOP( "noib", BSIM3v1S_MOD_NOIB, IF_REAL, "Flicker noise parameter"), +IOP( "noic", BSIM3v1S_MOD_NOIC, IF_REAL, "Flicker noise parameter"), +IOP( "em", BSIM3v1S_MOD_EM, IF_REAL, "Flicker noise parameter"), +IOP( "ef", BSIM3v1S_MOD_EF, IF_REAL, "Flicker noise frequency exponent"), +IOP( "af", BSIM3v1S_MOD_AF, IF_REAL, "Flicker noise exponent"), +IOP( "kf", BSIM3v1S_MOD_KF, IF_REAL, "Flicker noise coefficient"), + +IP( "nmos", BSIM3v1S_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"), +IP( "pmos", BSIM3v1S_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"), +/* serban */ +IOP( "hdif", BSIM3v1S_MOD_HDIF, IF_REAL, "S/D junction extension (HSPICE style)"), +}; + +char *BSIM3v1Snames[] = { + "Drain", + "Gate", + "Source", + "Bulk", + "Charge" +}; + +int BSIM3v1SnSize = NUMELEMS(BSIM3v1Snames); +int BSIM3v1SpTSize = NUMELEMS(BSIM3v1SpTable); +int BSIM3v1SmPTSize = NUMELEMS(BSIM3v1SmPTable); +int BSIM3v1SiSize = sizeof(BSIM3v1Sinstance); +int BSIM3v1SmSize = sizeof(BSIM3v1Smodel); + + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1sacld.c b/src/spicelib/devices/bsim3v1s/b3v1sacld.c new file mode 100644 index 000000000..b61505dcb --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1sacld.c @@ -0,0 +1,181 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1sacld.c +**********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v1sdef.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM3v1SacLoad(GENmodel *inModel, CKTcircuit *ckt) +{ +BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; +BSIM3v1Sinstance *here; +double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb; +double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb; +double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega; +double GSoverlapCap, GDoverlapCap, GBoverlapCap, FwdSum, RevSum, Gm, Gmbs; + +double dxpart, sxpart, cqgb, cqdb, cqsb, cqbb, xcqgb, xcqdb, xcqsb, xcqbb; + + omega = ckt->CKTomega; + for (; model != NULL; model = model->BSIM3v1SnextModel) + { + + + for (here = model->BSIM3v1Sinstances; here!= NULL; + here = here->BSIM3v1SnextInstance) + { + + if (here->BSIM3v1Sowner != ARCHme) + continue; + + if (here->BSIM3v1Smode >= 0) + { Gm = here->BSIM3v1Sgm; + Gmbs = here->BSIM3v1Sgmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + cggb = here->BSIM3v1Scggb; + cgsb = here->BSIM3v1Scgsb; + cgdb = here->BSIM3v1Scgdb; + + cbgb = here->BSIM3v1Scbgb; + cbsb = here->BSIM3v1Scbsb; + cbdb = here->BSIM3v1Scbdb; + + cdgb = here->BSIM3v1Scdgb; + cdsb = here->BSIM3v1Scdsb; + cddb = here->BSIM3v1Scddb; + + cqgb = here->BSIM3v1Scqgb; + cqdb = here->BSIM3v1Scqdb; + cqsb = here->BSIM3v1Scqsb; + cqbb = here->BSIM3v1Scqbb; + sxpart = 0.6; + dxpart = 0.4; + + } + else + { Gm = -here->BSIM3v1Sgm; + Gmbs = -here->BSIM3v1Sgmbs; + FwdSum = 0.0; + RevSum = -Gm - Gmbs; + cggb = here->BSIM3v1Scggb; + cgsb = here->BSIM3v1Scgdb; + cgdb = here->BSIM3v1Scgsb; + + cbgb = here->BSIM3v1Scbgb; + cbsb = here->BSIM3v1Scbdb; + cbdb = here->BSIM3v1Scbsb; + + cdgb = -(here->BSIM3v1Scdgb + cggb + cbgb); + cdsb = -(here->BSIM3v1Scddb + cgsb + cbsb); + cddb = -(here->BSIM3v1Scdsb + cgdb + cbdb); + + cqgb = here->BSIM3v1Scqgb; + cqdb = here->BSIM3v1Scqsb; + cqsb = here->BSIM3v1Scqdb; + cqbb = here->BSIM3v1Scqbb; + sxpart = 0.4; + dxpart = 0.6; + } + + gdpr=here->BSIM3v1SdrainConductance; + gspr=here->BSIM3v1SsourceConductance; + gds= here->BSIM3v1Sgds; + gbd= here->BSIM3v1Sgbd; + gbs= here->BSIM3v1Sgbs; + capbd= here->BSIM3v1Scapbd; + capbs= here->BSIM3v1Scapbs; + + GSoverlapCap = here->BSIM3v1Scgso; + GDoverlapCap = here->BSIM3v1Scgdo; + GBoverlapCap = here->pParam->BSIM3v1Scgbo; + + xcdgb = (cdgb - GDoverlapCap) * omega; + xcddb = (cddb + capbd + GDoverlapCap) * omega; + xcdsb = cdsb * omega; + xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap) * omega; + xcsdb = -(cgdb + cbdb + cddb) * omega; + xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega; + xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap) + * omega; + xcgdb = (cgdb - GDoverlapCap ) * omega; + xcgsb = (cgsb - GSoverlapCap) * omega; + xcbgb = (cbgb - GBoverlapCap) * omega; + xcbdb = (cbdb - capbd ) * omega; + xcbsb = (cbsb - capbs ) * omega; + xcqgb = cqgb * omega; + xcqdb = cqdb * omega; + xcqsb = cqsb * omega; + xcqbb = cqbb * omega; + + *(here->BSIM3v1SGgPtr +1) += xcggb; + *(here->BSIM3v1SBbPtr +1) -= xcbgb + xcbdb + xcbsb; + *(here->BSIM3v1SDPdpPtr +1) += xcddb; + *(here->BSIM3v1SSPspPtr +1) += xcssb; + *(here->BSIM3v1SGbPtr +1) -= xcggb + xcgdb + xcgsb; + *(here->BSIM3v1SGdpPtr +1) += xcgdb; + *(here->BSIM3v1SGspPtr +1) += xcgsb; + *(here->BSIM3v1SBgPtr +1) += xcbgb; + *(here->BSIM3v1SBdpPtr +1) += xcbdb; + *(here->BSIM3v1SBspPtr +1) += xcbsb; + *(here->BSIM3v1SDPgPtr +1) += xcdgb; + *(here->BSIM3v1SDPbPtr +1) -= xcdgb + xcddb + xcdsb; + *(here->BSIM3v1SDPspPtr +1) += xcdsb; + *(here->BSIM3v1SSPgPtr +1) += xcsgb; + *(here->BSIM3v1SSPbPtr +1) -= xcsgb + xcsdb + xcssb; + *(here->BSIM3v1SSPdpPtr +1) += xcsdb; + + *(here->BSIM3v1SQqPtr +1) += omega; + + *(here->BSIM3v1SQgPtr +1) -= xcqgb; + *(here->BSIM3v1SQdpPtr +1) -= xcqdb; + *(here->BSIM3v1SQspPtr +1) -= xcqsb; + *(here->BSIM3v1SQbPtr +1) -= xcqbb; + + + *(here->BSIM3v1SDdPtr) += gdpr; + *(here->BSIM3v1SSsPtr) += gspr; + *(here->BSIM3v1SBbPtr) += gbd + gbs; + *(here->BSIM3v1SDPdpPtr) += gdpr + gds + gbd + RevSum + dxpart*here->BSIM3v1Sgtd; + *(here->BSIM3v1SSPspPtr) += gspr + gds + gbs + FwdSum + sxpart*here->BSIM3v1Sgts; + *(here->BSIM3v1SDdpPtr) -= gdpr; + *(here->BSIM3v1SSspPtr) -= gspr; + *(here->BSIM3v1SBdpPtr) -= gbd; + *(here->BSIM3v1SBspPtr) -= gbs; + *(here->BSIM3v1SDPdPtr) -= gdpr; + *(here->BSIM3v1SDPgPtr) += Gm + dxpart * here->BSIM3v1Sgtg; + *(here->BSIM3v1SDPbPtr) -= gbd - Gmbs - dxpart * here->BSIM3v1Sgtb; + *(here->BSIM3v1SDPspPtr) -= gds + FwdSum - dxpart * here->BSIM3v1Sgts; + *(here->BSIM3v1SSPgPtr) -= Gm - sxpart * here->BSIM3v1Sgtg; + *(here->BSIM3v1SSPsPtr) -= gspr; + *(here->BSIM3v1SSPbPtr) -= gbs + Gmbs - sxpart * here->BSIM3v1Sgtg; + *(here->BSIM3v1SSPdpPtr) -= gds + RevSum - sxpart * here->BSIM3v1Sgtd; + *(here->BSIM3v1SGgPtr) -= here->BSIM3v1Sgtg; + *(here->BSIM3v1SGbPtr) -= here->BSIM3v1Sgtb; + *(here->BSIM3v1SGdpPtr) -= here->BSIM3v1Sgtd; + *(here->BSIM3v1SGspPtr) -= here->BSIM3v1Sgts; + + *(here->BSIM3v1SQqPtr) += here->BSIM3v1Sgtau; + + *(here->BSIM3v1SDPqPtr) += dxpart * here->BSIM3v1Sgtau; + *(here->BSIM3v1SSPqPtr) += sxpart * here->BSIM3v1Sgtau; + *(here->BSIM3v1SGqPtr) -= here->BSIM3v1Sgtau; + + *(here->BSIM3v1SQgPtr) += here->BSIM3v1Sgtg; + *(here->BSIM3v1SQdpPtr) += here->BSIM3v1Sgtd; + *(here->BSIM3v1SQspPtr) += here->BSIM3v1Sgts; + *(here->BSIM3v1SQbPtr) += here->BSIM3v1Sgtb; + + } + } + return(OK); +} + diff --git a/src/spicelib/devices/bsim3v1s/b3v1sask.c b/src/spicelib/devices/bsim3v1s/b3v1sask.c new file mode 100644 index 000000000..a542c6142 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1sask.c @@ -0,0 +1,193 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1sask.c +**********/ + +#include "ngspice.h" +#include "ifsim.h" +#include "cktdefs.h" +#include "devdefs.h" +#include "bsim3v1sdef.h" +#include "sperror.h" +#include "suffix.h" + +int +BSIM3v1Sask(CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value, + IFvalue *select) +{ +BSIM3v1Sinstance *here = (BSIM3v1Sinstance*)inst; + + switch(which) + { case BSIM3v1S_L: + value->rValue = here->BSIM3v1Sl; + return(OK); + case BSIM3v1S_W: + value->rValue = here->BSIM3v1Sw; + return(OK); + case BSIM3v1S_AS: + value->rValue = here->BSIM3v1SsourceArea; + return(OK); + case BSIM3v1S_AD: + value->rValue = here->BSIM3v1SdrainArea; + return(OK); + case BSIM3v1S_PS: + value->rValue = here->BSIM3v1SsourcePerimeter; + return(OK); + case BSIM3v1S_PD: + value->rValue = here->BSIM3v1SdrainPerimeter; + return(OK); + case BSIM3v1S_NRS: + value->rValue = here->BSIM3v1SsourceSquares; + return(OK); + case BSIM3v1S_NRD: + value->rValue = here->BSIM3v1SdrainSquares; + return(OK); + case BSIM3v1S_OFF: + value->rValue = here->BSIM3v1Soff; + return(OK); + case BSIM3v1S_NQSMOD: + value->iValue = here->BSIM3v1SnqsMod; + return(OK); + case BSIM3v1S_M: + value->rValue = here->BSIM3v1Sm; + return(OK); + case BSIM3v1S_IC_VBS: + value->rValue = here->BSIM3v1SicVBS; + return(OK); + case BSIM3v1S_IC_VDS: + value->rValue = here->BSIM3v1SicVDS; + return(OK); + case BSIM3v1S_IC_VGS: + value->rValue = here->BSIM3v1SicVGS; + return(OK); + case BSIM3v1S_DNODE: + value->iValue = here->BSIM3v1SdNode; + return(OK); + case BSIM3v1S_GNODE: + value->iValue = here->BSIM3v1SgNode; + return(OK); + case BSIM3v1S_SNODE: + value->iValue = here->BSIM3v1SsNode; + return(OK); + case BSIM3v1S_BNODE: + value->iValue = here->BSIM3v1SbNode; + return(OK); + case BSIM3v1S_DNODEPRIME: + value->iValue = here->BSIM3v1SdNodePrime; + return(OK); + case BSIM3v1S_SNODEPRIME: + value->iValue = here->BSIM3v1SsNodePrime; + return(OK); + case BSIM3v1S_SOURCECONDUCT: + value->rValue = here->BSIM3v1SsourceConductance; + return(OK); + case BSIM3v1S_DRAINCONDUCT: + value->rValue = here->BSIM3v1SdrainConductance; + return(OK); + case BSIM3v1S_VBD: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Svbd); + return(OK); + case BSIM3v1S_VBS: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Svbs); + return(OK); + case BSIM3v1S_VGS: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Svgs); + return(OK); + case BSIM3v1S_VDS: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Svds); + return(OK); + case BSIM3v1S_CD: + value->rValue = here->BSIM3v1Scd; + return(OK); + case BSIM3v1S_CBS: + value->rValue = here->BSIM3v1Scbs; + return(OK); + case BSIM3v1S_CBD: + value->rValue = here->BSIM3v1Scbd; + return(OK); + case BSIM3v1S_GM: + value->rValue = here->BSIM3v1Sgm; + return(OK); + case BSIM3v1S_GDS: + value->rValue = here->BSIM3v1Sgds; + return(OK); + case BSIM3v1S_GMBS: + value->rValue = here->BSIM3v1Sgmbs; + return(OK); + case BSIM3v1S_GBD: + value->rValue = here->BSIM3v1Sgbd; + return(OK); + case BSIM3v1S_GBS: + value->rValue = here->BSIM3v1Sgbs; + return(OK); + case BSIM3v1S_QB: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Sqb); + return(OK); + case BSIM3v1S_CQB: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Scqb); + return(OK); + case BSIM3v1S_QG: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Sqg); + return(OK); + case BSIM3v1S_CQG: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Scqg); + return(OK); + case BSIM3v1S_QD: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Sqd); + return(OK); + case BSIM3v1S_CQD: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Scqd); + return(OK); + case BSIM3v1S_CGG: + value->rValue = here->BSIM3v1Scggb; + return(OK); + case BSIM3v1S_CGD: + value->rValue = here->BSIM3v1Scgdb; + return(OK); + case BSIM3v1S_CGS: + value->rValue = here->BSIM3v1Scgsb; + return(OK); + case BSIM3v1S_CDG: + value->rValue = here->BSIM3v1Scdgb; + return(OK); + case BSIM3v1S_CDD: + value->rValue = here->BSIM3v1Scddb; + return(OK); + case BSIM3v1S_CDS: + value->rValue = here->BSIM3v1Scdsb; + return(OK); + case BSIM3v1S_CBG: + value->rValue = here->BSIM3v1Scbgb; + return(OK); + case BSIM3v1S_CBDB: + value->rValue = here->BSIM3v1Scbdb; + return(OK); + case BSIM3v1S_CBSB: + value->rValue = here->BSIM3v1Scbsb; + return(OK); + case BSIM3v1S_CAPBD: + value->rValue = here->BSIM3v1Scapbd; + return(OK); + case BSIM3v1S_CAPBS: + value->rValue = here->BSIM3v1Scapbs; + return(OK); + case BSIM3v1S_VON: + value->rValue = here->BSIM3v1Svon; + return(OK); + case BSIM3v1S_VDSAT: + value->rValue = here->BSIM3v1Svdsat; + return(OK); + case BSIM3v1S_QBS: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Sqbs); + return(OK); + case BSIM3v1S_QBD: + value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Sqbd); + return(OK); + default: + return(E_BADPARM); + } + /* NOTREACHED */ +} + diff --git a/src/spicelib/devices/bsim3v1s/b3v1scheck.c b/src/spicelib/devices/bsim3v1s/b3v1scheck.c new file mode 100644 index 000000000..7b36e41de --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1scheck.c @@ -0,0 +1,359 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: Min-Chie Jeng. +Modified by Paolo Nenzi 2002 +File: b3v1scheck.c +**********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v1sdef.h" +#include "trandefs.h" +#include "const.h" +#include "sperror.h" +#include "devdefs.h" +#include "suffix.h" + +int +BSIM3v1ScheckModel(BSIM3v1Smodel *model, BSIM3v1Sinstance *here, + CKTcircuit *ckt) +{ +struct bsim3v1sSizeDependParam *pParam; +int Fatal_Flag = 0; +FILE *fplog; + + if ((fplog = fopen("BSIM3V3_1S_check.log", "w")) != NULL) + { pParam = here->pParam; + fprintf(fplog, "BSIM3V3.1 (Serban) Parameter Check\n"); + fprintf(fplog, "Model = %s\n", model->BSIM3v1SmodName); + fprintf(fplog, "W = %g, L = %g\n", here->BSIM3v1Sw, here->BSIM3v1Sl); + + + if (pParam->BSIM3v1Snlx < -pParam->BSIM3v1Sleff) + { fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n", + pParam->BSIM3v1Snlx); + printf("Fatal: Nlx = %g is less than -Leff.\n", + pParam->BSIM3v1Snlx); + Fatal_Flag = 1; + } + + if (model->BSIM3v1Stox <= 0.0) + { fprintf(fplog, "Fatal: Tox = %g is not positive.\n", + model->BSIM3v1Stox); + printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v1Stox); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v1Snpeak <= 0.0) + { fprintf(fplog, "Fatal: Nch = %g is not positive.\n", + pParam->BSIM3v1Snpeak); + printf("Fatal: Nch = %g is not positive.\n", + pParam->BSIM3v1Snpeak); + Fatal_Flag = 1; + } + if (pParam->BSIM3v1Snsub <= 0.0) + { fprintf(fplog, "Fatal: Nsub = %g is not positive.\n", + pParam->BSIM3v1Snsub); + printf("Fatal: Nsub = %g is not positive.\n", + pParam->BSIM3v1Snsub); + Fatal_Flag = 1; + } + if (pParam->BSIM3v1Sngate < 0.0) + { fprintf(fplog, "Fatal: Ngate = %g is not positive.\n", + pParam->BSIM3v1Sngate); + printf("Fatal: Ngate = %g Ngate is not positive.\n", + pParam->BSIM3v1Sngate); + Fatal_Flag = 1; + } + if (pParam->BSIM3v1Sngate > 1.e25) + { fprintf(fplog, "Fatal: Ngate = %g is too high.\n", + pParam->BSIM3v1Sngate); + printf("Fatal: Ngate = %g Ngate is too high\n", + pParam->BSIM3v1Sngate); + Fatal_Flag = 1; + } + if (pParam->BSIM3v1Sxj <= 0.0) + { fprintf(fplog, "Fatal: Xj = %g is not positive.\n", + pParam->BSIM3v1Sxj); + printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v1Sxj); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v1Sdvt1 < 0.0) + { fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n", + pParam->BSIM3v1Sdvt1); + printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v1Sdvt1); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v1Sdvt1w < 0.0) + { fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n", + pParam->BSIM3v1Sdvt1w); + printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v1Sdvt1w); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v1Sw0 == -pParam->BSIM3v1Sweff) + { fprintf(fplog, "Fatal: (W0 + Weff) = 0 cauing divided-by-zero.\n"); + printf("Fatal: (W0 + Weff) = 0 cauing divided-by-zero.\n"); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v1Sdsub < 0.0) + { fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v1Sdsub); + printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v1Sdsub); + Fatal_Flag = 1; + } + if (pParam->BSIM3v1Sb1 == -pParam->BSIM3v1Sweff) + { fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); + Fatal_Flag = 1; + } + if (pParam->BSIM3v1Su0temp <= 0.0) + { fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v1Su0temp); + printf("Fatal: u0 at current temperature = %g is not positive.\n", + pParam->BSIM3v1Su0temp); + Fatal_Flag = 1; + } + +/* Check delta parameter */ + if (pParam->BSIM3v1Sdelta < 0.0) + { fprintf(fplog, "Fatal: Delta = %g is less than zero.\n", + pParam->BSIM3v1Sdelta); + printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v1Sdelta); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v1Svsattemp <= 0.0) + { fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v1Svsattemp); + printf("Fatal: Vsat at current temperature = %g is not positive.\n", + pParam->BSIM3v1Svsattemp); + Fatal_Flag = 1; + } +/* Check Rout parameters */ + if (pParam->BSIM3v1Spclm <= 0.0) + { fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v1Spclm); + printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v1Spclm); + Fatal_Flag = 1; + } + + if (pParam->BSIM3v1Sdrout < 0.0) + { fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v1Sdrout); + printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v1Sdrout); + Fatal_Flag = 1; + } + if (model->BSIM3v1SunitLengthSidewallJctCap > 0.0 || + model->BSIM3v1SunitLengthGateSidewallJctCap > 0.0) + { + if (here->BSIM3v1SdrainPerimeter < pParam->BSIM3v1Sweff) + { fprintf(fplog, "Warning: Pd = %g is less than W.\n", + here->BSIM3v1SdrainPerimeter); + printf("Warning: Pd = %g is less than W.\n", + here->BSIM3v1SdrainPerimeter); + here->BSIM3v1SdrainPerimeter =pParam->BSIM3v1Sweff; + } + if (here->BSIM3v1SsourcePerimeter < pParam->BSIM3v1Sweff) + { fprintf(fplog, "Warning: Ps = %g is less than W.\n", + here->BSIM3v1SsourcePerimeter); + printf("Warning: Ps = %g is less than W.\n", + here->BSIM3v1SsourcePerimeter); + here->BSIM3v1SsourcePerimeter =pParam->BSIM3v1Sweff; + } + } +/* Check capacitance parameters */ + if (pParam->BSIM3v1Sclc < 0.0) + { fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v1Sclc); + printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v1Sclc); + Fatal_Flag = 1; + } + if (model->BSIM3v1SparamChk ==1) + { +/* Check L and W parameters */ + if (pParam->BSIM3v1Sleff <= 5.0e-8) + { fprintf(fplog, "Warning: Leff = %g may be too small.\n", + pParam->BSIM3v1Sleff); + printf("Warning: Leff = %g may be too small.\n", + pParam->BSIM3v1Sleff); + } + + if (pParam->BSIM3v1SleffCV <= 5.0e-8) + { fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n", + pParam->BSIM3v1SleffCV); + printf("Warning: Leff for CV = %g may be too small.\n", + pParam->BSIM3v1SleffCV); + } + + if (pParam->BSIM3v1Sweff <= 1.0e-7) + { fprintf(fplog, "Warning: Weff = %g may be too small.\n", + pParam->BSIM3v1Sweff); + printf("Warning: Weff = %g may be too small.\n", + pParam->BSIM3v1Sweff); + } + + if (pParam->BSIM3v1SweffCV <= 1.0e-7) + { fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n", + pParam->BSIM3v1SweffCV); + printf("Warning: Weff for CV = %g may be too small.\n", + pParam->BSIM3v1SweffCV); + } + +/* Check threshold voltage parameters */ + if (pParam->BSIM3v1Snlx < 0.0) + { fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v1Snlx); + printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v1Snlx); + } + if (model->BSIM3v1Stox < 1.0e-9) + { fprintf(fplog, "Warning: Tox = %g is less than 10A.\n", + model->BSIM3v1Stox); + printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v1Stox); + } + + if (pParam->BSIM3v1Snpeak <= 1.0e15) + { fprintf(fplog, "Warning: Nch = %g may be too small.\n", + pParam->BSIM3v1Snpeak); + printf("Warning: Nch = %g may be too small.\n", + pParam->BSIM3v1Snpeak); + } + else if (pParam->BSIM3v1Snpeak >= 1.0e21) + { fprintf(fplog, "Warning: Nch = %g may be too large.\n", + pParam->BSIM3v1Snpeak); + printf("Warning: Nch = %g may be too large.\n", + pParam->BSIM3v1Snpeak); + } + + if (pParam->BSIM3v1Snsub <= 1.0e14) + { fprintf(fplog, "Warning: Nsub = %g may be too small.\n", + pParam->BSIM3v1Snsub); + printf("Warning: Nsub = %g may be too small.\n", + pParam->BSIM3v1Snsub); + } + else if (pParam->BSIM3v1Snsub >= 1.0e21) + { fprintf(fplog, "Warning: Nsub = %g may be too large.\n", + pParam->BSIM3v1Snsub); + printf("Warning: Nsub = %g may be too large.\n", + pParam->BSIM3v1Snsub); + } + + if ((pParam->BSIM3v1Sngate > 0.0) && + (pParam->BSIM3v1Sngate <= 1.e18)) + { fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM3v1Sngate); + printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n", + pParam->BSIM3v1Sngate); + } + + if (pParam->BSIM3v1Sdvt0 < 0.0) + { fprintf(fplog, "Warning: Dvt0 = %g is negative.\n", + pParam->BSIM3v1Sdvt0); + printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v1Sdvt0); + } + + if (fabs(1.0e-6 / (pParam->BSIM3v1Sw0 + pParam->BSIM3v1Sweff)) > 10.0) + { fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n"); + printf("Warning: (W0 + Weff) may be too small.\n"); + } + +/* Check subthreshold parameters */ + if (pParam->BSIM3v1Snfactor < 0.0) + { fprintf(fplog, "Warning: Nfactor = %g is negative.\n", + pParam->BSIM3v1Snfactor); + printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v1Snfactor); + } + if (pParam->BSIM3v1Scdsc < 0.0) + { fprintf(fplog, "Warning: Cdsc = %g is negative.\n", + pParam->BSIM3v1Scdsc); + printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v1Scdsc); + } + if (pParam->BSIM3v1Scdscd < 0.0) + { fprintf(fplog, "Warning: Cdscd = %g is negative.\n", + pParam->BSIM3v1Scdscd); + printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v1Scdscd); + } +/* Check DIBL parameters */ + if (pParam->BSIM3v1Seta0 < 0.0) + { fprintf(fplog, "Warning: Eta0 = %g is negative.\n", + pParam->BSIM3v1Seta0); + printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v1Seta0); + } + +/* Check Abulk parameters */ + if (fabs(1.0e-6 / (pParam->BSIM3v1Sb1 + pParam->BSIM3v1Sweff)) > 10.0) + { fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n"); + printf("Warning: (B1 + Weff) may be too small.\n"); + } + + +/* Check Saturation parameters */ + if (pParam->BSIM3v1Sa2 < 0.01) + { fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v1Sa2); + printf("Warning: A2 = %g is too small. Set to 0.01.\n", + pParam->BSIM3v1Sa2); + pParam->BSIM3v1Sa2 = 0.01; + } + else if (pParam->BSIM3v1Sa2 > 1.0) + { fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM3v1Sa2); + printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", + pParam->BSIM3v1Sa2); + pParam->BSIM3v1Sa2 = 1.0; + pParam->BSIM3v1Sa1 = 0.0; + + } + + if (pParam->BSIM3v1Srdsw < 0.0) + { fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM3v1Srdsw); + printf("Warning: Rdsw = %g is negative. Set to zero.\n", + pParam->BSIM3v1Srdsw); + pParam->BSIM3v1Srdsw = 0.0; + pParam->BSIM3v1Srds0 = 0.0; + } + else if ((pParam->BSIM3v1Srds0 > 0.0) && (pParam->BSIM3v1Srds0 < 0.001)) + { fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", + pParam->BSIM3v1Srds0); + printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", + pParam->BSIM3v1Srds0); + pParam->BSIM3v1Srds0 = 0.0; + } + if (pParam->BSIM3v1Svsattemp < 1.0e3) + { fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v1Svsattemp); + printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v1Svsattemp); + } + + if (pParam->BSIM3v1Spdibl1 < 0.0) + { fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n", + pParam->BSIM3v1Spdibl1); + printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v1Spdibl1); + } + if (pParam->BSIM3v1Spdibl2 < 0.0) + { fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n", + pParam->BSIM3v1Spdibl2); + printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v1Spdibl2); + } +/* Check overlap capacitance parameters */ + if (model->BSIM3v1Scgdo < 0.0) + { fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v1Scgdo); + printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v1Scgdo); + model->BSIM3v1Scgdo = 0.0; + } + if (model->BSIM3v1Scgso < 0.0) + { fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v1Scgso); + printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v1Scgso); + model->BSIM3v1Scgso = 0.0; + } + if (model->BSIM3v1Scgbo < 0.0) + { fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v1Scgbo); + printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v1Scgbo); + model->BSIM3v1Scgbo = 0.0; + } + + }/* loop for the parameter check for warning messages */ + fclose(fplog); + } + else + { fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n"); + } + + return(Fatal_Flag); +} + diff --git a/src/spicelib/devices/bsim3v1s/b3v1scvtest.c b/src/spicelib/devices/bsim3v1s/b3v1scvtest.c new file mode 100644 index 000000000..128a1dc2d --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1scvtest.c @@ -0,0 +1,110 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1scvtest.c +**********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v1sdef.h" +#include "trandefs.h" +#include "const.h" +#include "devdefs.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM3v1SconvTest(GENmodel *inModel, CKTcircuit *ckt) +{ +BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; +BSIM3v1Sinstance *here; +double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds; +double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs; + + /* loop through all the BSIM3v1S device models */ + for (; model != NULL; model = model->BSIM3v1SnextModel) + { /* loop through all the instances of the model */ + for (here = model->BSIM3v1Sinstances; here != NULL ; + here=here->BSIM3v1SnextInstance) + { + if (here->BSIM3v1Sowner != ARCHme) continue; + vbs = model->BSIM3v1Stype + * (*(ckt->CKTrhsOld+here->BSIM3v1SbNode) + - *(ckt->CKTrhsOld+here->BSIM3v1SsNodePrime)); + vgs = model->BSIM3v1Stype + * (*(ckt->CKTrhsOld+here->BSIM3v1SgNode) + - *(ckt->CKTrhsOld+here->BSIM3v1SsNodePrime)); + vds = model->BSIM3v1Stype + * (*(ckt->CKTrhsOld+here->BSIM3v1SdNodePrime) + - *(ckt->CKTrhsOld+here->BSIM3v1SsNodePrime)); + vbd = vbs - vds; + vgd = vgs - vds; + vgdo = *(ckt->CKTstate0 + here->BSIM3v1Svgs) + - *(ckt->CKTstate0 + here->BSIM3v1Svds); + delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v1Svbs); + delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v1Svbd); + delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v1Svgs); + delvds = vds - *(ckt->CKTstate0 + here->BSIM3v1Svds); + delvgd = vgd-vgdo; + + cd = here->BSIM3v1Scd; + if (here->BSIM3v1Smode >= 0) + { cdhat = cd - here->BSIM3v1Sgbd * delvbd + + here->BSIM3v1Sgmbs * delvbs + here->BSIM3v1Sgm * delvgs + + here->BSIM3v1Sgds * delvds; + } + else + { cdhat = cd - (here->BSIM3v1Sgbd - here->BSIM3v1Sgmbs) * delvbd + - here->BSIM3v1Sgm * delvgd + here->BSIM3v1Sgds * delvds; + } + + /* + * check convergence + */ + if ((here->BSIM3v1Soff == 0) || (!(ckt->CKTmode & MODEINITFIX))) + { tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd)) + + ckt->CKTabstol; + if (fabs(cdhat - cd) >= tol) { + +#ifdef STRANGE_PATCH +/* gtri - begin - wbk - report conv prob */ + if(ckt->enh->conv_debug.report_conv_probs) { + ENHreport_conv_prob(ENH_ANALOG_INSTANCE, + (char *) here->BSIM3v1Sname, + ""); + } +/* gtri - end - wbk - report conv prob */ +#endif /* STRANGE_PATCH */ + + + ckt->CKTnoncon++; + return(OK); + } + cbs = here->BSIM3v1Scbs; + cbd = here->BSIM3v1Scbd; + cbhat = cbs + cbd + here->BSIM3v1Sgbd * delvbd + + here->BSIM3v1Sgbs * delvbs; + tol = ckt->CKTreltol * MAX(fabs(cbhat), fabs(cbs + cbd)) + + ckt->CKTabstol; + if (fabs(cbhat - (cbs + cbd)) > tol) { +#ifdef STRANGE_PATCH +/* gtri - begin - wbk - report conv prob */ + if(ckt->enh->conv_debug.report_conv_probs) { + ENHreport_conv_prob(ENH_ANALOG_INSTANCE, + (char *) here->BSIM3v1Sname, + ""); + } +/* gtri - end - wbk - report conv prob */ +#endif /* STRANGE_PATCH */ + + ckt->CKTnoncon++; + return(OK); + } + } + } + } + return(OK); +} + diff --git a/src/spicelib/devices/bsim3v1s/b3v1sdel.c b/src/spicelib/devices/bsim3v1s/b3v1sdel.c new file mode 100644 index 000000000..fe9e69f8e --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1sdel.c @@ -0,0 +1,39 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1sdel.c +**********/ +/* + */ + +#include "ngspice.h" +#include "bsim3v1sdef.h" +#include "sperror.h" +#include "gendefs.h" +#include "suffix.h" + + +int +BSIM3v1Sdelete(GENmodel *inModel, IFuid name, GENinstance **inInst) +{ +BSIM3v1Sinstance **fast = (BSIM3v1Sinstance**)inInst; +BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; +BSIM3v1Sinstance **prev = NULL; +BSIM3v1Sinstance *here; + + for (; model ; model = model->BSIM3v1SnextModel) + { prev = &(model->BSIM3v1Sinstances); + for (here = *prev; here ; here = *prev) + { if (here->BSIM3v1Sname == name || (fast && here==*fast)) + { *prev= here->BSIM3v1SnextInstance; + FREE(here); + return(OK); + } + prev = &(here->BSIM3v1SnextInstance); + } + } + return(E_NODEV); +} + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1sdest.c b/src/spicelib/devices/bsim3v1s/b3v1sdest.c new file mode 100644 index 000000000..c84f32a55 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1sdest.c @@ -0,0 +1,37 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1sdest.c +**********/ + +#include "ngspice.h" +#include "bsim3v1sdef.h" +#include "suffix.h" + +void +BSIM3v1Sdestroy(GENmodel **inModel) +{ +BSIM3v1Smodel **model = (BSIM3v1Smodel**)inModel; +BSIM3v1Sinstance *here; +BSIM3v1Sinstance *prev = NULL; +BSIM3v1Smodel *mod = *model; +BSIM3v1Smodel *oldmod = NULL; + + for (; mod ; mod = mod->BSIM3v1SnextModel) + { if(oldmod) FREE(oldmod); + oldmod = mod; + prev = (BSIM3v1Sinstance *)NULL; + for (here = mod->BSIM3v1Sinstances; here; here = here->BSIM3v1SnextInstance) + { if(prev) FREE(prev); + prev = here; + } + if(prev) FREE(prev); + } + if(oldmod) FREE(oldmod); + *model = NULL; + return; +} + + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1sgetic.c b/src/spicelib/devices/bsim3v1s/b3v1sgetic.c new file mode 100644 index 000000000..45d9d7d93 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1sgetic.c @@ -0,0 +1,45 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1getic.c +**********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v1sdef.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM3v1Sgetic(GENmodel *inModel, CKTcircuit *ckt) +{ +BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; +BSIM3v1Sinstance *here; + + for (; model ; model = model->BSIM3v1SnextModel) + { for (here = model->BSIM3v1Sinstances; here; here = here->BSIM3v1SnextInstance) + { + + if (here->BSIM3v1Sowner != ARCHme) + continue; + + if(!here->BSIM3v1SicVBSGiven) + { here->BSIM3v1SicVBS = *(ckt->CKTrhs + here->BSIM3v1SbNode) + - *(ckt->CKTrhs + here->BSIM3v1SsNode); + } + if (!here->BSIM3v1SicVDSGiven) + { here->BSIM3v1SicVDS = *(ckt->CKTrhs + here->BSIM3v1SdNode) + - *(ckt->CKTrhs + here->BSIM3v1SsNode); + } + if (!here->BSIM3v1SicVGSGiven) + { here->BSIM3v1SicVGS = *(ckt->CKTrhs + here->BSIM3v1SgNode) + - *(ckt->CKTrhs + here->BSIM3v1SsNode); + } + } + } + return(OK); +} + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1sld.c b/src/spicelib/devices/bsim3v1s/b3v1sld.c new file mode 100644 index 000000000..1e0139414 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1sld.c @@ -0,0 +1,2444 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1991 JianHui Huang and Min-Chie Jeng. +File: b3v1sld.c 1/3/92 +Modified by Mansun Chan (1995) +Modified by Paolo Nenzi 2002 +**********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v1sdef.h" +#include "trandefs.h" +#include "const.h" +#include "sperror.h" +#include "devdefs.h" +#include "suffix.h" + +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define EPSOX 3.453133e-11 +#define EPSSI 1.03594e-10 +#define Charge_q 1.60219e-19 +#define DELTA_1 0.02 +#define DELTA_2 0.02 +#define DELTA_3 0.02 +#define DELTA_4 0.02 + + +int +BSIM3v1Sload(GENmodel *inModel, CKTcircuit *ckt) +{ +BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; +BSIM3v1Sinstance *here; +double SourceSatCurrent, DrainSatCurrent; +double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst; +double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq; +double czbd, czbdsw, czbdswg, czbs, czbssw, czbsswg, evbd, evbs, arg, sarg; +double delvbd, delvbs, delvds, delvgd, delvgs; +double Vfbeff, dVfbeff_dVg, dVfbeff_dVd, dVfbeff_dVb, V3, V4; +double gcbdb, gcbgb, gcbsb, gcddb, gcdgb, gcdsb, gcgdb, gcggb, gcgsb, gcsdb; +double gcsgb, gcssb, PhiB, PhiBSW, MJ, MJSW, PhiBSWG, MJSWG; +double vbd, vbs, vds, vgb, vgd, vgs, vgdo, xfact; +double qgate=0.0, qbulk=0.0, qdrn=0.0, qsrc=0.0, cqgate=0.0, cqbulk=0.0, cqdrn=0.0; +double Vds, Vgs, Vbs, Gmbs, FwdSum, RevSum; +double Vgs_eff, Vfb, dVfb_dVb, dVfb_dVd; +double Phis, dPhis_dVb, sqrtPhis, dsqrtPhis_dVb, Vth, dVth_dVb, dVth_dVd; +double Vgst, dVgst_dVg, dVgst_dVb, dVgs_eff_dVg, Nvtm; +double n, dn_dVb, Vtm; +double ExpArg, V0; +double Denomi, dDenomi_dVg, dDenomi_dVd, dDenomi_dVb; +double ueff, dueff_dVg, dueff_dVd, dueff_dVb; +double Esat, Vdsat; +double EsatL, dEsatL_dVg, dEsatL_dVd, dEsatL_dVb; +double dVdsat_dVg, dVdsat_dVb, dVdsat_dVd, Vasat, dAlphaz_dVg, dAlphaz_dVb; +double dVasat_dVg, dVasat_dVb, dVasat_dVd, Va, dVa_dVd, dVa_dVg, dVa_dVb; +double Vbseff, dVbseff_dVb, VbseffCV, dVbseffCV_dVb; +double Arg1, One_Third_CoxWL, Two_Third_CoxWL, Alphaz, CoxWL; +double T0, dT0_dVg, dT0_dVd, dT0_dVb; +double T1, dT1_dVg, dT1_dVd, dT1_dVb; +double T2, dT2_dVg, dT2_dVd, dT2_dVb; +double T3, dT3_dVg, dT3_dVd, dT3_dVb; +double T4; +double T5; +double T6; +double T7, dT7_dVg, dT7_dVd, dT7_dVb; +double T8; +double T9; +double T10; +double T11, T12; +double tmp, Abulk, dAbulk_dVb, Abulk0, dAbulk0_dVb; +double VACLM, dVACLM_dVg, dVACLM_dVd, dVACLM_dVb; +double VADIBL, dVADIBL_dVg, dVADIBL_dVd, dVADIBL_dVb; +double Xdep, dXdep_dVb, lt1, dlt1_dVb, ltw, dltw_dVb, Delt_vth, dDelt_vth_dVb; +double Theta0, dTheta0_dVb; +double TempRatio, tmp1, tmp2, tmp3, tmp4; +double DIBL_Sft, dDIBL_Sft_dVd, Lambda, dLambda_dVg; +double tempv, a1; + +double Vgsteff, dVgsteff_dVg, dVgsteff_dVd, dVgsteff_dVb; +double Vdseff, dVdseff_dVg, dVdseff_dVd, dVdseff_dVb; +double VdseffCV, dVdseffCV_dVg, dVdseffCV_dVd, dVdseffCV_dVb; +double diffVds; +double dAbulk_dVg, dn_dVd ; +double beta, dbeta_dVg, dbeta_dVd, dbeta_dVb; +double gche, dgche_dVg, dgche_dVd, dgche_dVb; +double fgche1, dfgche1_dVg, dfgche1_dVd, dfgche1_dVb; +double fgche2, dfgche2_dVg, dfgche2_dVd, dfgche2_dVb; +double Idl, dIdl_dVg, dIdl_dVd, dIdl_dVb; +double Idsa, dIdsa_dVg, dIdsa_dVd, dIdsa_dVb; +double Ids, Gm, Gds, Gmb; +double Isub, Gbd, Gbg, Gbb; +double VASCBE, dVASCBE_dVg, dVASCBE_dVd, dVASCBE_dVb; +double CoxWovL; +double Rds, dRds_dVg, dRds_dVb, WVCox, WVCoxRds; +double Vgst2Vtm, VdsatCV, dVdsatCV_dVg, dVdsatCV_dVb; +double Leff, Weff, dWeff_dVg, dWeff_dVb; +double AbulkCV, dAbulkCV_dVb; +double qgdo, qgso, cgdo, cgso; + +double qcheq, qdef, gqdef, cqdef, cqcheq, gtau_diff, gtau_drift; +double gcqdb,gcqsb,gcqgb,gcqbb; +double dxpart, sxpart; + +double gbspsp, gbbdp, gbbsp, gbspg, gbspb, gbspdp; +double gbdpdp, gbdpg, gbdpb, gbdpsp; +double Cgg, Cgd, Cgb; +double Csg, Csd, Csb, Cbg, Cbd, Cbb; +double Cgg1, Cgb1, Cgd1, Cbg1, Cbb1, Cbd1, Qac0, Qsub0; +double dQac0_dVg, dQac0_dVd, dQac0_dVb, dQsub0_dVg, dQsub0_dVd, dQsub0_dVb; + +struct bsim3v1sSizeDependParam *pParam; +int ByPass, Check, ChargeComputationNeeded, error; + +for (; model != NULL; model = model->BSIM3v1SnextModel) +{ for (here = model->BSIM3v1Sinstances; here != NULL; + here = here->BSIM3v1SnextInstance) + { + + if (here->BSIM3v1Sowner != ARCHme) + continue; + + Check = 1; + ByPass = 0; + pParam = here->pParam; + if ((ckt->CKTmode & MODEINITSMSIG)) + { vbs = *(ckt->CKTstate0 + here->BSIM3v1Svbs); + vgs = *(ckt->CKTstate0 + here->BSIM3v1Svgs); + vds = *(ckt->CKTstate0 + here->BSIM3v1Svds); + qdef = *(ckt->CKTstate0 + here->BSIM3v1Sqcdump); + } + else if ((ckt->CKTmode & MODEINITTRAN)) + { vbs = *(ckt->CKTstate1 + here->BSIM3v1Svbs); + vgs = *(ckt->CKTstate1 + here->BSIM3v1Svgs); + vds = *(ckt->CKTstate1 + here->BSIM3v1Svds); + qdef = *(ckt->CKTstate1 + here->BSIM3v1Sqcdump); + } + else if ((ckt->CKTmode & MODEINITJCT) && !here->BSIM3v1Soff) + { vds = model->BSIM3v1Stype * here->BSIM3v1SicVDS; + vgs = model->BSIM3v1Stype * here->BSIM3v1SicVGS; + vbs = model->BSIM3v1Stype * here->BSIM3v1SicVBS; + qdef = 0.0; + + if ((vds == 0.0) && (vgs == 0.0) && (vbs == 0.0) && + ((ckt->CKTmode & (MODETRAN | MODEAC|MODEDCOP | + MODEDCTRANCURVE)) || (!(ckt->CKTmode & MODEUIC)))) + { + vgs = pParam->BSIM3v1Svth0 + 0.1; + if (here->BSIM3v1SgNode == here->BSIM3v1SdNode) + vds = vgs; + else + vds = 0.1; + if ((here->BSIM3v1SbNode != here->BSIM3v1SsNode) + && (here->BSIM3v1SbNode != here->BSIM3v1SdNode)) + vbs = -0.1; + else + vbs = 0.0; + } + } + else if ((ckt->CKTmode & (MODEINITJCT | MODEINITFIX)) && + (here->BSIM3v1Soff)) + { qdef = vbs = vgs = vds = 0.0; + } + else + { +#ifndef PREDICTOR + if ((ckt->CKTmode & MODEINITPRED)) + { xfact = ckt->CKTdelta / ckt->CKTdeltaOld[1]; + *(ckt->CKTstate0 + here->BSIM3v1Svbs) = + *(ckt->CKTstate1 + here->BSIM3v1Svbs); + vbs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v1Svbs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM3v1Svbs))); + *(ckt->CKTstate0 + here->BSIM3v1Svgs) = + *(ckt->CKTstate1 + here->BSIM3v1Svgs); + vgs = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v1Svgs)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM3v1Svgs))); + *(ckt->CKTstate0 + here->BSIM3v1Svds) = + *(ckt->CKTstate1 + here->BSIM3v1Svds); + vds = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v1Svds)) + - (xfact * (*(ckt->CKTstate2 + here->BSIM3v1Svds))); + *(ckt->CKTstate0 + here->BSIM3v1Svbd) = + *(ckt->CKTstate0 + here->BSIM3v1Svbs) + - *(ckt->CKTstate0 + here->BSIM3v1Svds); + qdef = (1.0 + xfact)* (*(ckt->CKTstate1 + here->BSIM3v1Sqcdump)) + -(xfact * (*(ckt->CKTstate2 + here->BSIM3v1Sqcdump))); + } + else + { +#endif /* PREDICTOR */ + vbs = model->BSIM3v1Stype + * (*(ckt->CKTrhsOld + here->BSIM3v1SbNode) + - *(ckt->CKTrhsOld + here->BSIM3v1SsNodePrime)); + vgs = model->BSIM3v1Stype + * (*(ckt->CKTrhsOld + here->BSIM3v1SgNode) + - *(ckt->CKTrhsOld + here->BSIM3v1SsNodePrime)); + vds = model->BSIM3v1Stype + * (*(ckt->CKTrhsOld + here->BSIM3v1SdNodePrime) + - *(ckt->CKTrhsOld + here->BSIM3v1SsNodePrime)); + qdef = *(ckt->CKTrhsOld + here->BSIM3v1SqNode); +#ifndef PREDICTOR + } +#endif /* PREDICTOR */ + + vbd = vbs - vds; + vgd = vgs - vds; + vgdo = *(ckt->CKTstate0 + here->BSIM3v1Svgs) + - *(ckt->CKTstate0 + here->BSIM3v1Svds); + delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v1Svbs); + delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v1Svbd); + delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v1Svgs); + delvds = vds - *(ckt->CKTstate0 + here->BSIM3v1Svds); + delvgd = vgd - vgdo; + + if (here->BSIM3v1Smode >= 0) + { cdhat = here->BSIM3v1Scd - here->BSIM3v1Sgbd * delvbd + + here->BSIM3v1Sgmbs * delvbs + here->BSIM3v1Sgm * delvgs + + here->BSIM3v1Sgds * delvds; + } + else + { cdhat = here->BSIM3v1Scd - (here->BSIM3v1Sgbd - here->BSIM3v1Sgmbs) + * delvbd - here->BSIM3v1Sgm * delvgd + + here->BSIM3v1Sgds * delvds; + + } + cbhat = here->BSIM3v1Scbs + here->BSIM3v1Scbd + here->BSIM3v1Sgbd + * delvbd + here->BSIM3v1Sgbs * delvbs; + + /* following should be one big if connected by && all over + * the place, but some C compilers can't handle that, so + * we split it up here to let them digest it in stages + */ + + if ((!(ckt->CKTmode & MODEINITPRED)) && (ckt->CKTbypass)) + if ((fabs(delvbs) < (ckt->CKTreltol * MAX(fabs(vbs), + fabs(*(ckt->CKTstate0+here->BSIM3v1Svbs))) + ckt->CKTvoltTol))) + if ((fabs(delvbd) < (ckt->CKTreltol * MAX(fabs(vbd), + fabs(*(ckt->CKTstate0+here->BSIM3v1Svbd))) + ckt->CKTvoltTol))) + if ((fabs(delvgs) < (ckt->CKTreltol * MAX(fabs(vgs), + fabs(*(ckt->CKTstate0+here->BSIM3v1Svgs))) + ckt->CKTvoltTol))) + if ((fabs(delvds) < (ckt->CKTreltol * MAX(fabs(vds), + fabs(*(ckt->CKTstate0+here->BSIM3v1Svds))) + ckt->CKTvoltTol))) + if ((fabs(cdhat - here->BSIM3v1Scd) < ckt->CKTreltol + * MAX(fabs(cdhat),fabs(here->BSIM3v1Scd)) + ckt->CKTabstol)) + { tempv = MAX(fabs(cbhat),fabs(here->BSIM3v1Scbs + + here->BSIM3v1Scbd)) + ckt->CKTabstol; + if ((fabs(cbhat - (here->BSIM3v1Scbs + here->BSIM3v1Scbd)) + < ckt->CKTreltol * tempv)) + { /* bypass code */ + vbs = *(ckt->CKTstate0 + here->BSIM3v1Svbs); + vbd = *(ckt->CKTstate0 + here->BSIM3v1Svbd); + vgs = *(ckt->CKTstate0 + here->BSIM3v1Svgs); + vds = *(ckt->CKTstate0 + here->BSIM3v1Svds); + qcheq = *(ckt->CKTstate0 + here->BSIM3v1Sqcheq); + + vgd = vgs - vds; + vgb = vgs - vbs; + + cdrain = here->BSIM3v1Smode * (here->BSIM3v1Scd + + here->BSIM3v1Scbd); + if ((ckt->CKTmode & (MODETRAN | MODEAC)) || + ((ckt->CKTmode & MODETRANOP) && + (ckt->CKTmode & MODEUIC))) + { ByPass = 1; + goto line755; + } + else + { goto line850; + } + } + } + + von = here->BSIM3v1Svon; + if (*(ckt->CKTstate0 + here->BSIM3v1Svds) >= 0.0) + { vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3v1Svgs), von); + vds = vgs - vgd; + vds = DEVlimvds(vds, *(ckt->CKTstate0 + here->BSIM3v1Svds)); + vgd = vgs - vds; + + } + else + { vgd = DEVfetlim(vgd, vgdo, von); + vds = vgs - vgd; + vds = -DEVlimvds(-vds, -(*(ckt->CKTstate0+here->BSIM3v1Svds))); + vgs = vgd + vds; + } + + if (vds >= 0.0) + { vbs = DEVpnjlim(vbs, *(ckt->CKTstate0 + here->BSIM3v1Svbs), + CONSTvt0, model->BSIM3v1Svcrit, &Check); + vbd = vbs - vds; + + } + else + { vbd = DEVpnjlim(vbd, *(ckt->CKTstate0 + here->BSIM3v1Svbd), + CONSTvt0, model->BSIM3v1Svcrit, &Check); + vbs = vbd + vds; + } + } + + /* determine DC current and derivatives */ + vbd = vbs - vds; + vgd = vgs - vds; + vgb = vgs - vbs; +/* the following code has been changed for the calculation of S/B and D/B diodes*/ + + if ((here->BSIM3v1SsourceArea <= 0.0) && + (here->BSIM3v1SsourcePerimeter <= 0.0)) + { SourceSatCurrent = 1.0e-14; + } + else + { SourceSatCurrent = here->BSIM3v1SsourceArea + * model->BSIM3v1SjctTempSatCurDensity + + here->BSIM3v1SsourcePerimeter + * model->BSIM3v1SjctSidewallTempSatCurDensity; + } + + Nvtm = model->BSIM3v1Svtm * model->BSIM3v1SjctEmissionCoeff; + if (SourceSatCurrent <= 0.0) + { here->BSIM3v1Sgbs = ckt->CKTgmin; + here->BSIM3v1Scbs = here->BSIM3v1Sgbs * vbs; + } + else if (vbs < 0.5) + { evbs = exp(vbs / Nvtm); + here->BSIM3v1Sgbs = SourceSatCurrent * evbs / Nvtm + ckt->CKTgmin; + here->BSIM3v1Scbs = SourceSatCurrent * (evbs - 1.0) + + ckt->CKTgmin * vbs; + } + else + { evbs = exp(0.5 / Nvtm); + T0 = SourceSatCurrent * evbs / Nvtm; + here->BSIM3v1Sgbs = T0 + ckt->CKTgmin; + here->BSIM3v1Scbs = SourceSatCurrent * (evbs - 1.0) + + T0 * (vbs - 0.5) + ckt->CKTgmin * vbs; + } + + if ((here->BSIM3v1SdrainArea <= 0.0) && + (here->BSIM3v1SdrainPerimeter <= 0.0)) + { DrainSatCurrent = 1.0e-14; + } + else + { DrainSatCurrent = here->BSIM3v1SdrainArea + * model->BSIM3v1SjctTempSatCurDensity + + here->BSIM3v1SdrainPerimeter + * model->BSIM3v1SjctSidewallTempSatCurDensity; + } + + if (DrainSatCurrent <= 0.0) + { here->BSIM3v1Sgbd = ckt->CKTgmin; + here->BSIM3v1Scbd = here->BSIM3v1Sgbd * vbd; + } + else if (vbd < 0.5) + { evbd = exp(vbd / Nvtm); + here->BSIM3v1Sgbd = DrainSatCurrent * evbd / Nvtm + ckt->CKTgmin; + here->BSIM3v1Scbd = DrainSatCurrent * (evbd - 1.0) + + ckt->CKTgmin * vbd; + } + else + { evbd = exp(0.5 / Nvtm); + T0 = DrainSatCurrent * evbd / Nvtm; + here->BSIM3v1Sgbd = T0 + ckt->CKTgmin; + here->BSIM3v1Scbd = DrainSatCurrent * (evbd - 1.0) + + T0 * (vbd - 0.5) + ckt->CKTgmin * vbd; + } +/* S/B and D/B diodes code change ends */ + + if (vds >= 0.0) + { /* normal mode */ + here->BSIM3v1Smode = 1; + Vds = vds; + Vgs = vgs; + Vbs = vbs; + } + else + { /* inverse mode */ + here->BSIM3v1Smode = -1; + Vds = -vds; + Vgs = vgd; + Vbs = vbd; + } + + ChargeComputationNeeded = + ((ckt->CKTmode & (MODEAC | MODETRAN | MODEINITSMSIG)) || + ((ckt->CKTmode & MODETRANOP) && (ckt->CKTmode & MODEUIC))) + ? 1 : 0; + T0 = Vbs - pParam->BSIM3v1Svbsc - 0.001; + T1 = sqrt(T0 * T0 - 0.004 * pParam->BSIM3v1Svbsc); + Vbseff = pParam->BSIM3v1Svbsc + 0.5 * (T0 + T1); + dVbseff_dVb = 0.5 * (1.0 + T0 / T1); + if (Vbseff < Vbs) + { Vbseff = Vbs; + } /* Added to avoid the possible numerical problems due to computer accuracy. See comments for diffVds */ + + if (Vbseff > 0.0) + { T0 = pParam->BSIM3v1Sphi / (pParam->BSIM3v1Sphi + Vbseff); + Phis = pParam->BSIM3v1Sphi * T0; + dPhis_dVb = -T0 * T0; + sqrtPhis = pParam->BSIM3v1Sphis3 / (pParam->BSIM3v1Sphi + 0.5 * Vbseff); + dsqrtPhis_dVb = -0.5 * sqrtPhis * sqrtPhis / pParam->BSIM3v1Sphis3; + } + else + { Phis = pParam->BSIM3v1Sphi - Vbseff; + dPhis_dVb = -1.0; + sqrtPhis = sqrt(Phis); + dsqrtPhis_dVb = -0.5 / sqrtPhis; + } + Xdep = pParam->BSIM3v1SXdep0 * sqrtPhis / pParam->BSIM3v1SsqrtPhi; + dXdep_dVb = (pParam->BSIM3v1SXdep0 / pParam->BSIM3v1SsqrtPhi) + * dsqrtPhis_dVb; + + Leff = pParam->BSIM3v1Sleff; + Vtm = model->BSIM3v1Svtm; +/* Vth Calculation */ + T3 = sqrt(Xdep); + V0 = pParam->BSIM3v1Svbi - pParam->BSIM3v1Sphi; + + T0 = pParam->BSIM3v1Sdvt2 * Vbseff; + if (T0 >= - 0.5) + { T1 = 1.0 + T0; + T2 = pParam->BSIM3v1Sdvt2; + } + else /* Added to avoid any discontinuity problems caused by dvt2 */ + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM3v1Sdvt2 * T4 * T4; + } + lt1 = model->BSIM3v1Sfactor1 * T3 * T1; + dlt1_dVb = model->BSIM3v1Sfactor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); + + T0 = pParam->BSIM3v1Sdvt2w * Vbseff; + if (T0 >= - 0.5) + { T1 = 1.0 + T0; + T2 = pParam->BSIM3v1Sdvt2w; + } + else /* Added to avoid any discontinuity problems caused by dvt2w */ + { T4 = 1.0 / (3.0 + 8.0 * T0); + T1 = (1.0 + 3.0 * T0) * T4; + T2 = pParam->BSIM3v1Sdvt2w * T4 * T4; + } + ltw = model->BSIM3v1Sfactor1 * T3 * T1; + dltw_dVb = model->BSIM3v1Sfactor1 * (0.5 / T3 * T1 * dXdep_dVb + T3 * T2); + + T0 = -0.5 * pParam->BSIM3v1Sdvt1 * Leff / lt1; + if (T0 > -EXP_THRESHOLD) + { T1 = exp(T0); + Theta0 = T1 * (1.0 + 2.0 * T1); + dT1_dVb = -T0 / lt1 * T1 * dlt1_dVb; + dTheta0_dVb = (1.0 + 4.0 * T1) * dT1_dVb; + } + else + { T1 = MIN_EXP; + Theta0 = T1 * (1.0 + 2.0 * T1); + dTheta0_dVb = 0.0; + } + + here->BSIM3v1Sthetavth = pParam->BSIM3v1Sdvt0 * Theta0; + Delt_vth = here->BSIM3v1Sthetavth * V0; + dDelt_vth_dVb = pParam->BSIM3v1Sdvt0 * dTheta0_dVb * V0; + + T0 = -0.5 * pParam->BSIM3v1Sdvt1w * pParam->BSIM3v1Sweff * Leff / ltw; + if (T0 > -EXP_THRESHOLD) + { T1 = exp(T0); + T2 = T1 * (1.0 + 2.0 * T1); + dT1_dVb = -T0 / ltw * T1 * dltw_dVb; + dT2_dVb = (1.0 + 4.0 * T1) * dT1_dVb; + } + else + { T1 = MIN_EXP; + T2 = T1 * (1.0 + 2.0 * T1); + dT2_dVb = 0.0; + } + + T0 = pParam->BSIM3v1Sdvt0w * T2; + T2 = T0 * V0; + dT2_dVb = pParam->BSIM3v1Sdvt0w * dT2_dVb * V0; + + TempRatio = ckt->CKTtemp / model->BSIM3v1Stnom - 1.0; + T0 = sqrt(1.0 + pParam->BSIM3v1Snlx / Leff); + T1 = pParam->BSIM3v1Sk1 * (T0 - 1.0) * pParam->BSIM3v1SsqrtPhi + + (pParam->BSIM3v1Skt1 + pParam->BSIM3v1Skt1l / Leff + + pParam->BSIM3v1Skt2 * Vbseff) * TempRatio; + tmp2 = model->BSIM3v1Stox * pParam->BSIM3v1Sphi + / (pParam->BSIM3v1Sweff + pParam->BSIM3v1Sw0); + + T3 = pParam->BSIM3v1Seta0 + pParam->BSIM3v1Setab * Vbseff; + if (T3 < 1.0e-4) /* avoid discontinuity problems caused by etab */ + { T9 = 1.0 / (3.0 - 2.0e4 * T3); + T3 = (2.0e-4 - T3) * T9; + T4 = T9 * T9; + } + else + { T4 = 1.0; + } + dDIBL_Sft_dVd = T3 * pParam->BSIM3v1Stheta0vb0; + DIBL_Sft = dDIBL_Sft_dVd * Vds; + + Vth = model->BSIM3v1Stype * pParam->BSIM3v1Svth0 + pParam->BSIM3v1Sk1 + * (sqrtPhis - pParam->BSIM3v1SsqrtPhi) - pParam->BSIM3v1Sk2 + * Vbseff - Delt_vth - T2 + (pParam->BSIM3v1Sk3 + pParam->BSIM3v1Sk3b + * Vbseff) * tmp2 + T1 - DIBL_Sft; + + here->BSIM3v1Svon = Vth; + + dVth_dVb = pParam->BSIM3v1Sk1 * dsqrtPhis_dVb - pParam->BSIM3v1Sk2 + - dDelt_vth_dVb - dT2_dVb + pParam->BSIM3v1Sk3b * tmp2 + - pParam->BSIM3v1Setab * Vds * pParam->BSIM3v1Stheta0vb0 * T4 + + pParam->BSIM3v1Skt2 * TempRatio; + dVth_dVd = -dDIBL_Sft_dVd; + +/* Calculate n */ + tmp2 = pParam->BSIM3v1Snfactor * EPSSI / Xdep; + tmp3 = pParam->BSIM3v1Scdsc + pParam->BSIM3v1Scdscb * Vbseff + + pParam->BSIM3v1Scdscd * Vds; + tmp4 = (tmp2 + tmp3 * Theta0 + pParam->BSIM3v1Scit) / model->BSIM3v1Scox; + if (tmp4 >= -0.5) + { n = 1.0 + tmp4; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + + pParam->BSIM3v1Scdscb * Theta0) / model->BSIM3v1Scox; + dn_dVd = pParam->BSIM3v1Scdscd * Theta0 / model->BSIM3v1Scox; + } + else + /* avoid discontinuity problems caused by tmp4 */ + { T0 = 1.0 / (3.0 + 8.0 * tmp4); + n = (1.0 + 3.0 * tmp4) * T0; + T0 *= T0; + dn_dVb = (-tmp2 / Xdep * dXdep_dVb + tmp3 * dTheta0_dVb + + pParam->BSIM3v1Scdscb * Theta0) / model->BSIM3v1Scox * T0; + dn_dVd = pParam->BSIM3v1Scdscd * Theta0 / model->BSIM3v1Scox * T0; + } + +/* Poly Gate Si Depletion Effect */ + T0 = pParam->BSIM3v1Svfb + pParam->BSIM3v1Sphi; + if ((pParam->BSIM3v1Sngate > 1.e18) && (pParam->BSIM3v1Sngate < 1.e25) + && (Vgs > T0)) + /* added to avoid the problem caused by ngate */ + { T1 = 1.0e6 * Charge_q * EPSSI * pParam->BSIM3v1Sngate + / (model->BSIM3v1Scox * model->BSIM3v1Scox); + T4 = sqrt(1.0 + 2.0 * (Vgs - T0) / T1); + T2 = T1 * (T4 - 1.0); + T3 = 0.5 * T2 * T2 / T1; /* T3 = Vpoly */ + T7 = 1.12 - T3 - 0.05; + T6 = sqrt(T7 * T7 + 0.224); + T5 = 1.12 - 0.5 * (T7 + T6); + Vgs_eff = Vgs - T5; + dVgs_eff_dVg = 1.0 - (0.5 - 0.5 / T4) * (1.0 + T7 / T6); + } + else + { Vgs_eff = Vgs; + dVgs_eff_dVg = 1.0; + } + Vgst = Vgs_eff - Vth; + +/* Effective Vgst (Vgsteff) Calculation */ + + T10 = 2.0 * n * Vtm; + VgstNVt = Vgst / T10; + ExpArg = (2.0 * pParam->BSIM3v1Svoff - Vgst) / T10; + + /* MCJ: Very small Vgst */ + if (VgstNVt > EXP_THRESHOLD) + { Vgsteff = Vgst; + dVgsteff_dVg = dVgs_eff_dVg; + dVgsteff_dVd = -dVth_dVd; + dVgsteff_dVb = -dVth_dVb; + } + else if (ExpArg > EXP_THRESHOLD) + { T0 = (Vgst - pParam->BSIM3v1Svoff) / (n * Vtm); + ExpVgst = exp(T0); + Vgsteff = Vtm * pParam->BSIM3v1Scdep0 / model->BSIM3v1Scox * ExpVgst; + dVgsteff_dVg = Vgsteff / (n * Vtm); + dVgsteff_dVd = -dVgsteff_dVg * (dVth_dVd + T0 * Vtm * dn_dVd); + dVgsteff_dVb = -dVgsteff_dVg * (dVth_dVb + T0 * Vtm * dn_dVb); + dVgsteff_dVg *= dVgs_eff_dVg; + } + else + { ExpVgst = exp(VgstNVt); + T1 = T10 * log(1.0 + ExpVgst); + dT1_dVg = ExpVgst / (1.0 + ExpVgst); + dT1_dVb = -dT1_dVg * (dVth_dVb + Vgst / n * dn_dVb) + + T1 / n * dn_dVb; + dT1_dVd = -dT1_dVg * (dVth_dVd + Vgst / n * dn_dVd) + + T1 / n * dn_dVd; + + dT2_dVg = -model->BSIM3v1Scox / (Vtm * pParam->BSIM3v1Scdep0) + * exp(ExpArg); + T2 = 1.0 - T10 * dT2_dVg; + dT2_dVd = -dT2_dVg * (dVth_dVd - 2.0 * Vtm * ExpArg * dn_dVd) + + (T2 - 1.0) / n * dn_dVd; + dT2_dVb = -dT2_dVg * (dVth_dVb - 2.0 * Vtm * ExpArg * dn_dVb) + + (T2 - 1.0) / n * dn_dVb; + + Vgsteff = T1 / T2; + T3 = T2 * T2; + dVgsteff_dVg = (T2 * dT1_dVg - T1 * dT2_dVg) / T3 * dVgs_eff_dVg; + dVgsteff_dVd = (T2 * dT1_dVd - T1 * dT2_dVd) / T3; + dVgsteff_dVb = (T2 * dT1_dVb - T1 * dT2_dVb) / T3; + } + +/* Calculate Effective Channel Geometry */ + T9 = sqrtPhis - pParam->BSIM3v1SsqrtPhi; + Weff = pParam->BSIM3v1Sweff - 2.0 * (pParam->BSIM3v1Sdwg * Vgsteff + + pParam->BSIM3v1Sdwb * T9); + dWeff_dVg = -2.0 * pParam->BSIM3v1Sdwg; + dWeff_dVb = -2.0 * pParam->BSIM3v1Sdwb * dsqrtPhis_dVb; + + if (Weff < 2.0e-8) /* to avoid the discontinuity problem due to Weff*/ + { T0 = 1.0 / (6.0e-8 - 2.0 * Weff); + Weff = 2.0e-8 * (4.0e-8 - Weff) * T0; + T0 *= T0 * 4.0e-16; + dWeff_dVg *= T0; + dWeff_dVb *= T0; + } + + T0 = pParam->BSIM3v1Sprwg * Vgsteff + pParam->BSIM3v1Sprwb * T9; + if (T0 >= -0.9) + { Rds = pParam->BSIM3v1Srds0 * (1.0 + T0); + dRds_dVg = pParam->BSIM3v1Srds0 * pParam->BSIM3v1Sprwg; + dRds_dVb = pParam->BSIM3v1Srds0 * pParam->BSIM3v1Sprwb * dsqrtPhis_dVb; + } + else + /* to avoid the discontinuity problem due to prwg and prwb*/ + { T1 = 1.0 / (17.0 + 20.0 * T0); + Rds = pParam->BSIM3v1Srds0 * (0.8 + T0) * T1; + T1 *= T1; + dRds_dVg = pParam->BSIM3v1Srds0 * pParam->BSIM3v1Sprwg * T1; + dRds_dVb = pParam->BSIM3v1Srds0 * pParam->BSIM3v1Sprwb * dsqrtPhis_dVb + * T1; + } + +/* Calculate Abulk */ + T1 = 0.5 * pParam->BSIM3v1Sk1 / sqrtPhis; + dT1_dVb = -T1 / sqrtPhis * dsqrtPhis_dVb; + + T9 = sqrt(pParam->BSIM3v1Sxj * Xdep); + tmp1 = Leff + 2.0 * T9; + T5 = Leff / tmp1; + tmp2 = pParam->BSIM3v1Sa0 * T5; + tmp3 = pParam->BSIM3v1Sweff + pParam->BSIM3v1Sb1; + tmp4 = pParam->BSIM3v1Sb0 / tmp3; + T2 = tmp2 + tmp4; + dT2_dVb = -T9 / tmp1 / Xdep * dXdep_dVb; + T6 = T5 * T5; + T7 = T5 * T6; + + Abulk0 = 1.0 + T1 * T2; + dAbulk0_dVb = T1 * tmp2 * dT2_dVb + T2 * dT1_dVb; + + T8 = pParam->BSIM3v1Sags * pParam->BSIM3v1Sa0 * T7; + dAbulk_dVg = -T1 * T8; + Abulk = Abulk0 + dAbulk_dVg * Vgsteff; + dAbulk_dVb = dAbulk0_dVb - T8 * Vgsteff * (dT1_dVb + + 3.0 * T1 * dT2_dVb); + + if (Abulk0 < 0.1) /* added to avoid the problems caused by Abulk0 */ + { T9 = 1.0 / (3.0 - 20.0 * Abulk0); + Abulk0 = (0.2 - Abulk0) * T9; + dAbulk0_dVb *= T9 * T9; + } + + if (Abulk < 0.1) + /* added to avoid the problems caused by Abulk */ + { T9 = 1.0 / (3.0 - 20.0 * Abulk); + Abulk = (0.2 - Abulk) * T9; + dAbulk_dVb *= T9 * T9; + } + + T2 = pParam->BSIM3v1Sketa * Vbseff; + if (T2 >= -0.9) + { T0 = 1.0 / (1.0 + T2); + dT0_dVb = -pParam->BSIM3v1Sketa * T0 * T0; + } + else + /* added to avoid the problems caused by Keta */ + { T1 = 1.0 / (0.8 + T2); + T0 = (17.0 + 20.0 * T2) * T1; + dT0_dVb = -pParam->BSIM3v1Sketa * T1 * T1; + } + dAbulk_dVg *= T0; + dAbulk_dVb = dAbulk_dVb * T0 + Abulk * dT0_dVb; + dAbulk0_dVb = dAbulk0_dVb * T0 + Abulk0 * dT0_dVb; + Abulk *= T0; + Abulk0 *= T0; + + +/* Mobility calculation */ + if (model->BSIM3v1SmobMod == 1) + { T0 = Vgsteff + Vth + Vth; + T2 = pParam->BSIM3v1Sua + pParam->BSIM3v1Suc * Vbseff; + T3 = T0 / model->BSIM3v1Stox; + T5 = T3 * (T2 + pParam->BSIM3v1Sub * T3); + dDenomi_dVg = (T2 + 2.0 * pParam->BSIM3v1Sub * T3) / model->BSIM3v1Stox; + dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; + dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM3v1Suc * T3; + } + else if (model->BSIM3v1SmobMod == 2) + { T5 = Vgsteff / model->BSIM3v1Stox * (pParam->BSIM3v1Sua + + pParam->BSIM3v1Suc * Vbseff + pParam->BSIM3v1Sub * Vgsteff + / model->BSIM3v1Stox); + dDenomi_dVg = (pParam->BSIM3v1Sua + pParam->BSIM3v1Suc * Vbseff + + 2.0 * pParam->BSIM3v1Sub * Vgsteff / model->BSIM3v1Stox) + / model->BSIM3v1Stox; + dDenomi_dVd = 0.0; + dDenomi_dVb = Vgsteff * pParam->BSIM3v1Suc / model->BSIM3v1Stox; + } + else + { T0 = Vgsteff + Vth + Vth; + T2 = 1.0 + pParam->BSIM3v1Suc * Vbseff; + T3 = T0 / model->BSIM3v1Stox; + T4 = T3 * (pParam->BSIM3v1Sua + pParam->BSIM3v1Sub * T3); + T5 = T4 * T2; + dDenomi_dVg = (pParam->BSIM3v1Sua + 2.0 * pParam->BSIM3v1Sub * T3) * T2 + / model->BSIM3v1Stox; + dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd; + dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM3v1Suc * T4; + } + + if (T5 >= -0.8) + { Denomi = 1.0 + T5; + } + else /* Added to avoid the discontinuity problem caused by ua and ub*/ + { T9 = 1.0 / (7.0 + 10.0 * T5); + Denomi = (0.6 + T5) * T9; + T9 *= T9; + dDenomi_dVg *= T9; + dDenomi_dVd *= T9; + dDenomi_dVb *= T9; + } + + here->BSIM3v1Sueff = ueff = pParam->BSIM3v1Su0temp / Denomi; + T9 = -ueff / Denomi; + dueff_dVg = T9 * dDenomi_dVg; + dueff_dVd = T9 * dDenomi_dVd; + dueff_dVb = T9 * dDenomi_dVb; + +/* Saturation Drain Voltage Vdsat */ + WVCox = Weff * pParam->BSIM3v1Svsattemp * model->BSIM3v1Scox; + WVCoxRds = WVCox * Rds; + + Esat = 2.0 * pParam->BSIM3v1Svsattemp / ueff; + EsatL = Esat * Leff; + T0 = -EsatL /ueff; + dEsatL_dVg = T0 * dueff_dVg; + dEsatL_dVd = T0 * dueff_dVd; + dEsatL_dVb = T0 * dueff_dVb; + + /* Sqrt() */ + a1 = pParam->BSIM3v1Sa1; + if (a1 == 0.0) + { Lambda = pParam->BSIM3v1Sa2; + dLambda_dVg = 0.0; + } + else if (a1 > 0.0) +/* Added to avoid the discontinuity problem + caused by a1 and a2 (Lambda) */ + { T0 = 1.0 - pParam->BSIM3v1Sa2; + T1 = T0 - pParam->BSIM3v1Sa1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * T0); + Lambda = pParam->BSIM3v1Sa2 + T0 - 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM3v1Sa1 * (1.0 + T1 / T2); + } + else + { T1 = pParam->BSIM3v1Sa2 + pParam->BSIM3v1Sa1 * Vgsteff - 0.0001; + T2 = sqrt(T1 * T1 + 0.0004 * pParam->BSIM3v1Sa2); + Lambda = 0.5 * (T1 + T2); + dLambda_dVg = 0.5 * pParam->BSIM3v1Sa1 * (1.0 + T1 / T2); + } + + Vgst2Vtm = Vgsteff + 2.0 * Vtm; + if (Rds > 0) + { tmp2 = dRds_dVg / Rds + dWeff_dVg / Weff; + tmp3 = dRds_dVb / Rds + dWeff_dVb / Weff; + } + else + { tmp2 = dWeff_dVg / Weff; + tmp3 = dWeff_dVb / Weff; + } + if ((Rds == 0.0) && (Lambda == 1.0)) + { T0 = 1.0 / (Abulk * EsatL + Vgst2Vtm); + tmp1 = 0.0; + T1 = T0 * T0; + T2 = Vgst2Vtm * T0; + T3 = EsatL * Vgst2Vtm; + Vdsat = T3 * T0; + + dT0_dVg = -(Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 1.0) * T1; + dT0_dVd = -(Abulk * dEsatL_dVd) * T1; + dT0_dVb = -(Abulk * dEsatL_dVb + dAbulk_dVb * EsatL) * T1; + + dVdsat_dVg = T3 * dT0_dVg + T2 * dEsatL_dVg + EsatL * T0; + dVdsat_dVd = T3 * dT0_dVd + T2 * dEsatL_dVd; + dVdsat_dVb = T3 * dT0_dVb + T2 * dEsatL_dVb; + } + else + { tmp1 = dLambda_dVg / (Lambda * Lambda); + T9 = Abulk * WVCoxRds; + T8 = Abulk * T9; + T7 = Vgst2Vtm * T9; + T6 = Vgst2Vtm * WVCoxRds; + T0 = 2.0 * Abulk * (T9 - 1.0 + 1.0 / Lambda); + dT0_dVg = 2.0 * (T8 * tmp2 - Abulk * tmp1 + + (2.0 * T9 + 1.0 / Lambda - 1.0) * dAbulk_dVg); + + dT0_dVb = 2.0 * (T8 * (2.0 / Abulk * dAbulk_dVb + tmp3) + + (1.0 / Lambda - 1.0) * dAbulk_dVb); + dT0_dVd = 0.0; + T1 = Vgst2Vtm * (2.0 / Lambda - 1.0) + Abulk * EsatL + 3.0 * T7; + + dT1_dVg = (2.0 / Lambda - 1.0) - 2.0 * Vgst2Vtm * tmp1 + + Abulk * dEsatL_dVg + EsatL * dAbulk_dVg + 3.0 * (T9 + + T7 * tmp2 + T6 * dAbulk_dVg); + dT1_dVb = Abulk * dEsatL_dVb + EsatL * dAbulk_dVb + + 3.0 * (T6 * dAbulk_dVb + T7 * tmp3); + dT1_dVd = Abulk * dEsatL_dVd; + + T2 = Vgst2Vtm * (EsatL + 2.0 * T6); + dT2_dVg = EsatL + Vgst2Vtm * dEsatL_dVg + + T6 * (4.0 + 2.0 * Vgst2Vtm * tmp2); + dT2_dVb = Vgst2Vtm * (dEsatL_dVb + 2.0 * T6 * tmp3); + dT2_dVd = Vgst2Vtm * dEsatL_dVd; + + T3 = sqrt(T1 * T1 - 2.0 * T0 * T2); + Vdsat = (T1 - T3) / T0; + + dT3_dVg = (T1 * dT1_dVg - 2.0 * (T0 * dT2_dVg + T2 * dT0_dVg)) + / T3; + dT3_dVd = (T1 * dT1_dVd - 2.0 * (T0 * dT2_dVd + T2 * dT0_dVd)) + / T3; + dT3_dVb = (T1 * dT1_dVb - 2.0 * (T0 * dT2_dVb + T2 * dT0_dVb)) + / T3; + + dVdsat_dVg = (dT1_dVg - (T1 * dT1_dVg - dT0_dVg * T2 + - T0 * dT2_dVg) / T3 - Vdsat * dT0_dVg) / T0; + dVdsat_dVb = (dT1_dVb - (T1 * dT1_dVb - dT0_dVb * T2 + - T0 * dT2_dVb) / T3 - Vdsat * dT0_dVb) / T0; + dVdsat_dVd = (dT1_dVd - (T1 * dT1_dVd - T0 * dT2_dVd) / T3) / T0; + } + here->BSIM3v1Svdsat = Vdsat; + +/* Effective Vds (Vdseff) Calculation */ + T1 = Vdsat - Vds - pParam->BSIM3v1Sdelta; + dT1_dVg = dVdsat_dVg; + dT1_dVd = dVdsat_dVd - 1.0; + dT1_dVb = dVdsat_dVb; + + T2 = sqrt(T1 * T1 + 4.0 * pParam->BSIM3v1Sdelta * Vdsat); + T0 = T1 / T2; + T3 = 2.0 * pParam->BSIM3v1Sdelta / T2; + dT2_dVg = T0 * dT1_dVg + T3 * dVdsat_dVg; + dT2_dVd = T0 * dT1_dVd + T3 * dVdsat_dVd; + dT2_dVb = T0 * dT1_dVb + T3 * dVdsat_dVb; + + Vdseff = Vdsat - 0.5 * (T1 + T2); + dVdseff_dVg = dVdsat_dVg - 0.5 * (dT1_dVg + dT2_dVg); + dVdseff_dVd = dVdsat_dVd - 0.5 * (dT1_dVd + dT2_dVd); + dVdseff_dVb = dVdsat_dVb - 0.5 * (dT1_dVb + dT2_dVb); + +/* Calculate VAsat */ + tmp4 = 1.0 - 0.5 * Abulk * Vdsat / Vgst2Vtm; + T9 = WVCoxRds * Vgsteff; + T8 = T9 / Vgst2Vtm; + T0 = EsatL + Vdsat + 2.0 * T9 * tmp4; + + T7 = 2.0 * WVCoxRds * tmp4; + dT0_dVg = dEsatL_dVg + dVdsat_dVg + T7 * (1.0 + tmp2 * Vgsteff) + - T8 * (Abulk * dVdsat_dVg - Abulk * Vdsat / Vgst2Vtm + + Vdsat * dAbulk_dVg); + + dT0_dVb = dEsatL_dVb + dVdsat_dVb + T7 * tmp3 * Vgsteff + - T8 * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + dT0_dVd = dEsatL_dVd + dVdsat_dVd - T8 * Abulk * dVdsat_dVd; + + T9 = WVCoxRds * Abulk; + T1 = 2.0 / Lambda - 1.0 + T9; + dT1_dVg = -2.0 * tmp1 + WVCoxRds * (Abulk * tmp2 + dAbulk_dVg); + dT1_dVb = dAbulk_dVb * WVCoxRds + T9 * tmp3; + + Vasat = T0 / T1; + dVasat_dVg = (dT0_dVg - Vasat * dT1_dVg) / T1; + dVasat_dVb = (dT0_dVb - Vasat * dT1_dVb) / T1; + dVasat_dVd = dT0_dVd / T1; + + if (Vdseff > Vds) + Vdseff = Vds; /* This code is added to fixed the problem + caused by computer precision when + Vds is very close to Vdseff. */ + diffVds = Vds - Vdseff; +/* Calculate VACLM */ + if ((pParam->BSIM3v1Spclm > 0.0) && (diffVds > 1.0e-10)) + { T0 = 1.0 / (pParam->BSIM3v1Spclm * Abulk * pParam->BSIM3v1Slitl); + dT0_dVb = -T0 / Abulk * dAbulk_dVb; + dT0_dVg = -T0 / Abulk * dAbulk_dVg; + + T2 = Vgsteff / EsatL; + T1 = Leff * (Abulk + T2); + dT1_dVg = Leff * ((1.0 - T2 * dEsatL_dVg) / EsatL + dAbulk_dVg); + dT1_dVb = Leff * (dAbulk_dVb - T2 * dEsatL_dVb / EsatL); + dT1_dVd = -T2 * dEsatL_dVd / Esat; + + T9 = T0 * T1; + VACLM = T9 * diffVds; + dVACLM_dVg = T0 * dT1_dVg * diffVds - T9 * dVdseff_dVg + + T1 * diffVds * dT0_dVg; + dVACLM_dVb = (dT0_dVb * T1 + T0 * dT1_dVb) * diffVds + - T9 * dVdseff_dVb; + dVACLM_dVd = T0 * dT1_dVd * diffVds + T9 * (1.0 - dVdseff_dVd); + } + else + { VACLM = MAX_EXP; + dVACLM_dVd = dVACLM_dVg = dVACLM_dVb = 0.0; + } + +/* Calculate VADIBL */ + if (pParam->BSIM3v1SthetaRout > 0.0) + { T8 = Abulk * Vdsat; + T0 = Vgst2Vtm * T8; + dT0_dVg = Vgst2Vtm * Abulk * dVdsat_dVg + T8 + + Vgst2Vtm * Vdsat * dAbulk_dVg; + dT0_dVb = Vgst2Vtm * (dAbulk_dVb * Vdsat + Abulk * dVdsat_dVb); + dT0_dVd = Vgst2Vtm * Abulk * dVdsat_dVd; + + T1 = Vgst2Vtm + T8; + dT1_dVg = 1.0 + Abulk * dVdsat_dVg + Vdsat * dAbulk_dVg; + dT1_dVb = Abulk * dVdsat_dVb + dAbulk_dVb * Vdsat; + dT1_dVd = Abulk * dVdsat_dVd; + + T9 = T1 * T1; + T2 = pParam->BSIM3v1SthetaRout; + VADIBL = (Vgst2Vtm - T0 / T1) / T2; + dVADIBL_dVg = (1.0 - dT0_dVg / T1 + T0 * dT1_dVg / T9) / T2; + dVADIBL_dVb = (-dT0_dVb / T1 + T0 * dT1_dVb / T9) / T2; + dVADIBL_dVd = (-dT0_dVd / T1 + T0 * dT1_dVd / T9) / T2; + + T7 = pParam->BSIM3v1Spdiblb * Vbseff; + if (T7 >= -0.9) + { T3 = 1.0 / (1.0 + T7); + VADIBL *= T3; + dVADIBL_dVg *= T3; + dVADIBL_dVb = (dVADIBL_dVb - VADIBL * pParam->BSIM3v1Spdiblb) + * T3; + dVADIBL_dVd *= T3; + } + else +/* Added to avoid the discontinuity problem caused by pdiblcb */ + { T4 = 1.0 / (0.8 + T7); + T3 = (17.0 + 20.0 * T7) * T4; + dVADIBL_dVg *= T3; + dVADIBL_dVb = dVADIBL_dVb * T3 + - VADIBL * pParam->BSIM3v1Spdiblb * T4 * T4; + dVADIBL_dVd *= T3; + VADIBL *= T3; + } + } + else + { VADIBL = MAX_EXP; + dVADIBL_dVd = dVADIBL_dVg = dVADIBL_dVb = 0.0; + } + +/* Calculate VA */ + + T8 = pParam->BSIM3v1Spvag / EsatL; + T9 = T8 * Vgsteff; + if (T9 > -0.9) + { T0 = 1.0 + T9; + dT0_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL); + dT0_dVb = -T9 * dEsatL_dVb / EsatL; + dT0_dVd = -T9 * dEsatL_dVd / EsatL; + } + else /* Added to avoid the discontinuity problems caused by pvag */ + { T1 = 1.0 / (17.0 + 20.0 * T9); + T0 = (0.8 + T9) * T1; + T1 *= T1; + dT0_dVg = T8 * (1.0 - Vgsteff * dEsatL_dVg / EsatL) * T1; + + T9 *= T1 / EsatL; + dT0_dVb = -T9 * dEsatL_dVb; + dT0_dVd = -T9 * dEsatL_dVd; + } + + tmp1 = VACLM * VACLM; + tmp2 = VADIBL * VADIBL; + tmp3 = VACLM + VADIBL; + + T1 = VACLM * VADIBL / tmp3; + tmp3 *= tmp3; + dT1_dVg = (tmp1 * dVADIBL_dVg + tmp2 * dVACLM_dVg) / tmp3; + dT1_dVd = (tmp1 * dVADIBL_dVd + tmp2 * dVACLM_dVd) / tmp3; + dT1_dVb = (tmp1 * dVADIBL_dVb + tmp2 * dVACLM_dVb) / tmp3; + + Va = Vasat + T0 * T1; + dVa_dVg = dVasat_dVg + T1 * dT0_dVg + T0 * dT1_dVg; + dVa_dVd = dVasat_dVd + T1 * dT0_dVd + T0 * dT1_dVd; + dVa_dVb = dVasat_dVb + T1 * dT0_dVb + T0 * dT1_dVb; + +/* Calculate VASCBE */ + if (pParam->BSIM3v1Spscbe2 > 0.0) + { if (diffVds > pParam->BSIM3v1Spscbe1 * pParam->BSIM3v1Slitl + / EXP_THRESHOLD) + { T0 = pParam->BSIM3v1Spscbe1 * pParam->BSIM3v1Slitl / diffVds; + VASCBE = Leff * exp(T0) / pParam->BSIM3v1Spscbe2; + T1 = T0 * VASCBE / diffVds; + dVASCBE_dVg = T1 * dVdseff_dVg; + dVASCBE_dVd = -T1 * (1.0 - dVdseff_dVd); + dVASCBE_dVb = T1 * dVdseff_dVb; + } + else + { VASCBE = MAX_EXP * Leff/pParam->BSIM3v1Spscbe2; + dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; + } + } + else + { VASCBE = MAX_EXP; + dVASCBE_dVg = dVASCBE_dVd = dVASCBE_dVb = 0.0; + } + +/* Calculate Ids */ + CoxWovL = model->BSIM3v1Scox * Weff / Leff; + beta = ueff * CoxWovL; + dbeta_dVg = CoxWovL * dueff_dVg + beta * dWeff_dVg / Weff; + dbeta_dVd = CoxWovL * dueff_dVd; + dbeta_dVb = CoxWovL * dueff_dVb + beta * dWeff_dVb / Weff; + + T0 = 1.0 - 0.5 * Abulk * Vdseff / Vgst2Vtm; + dT0_dVg = -0.5 * (Abulk * dVdseff_dVg + - Abulk * Vdseff / Vgst2Vtm + Vdseff * dAbulk_dVg) / Vgst2Vtm; + dT0_dVd = -0.5 * Abulk * dVdseff_dVd / Vgst2Vtm; + dT0_dVb = -0.5 * (Abulk * dVdseff_dVb + dAbulk_dVb * Vdseff) + / Vgst2Vtm; + + fgche1 = Vgsteff * T0; + dfgche1_dVg = Vgsteff * dT0_dVg + T0; + dfgche1_dVd = Vgsteff * dT0_dVd; + dfgche1_dVb = Vgsteff * dT0_dVb; + + T9 = Vdseff / EsatL; + fgche2 = 1.0 + T9; + dfgche2_dVg = (dVdseff_dVg - T9 * dEsatL_dVg) / EsatL; + dfgche2_dVd = (dVdseff_dVd - T9 * dEsatL_dVd) / EsatL; + dfgche2_dVb = (dVdseff_dVb - T9 * dEsatL_dVb) / EsatL; + + gche = beta * fgche1 / fgche2; + dgche_dVg = (beta * dfgche1_dVg + fgche1 * dbeta_dVg + - gche * dfgche2_dVg) / fgche2; + dgche_dVd = (beta * dfgche1_dVd + fgche1 * dbeta_dVd + - gche * dfgche2_dVd) / fgche2; + dgche_dVb = (beta * dfgche1_dVb + fgche1 * dbeta_dVb + - gche * dfgche2_dVb) / fgche2; + + T0 = 1.0 + gche * Rds; + T9 = Vdseff / T0; + Idl = gche * T9; + + dIdl_dVg = (gche * dVdseff_dVg + T9 * dgche_dVg) / T0 + - Idl * gche / T0 * dRds_dVg ; + + dIdl_dVd = (gche * dVdseff_dVd + T9 * dgche_dVd) / T0; + dIdl_dVb = (gche * dVdseff_dVb + T9 * dgche_dVb + - Idl * dRds_dVb * gche) / T0; + + T9 = diffVds / Va; + T0 = 1.0 + T9; + Idsa = Idl * T0; + dIdsa_dVg = T0 * dIdl_dVg - Idl * (dVdseff_dVg + T9 * dVa_dVg) / Va; + dIdsa_dVd = T0 * dIdl_dVd + Idl * (1.0 - dVdseff_dVd + - T9 * dVa_dVd) / Va; + dIdsa_dVb = T0 * dIdl_dVb - Idl * (dVdseff_dVb + T9 * dVa_dVb) / Va; + + T9 = diffVds / VASCBE; + T0 = 1.0 + T9; + Ids = Idsa * T0; + + Gm = T0 * dIdsa_dVg - Idsa * (dVdseff_dVg + T9 * dVASCBE_dVg) / VASCBE; + Gds = T0 * dIdsa_dVd + Idsa * (1.0 - dVdseff_dVd + - T9 * dVASCBE_dVd) / VASCBE; + Gmb = T0 * dIdsa_dVb - Idsa * (dVdseff_dVb + + T9 * dVASCBE_dVb) / VASCBE; + + Gds += Gm * dVgsteff_dVd; + Gmb += Gm * dVgsteff_dVb; + Gm *= dVgsteff_dVg; + Gmb *= dVbseff_dVb; + +/* calculate substrate current Isub */ + if ((pParam->BSIM3v1Salpha0 <= 0.0) || (pParam->BSIM3v1Sbeta0 <= 0.0)) + { Isub = Gbd = Gbb = Gbg = 0.0; + } + else + { T2 = pParam->BSIM3v1Salpha0 / Leff; + if (diffVds > pParam->BSIM3v1Sbeta0 / EXP_THRESHOLD) + { T0 = -pParam->BSIM3v1Sbeta0 / diffVds; + T1 = T2 * diffVds * exp(T0); + T3 = T1 / diffVds * (T0 - 1.0); + dT1_dVg = T3 * dVdseff_dVg; + dT1_dVd = -T3 * (1.0 - dVdseff_dVd); + dT1_dVb = T3 * dVdseff_dVb; + } + else + { T3 = T2 * MIN_EXP; + T1 = T3 * diffVds; + dT1_dVg = -T3 * dVdseff_dVg; + dT1_dVd = T3 * (1.0 - dVdseff_dVd); + dT1_dVb = -T3 * dVdseff_dVb; + } + Isub = T1 * Idsa; + Gbg = T1 * dIdsa_dVg + Idsa * dT1_dVg; + Gbd = T1 * dIdsa_dVd + Idsa * dT1_dVd; + Gbb = T1 * dIdsa_dVb + Idsa * dT1_dVb; + + Gbd += Gbg * dVgsteff_dVd; + Gbb += Gbg * dVgsteff_dVb; + Gbg *= dVgsteff_dVg; + Gbb *= dVbseff_dVb; /* bug fixing */ + } + + if (Gmb < -1e-12 || Gds < 0 || Gm < -1e-12) printf("@ vds=%g vgs=%g vbs=%g Id=%g\n",Vds, Vgs, Vbs, Ids); + if (Gds < 0) + { + printf("WARNING: negative Gds = %g for %s %s\n",Gds, + model->BSIM3v1Stype == 1 ? "nfet" : "pfet", here->BSIM3v1Sname); + /* Gds = 1e-15;*/ + } + if (Gm < -1e-12) + { + printf("WARNING: negative Gm = %g for %s %s\n",Gm, + model->BSIM3v1Stype == 1 ? "nfet" : "pfet", here->BSIM3v1Sname); + /* Gm = 1e-15; */ + } + if (Gmb < -1e-12) + { + printf("WARNING: negative Gmb = %g for %s %s\n",Gmb, + model->BSIM3v1Stype == 1 ? "nfet" : "pfet", here->BSIM3v1Sname); + /* Gmb = 0; */ + } + + cdrain = Ids; + here->BSIM3v1Sgds = Gds; + here->BSIM3v1Sgm = Gm; + here->BSIM3v1Sgmbs = Gmb; + + here->BSIM3v1Sgbbs = Gbb; + here->BSIM3v1Sgbgs = Gbg; + here->BSIM3v1Sgbds = Gbd; + + here->BSIM3v1Scsub = Isub - (Gbb * Vbseff + Gbd * Vds + Gbg * Vgs); + +/* Calculate Qinv for Noise analysis */ + + T1 = Vgsteff * (1.0 - 0.5 * Abulk * Vdseff / Vgst2Vtm); + here->BSIM3v1Sqinv = -model->BSIM3v1Scox * Weff * Leff * T1; + + if ((model->BSIM3v1Sxpart < 0) || (!ChargeComputationNeeded)) + { qgate = qdrn = qsrc = qbulk = 0.0; + here->BSIM3v1Scggb = here->BSIM3v1Scgsb = here->BSIM3v1Scgdb = 0.0; + here->BSIM3v1Scdgb = here->BSIM3v1Scdsb = here->BSIM3v1Scddb = 0.0; + here->BSIM3v1Scbgb = here->BSIM3v1Scbsb = here->BSIM3v1Scbdb = 0.0; + here->BSIM3v1Scqdb = here->BSIM3v1Scqsb = here->BSIM3v1Scqgb + = here->BSIM3v1Scqbb = 0.0; + here->BSIM3v1Sgtau = 0.0; + goto finished; + } + else if (model->BSIM3v1ScapMod == 0) + { + if (Vbseff < 0.0) + { Vbseff = Vbs; + dVbseff_dVb = 1.0; + } + else + { Vbseff = pParam->BSIM3v1Sphi - Phis; + dVbseff_dVb = -dPhis_dVb; + } + + Vfb = pParam->BSIM3v1Svfbcv; + Vth = Vfb + pParam->BSIM3v1Sphi + pParam->BSIM3v1Sk1 * sqrtPhis; + Vgst = Vgs_eff - Vth; + dVth_dVb = pParam->BSIM3v1Sk1 * dsqrtPhis_dVb; + dVgst_dVb = -dVth_dVb; + dVgst_dVg = dVgs_eff_dVg; + + CoxWL = model->BSIM3v1Scox * pParam->BSIM3v1SweffCV + * pParam->BSIM3v1SleffCV; + Arg1 = Vgs_eff - Vbseff - Vfb; + if (Arg1 <= 0.0) + { qgate = CoxWL * Arg1; + qbulk = -qgate; + qdrn = 0.0; + + here->BSIM3v1Scggb = CoxWL * dVgs_eff_dVg; + here->BSIM3v1Scgdb = 0.0; + here->BSIM3v1Scgsb = CoxWL * (dVbseff_dVb + - dVgs_eff_dVg); + + here->BSIM3v1Scdgb = 0.0; + here->BSIM3v1Scddb = 0.0; + here->BSIM3v1Scdsb = 0.0; + + here->BSIM3v1Scbgb = -CoxWL * dVgs_eff_dVg; + here->BSIM3v1Scbdb = 0.0; + here->BSIM3v1Scbsb = -here->BSIM3v1Scgsb; + + } + else if (Vgst <= 0.0) + { T1 = 0.5 * pParam->BSIM3v1Sk1; + T2 = sqrt(T1 * T1 + Arg1); + qgate = CoxWL * pParam->BSIM3v1Sk1 * (T2 - T1); + qbulk = -qgate; + qdrn = 0.0; + + T0 = CoxWL * T1 / T2; + here->BSIM3v1Scggb = T0 * dVgs_eff_dVg; + here->BSIM3v1Scgdb = 0.0; + here->BSIM3v1Scgsb = T0 * (dVbseff_dVb + - dVgs_eff_dVg); + + here->BSIM3v1Scdgb = 0.0; + here->BSIM3v1Scddb = 0.0; + here->BSIM3v1Scdsb = 0.0; + + here->BSIM3v1Scbgb = -here->BSIM3v1Scggb; + here->BSIM3v1Scbdb = 0.0; + here->BSIM3v1Scbsb = -here->BSIM3v1Scgsb; + } + else + { One_Third_CoxWL = CoxWL / 3.0; + Two_Third_CoxWL = 2.0 * One_Third_CoxWL; + + AbulkCV = Abulk0 * pParam->BSIM3v1SabulkCVfactor; + dAbulkCV_dVb = pParam->BSIM3v1SabulkCVfactor * dAbulk0_dVb; + Vdsat = Vgst / AbulkCV; + dVdsat_dVg = dVgs_eff_dVg / AbulkCV; + dVdsat_dVb = - (Vdsat * dAbulkCV_dVb + dVth_dVb)/ AbulkCV; + + if (model->BSIM3v1Sxpart > 0.5) + { /* 0/100 Charge petition model */ + if (Vdsat <= Vds) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v1Sphi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.0; + + here->BSIM3v1Scggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM3v1Scgsb = -(here->BSIM3v1Scggb + T2); + here->BSIM3v1Scgdb = 0.0; + + here->BSIM3v1Scdgb = 0.0; + here->BSIM3v1Scddb = 0.0; + here->BSIM3v1Scdsb = 0.0; + + here->BSIM3v1Scbgb = -(here->BSIM3v1Scggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM3v1Scbsb = -(here->BSIM3v1Scbgb + T3); + here->BSIM3v1Scbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + T7 = 2.0 * Vds - T1 - 3.0 * T3; + T8 = T3 - T1 - 2.0 * Vds; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v1Sphi - 0.5 * (Vds - T3)); + T10 = T4 * T8; + qdrn = T4 * T7; + qbulk = -(qgate + qdrn + T10); + + T5 = T3 / T1; + here->BSIM3v1Scggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + T11 = -CoxWL * T5 * dVdsat_dVb; + here->BSIM3v1Scgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM3v1Scgsb = -(here->BSIM3v1Scggb + T11 + + here->BSIM3v1Scgdb); + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + T7 = T9 * T7; + T8 = T9 * T8; + T9 = 2.0 * T4 * (1.0 - 3.0 * T5); + here->BSIM3v1Scdgb = (T7 * dAlphaz_dVg - T9 + * dVdsat_dVg) * dVgs_eff_dVg; + T12 = T7 * dAlphaz_dVb - T9 * dVdsat_dVb; + here->BSIM3v1Scddb = T4 * (3.0 - 6.0 * T2 - 3.0 * T5); + here->BSIM3v1Scdsb = -(here->BSIM3v1Scdgb + T12 + + here->BSIM3v1Scddb); + + T9 = 2.0 * T4 * (1.0 + T5); + T10 = (T8 * dAlphaz_dVg - T9 * dVdsat_dVg) + * dVgs_eff_dVg; + T11 = T8 * dAlphaz_dVb - T9 * dVdsat_dVb; + T12 = T4 * (2.0 * T2 + T5 - 1.0); + T0 = -(T10 + T11 + T12); + + here->BSIM3v1Scbgb = -(here->BSIM3v1Scggb + + here->BSIM3v1Scdgb + T10); + here->BSIM3v1Scbdb = -(here->BSIM3v1Scgdb + + here->BSIM3v1Scddb + T12); + here->BSIM3v1Scbsb = -(here->BSIM3v1Scgsb + + here->BSIM3v1Scdsb + T0); + } + } + else if (model->BSIM3v1Sxpart < 0.5) + { /* 40/60 Charge petition model */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v1Sphi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.4 * T2; + + here->BSIM3v1Scggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM3v1Scgsb = -(here->BSIM3v1Scggb + T2); + here->BSIM3v1Scgdb = 0.0; + + T3 = 0.4 * Two_Third_CoxWL; + here->BSIM3v1Scdgb = -T3 * dVgs_eff_dVg; + here->BSIM3v1Scddb = 0.0; + T4 = T3 * dVth_dVb; + here->BSIM3v1Scdsb = -(T4 + here->BSIM3v1Scdgb); + + here->BSIM3v1Scbgb = -(here->BSIM3v1Scggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM3v1Scbsb = -(here->BSIM3v1Scbgb + T3); + here->BSIM3v1Scbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM3v1Sphi + - 0.5 * (Vds - T3)); + + T5 = T3 / T1; + here->BSIM3v1Scggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + tmp = -CoxWL * T5 * dVdsat_dVb; + here->BSIM3v1Scgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM3v1Scgsb = -(here->BSIM3v1Scggb + + here->BSIM3v1Scgdb + tmp); + + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + + T6 = 8.0 * Vdsat * Vdsat - 6.0 * Vdsat * Vds + + 1.2 * Vds * Vds; + T8 = T2 / T1; + T7 = Vds - T1 - T8 * T6; + qdrn = T4 * T7; + T7 *= T9; + tmp = T8 / T1; + tmp1 = T4 * (2.0 - 4.0 * tmp * T6 + + T8 * (16.0 * Vdsat - 6.0 * Vds)); + + here->BSIM3v1Scdgb = (T7 * dAlphaz_dVg - tmp1 + * dVdsat_dVg) * dVgs_eff_dVg; + T10 = T7 * dAlphaz_dVb - tmp1 * dVdsat_dVb; + here->BSIM3v1Scddb = T4 * (2.0 - (1.0 / (3.0 * T1 + * T1) + 2.0 * tmp) * T6 + T8 + * (6.0 * Vdsat - 2.4 * Vds)); + here->BSIM3v1Scdsb = -(here->BSIM3v1Scdgb + + T10 + here->BSIM3v1Scddb); + + T7 = 2.0 * (T1 + T3); + qbulk = -(qgate - T4 * T7); + T7 *= T9; + T0 = 4.0 * T4 * (1.0 - T5); + T12 = (-T7 * dAlphaz_dVg - here->BSIM3v1Scdgb + - T0 * dVdsat_dVg) * dVgs_eff_dVg; + T11 = -T7 * dAlphaz_dVb - T10 - T0 * dVdsat_dVb; + T10 = -4.0 * T4 * (T2 - 0.5 + 0.5 * T5) + - here->BSIM3v1Scddb; + tmp = -(T10 + T11 + T12); + + here->BSIM3v1Scbgb = -(here->BSIM3v1Scggb + + here->BSIM3v1Scdgb + T12); + here->BSIM3v1Scbdb = -(here->BSIM3v1Scgdb + + here->BSIM3v1Scddb + T11); + here->BSIM3v1Scbsb = -(here->BSIM3v1Scgsb + + here->BSIM3v1Scdsb + tmp); + } + } + else + { /* 50/50 partitioning */ + if (Vds >= Vdsat) + { /* saturation region */ + T1 = Vdsat / 3.0; + qgate = CoxWL * (Vgs_eff - Vfb + - pParam->BSIM3v1Sphi - T1); + T2 = -Two_Third_CoxWL * Vgst; + qbulk = -(qgate + T2); + qdrn = 0.5 * T2; + + here->BSIM3v1Scggb = One_Third_CoxWL * (3.0 + - dVdsat_dVg) * dVgs_eff_dVg; + T2 = -One_Third_CoxWL * dVdsat_dVb; + here->BSIM3v1Scgsb = -(here->BSIM3v1Scggb + T2); + here->BSIM3v1Scgdb = 0.0; + + here->BSIM3v1Scdgb = -One_Third_CoxWL * dVgs_eff_dVg; + here->BSIM3v1Scddb = 0.0; + T4 = One_Third_CoxWL * dVth_dVb; + here->BSIM3v1Scdsb = -(T4 + here->BSIM3v1Scdgb); + + here->BSIM3v1Scbgb = -(here->BSIM3v1Scggb + - Two_Third_CoxWL * dVgs_eff_dVg); + T3 = -(T2 + Two_Third_CoxWL * dVth_dVb); + here->BSIM3v1Scbsb = -(here->BSIM3v1Scbgb + T3); + here->BSIM3v1Scbdb = 0.0; + } + else + { /* linear region */ + Alphaz = Vgst / Vdsat; + T1 = 2.0 * Vdsat - Vds; + T2 = Vds / (3.0 * T1); + T3 = T2 * Vds; + T9 = 0.25 * CoxWL; + T4 = T9 * Alphaz; + qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM3v1Sphi + - 0.5 * (Vds - T3)); + + T5 = T3 / T1; + here->BSIM3v1Scggb = CoxWL * (1.0 - T5 * dVdsat_dVg) + * dVgs_eff_dVg; + tmp = -CoxWL * T5 * dVdsat_dVb; + here->BSIM3v1Scgdb = CoxWL * (T2 - 0.5 + 0.5 * T5); + here->BSIM3v1Scgsb = -(here->BSIM3v1Scggb + + here->BSIM3v1Scgdb + tmp); + + T6 = 1.0 / Vdsat; + dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg); + dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb); + + T7 = T1 + T3; + qdrn = -T4 * T7; + qbulk = - (qgate + qdrn + qdrn); + T7 *= T9; + T0 = T4 * (2.0 * T5 - 2.0); + + here->BSIM3v1Scdgb = (T0 * dVdsat_dVg - T7 + * dAlphaz_dVg) * dVgs_eff_dVg; + T12 = T0 * dVdsat_dVb - T7 * dAlphaz_dVb; + here->BSIM3v1Scddb = T4 * (1.0 - 2.0 * T2 - T5); + here->BSIM3v1Scdsb = -(here->BSIM3v1Scdgb + T12 + + here->BSIM3v1Scddb); + + here->BSIM3v1Scbgb = -(here->BSIM3v1Scggb + + 2.0 * here->BSIM3v1Scdgb); + here->BSIM3v1Scbdb = -(here->BSIM3v1Scgdb + + 2.0 * here->BSIM3v1Scddb); + here->BSIM3v1Scbsb = -(here->BSIM3v1Scgsb + + 2.0 * here->BSIM3v1Scdsb); + } + } + } + + } + else + { if (Vbseff < 0.0) + { VbseffCV = Vbseff; + dVbseffCV_dVb = 1.0; + } + else + { VbseffCV = pParam->BSIM3v1Sphi - Phis; + dVbseffCV_dVb = -dPhis_dVb; + } + + CoxWL = model->BSIM3v1Scox * pParam->BSIM3v1SweffCV + * pParam->BSIM3v1SleffCV; + Vfb = Vth - pParam->BSIM3v1Sphi - pParam->BSIM3v1Sk1 * sqrtPhis; + + dVfb_dVb = dVth_dVb - pParam->BSIM3v1Sk1 * dsqrtPhis_dVb; + dVfb_dVd = dVth_dVd; + + if ((VgstNVt > -EXP_THRESHOLD) && (VgstNVt < EXP_THRESHOLD)) + { ExpVgst *= ExpVgst; + Vgsteff = n * Vtm * log(1.0 + ExpVgst); + dVgsteff_dVg = ExpVgst / (1.0 + ExpVgst); + dVgsteff_dVd = -dVgsteff_dVg * (dVth_dVd + (Vgs_eff - Vth) + / n * dn_dVd) + Vgsteff / n * dn_dVd; + dVgsteff_dVb = -dVgsteff_dVg * (dVth_dVb + (Vgs_eff - Vth) + / n * dn_dVb) + Vgsteff / n * dn_dVb; + dVgsteff_dVg *= dVgs_eff_dVg; + } + + if (model->BSIM3v1ScapMod == 1) + { Arg1 = Vgs_eff - VbseffCV - Vfb - Vgsteff; + + if (Arg1 <= 0.0) + { qgate = CoxWL * Arg1; + Cgg = CoxWL * (dVgs_eff_dVg - dVgsteff_dVg); + Cgd = -CoxWL * (dVfb_dVd + dVgsteff_dVd); + Cgb = -CoxWL * (dVfb_dVb + dVbseffCV_dVb + dVgsteff_dVb); + } + else + { T0 = 0.5 * pParam->BSIM3v1Sk1; + T1 = sqrt(T0 * T0 + Arg1); + T2 = CoxWL * T0 / T1; + + qgate = CoxWL * pParam->BSIM3v1Sk1 * (T1 - T0); + + Cgg = T2 * (dVgs_eff_dVg - dVgsteff_dVg); + Cgd = -T2 * (dVfb_dVd + dVgsteff_dVd); + Cgb = -T2 * (dVfb_dVb + dVbseffCV_dVb + dVgsteff_dVb); + } + qbulk = -qgate; + Cbg = -Cgg; + Cbd = -Cgd; + Cbb = -Cgb; + + One_Third_CoxWL = CoxWL / 3.0; + Two_Third_CoxWL = 2.0 * One_Third_CoxWL; + AbulkCV = Abulk0 * pParam->BSIM3v1SabulkCVfactor; + dAbulkCV_dVb = pParam->BSIM3v1SabulkCVfactor * dAbulk0_dVb; + VdsatCV = Vgsteff / AbulkCV; + if (VdsatCV < Vds) + { dVdsatCV_dVg = 1.0 / AbulkCV; + dVdsatCV_dVb = -VdsatCV * dAbulkCV_dVb / AbulkCV; + T0 = Vgsteff - VdsatCV / 3.0; + dT0_dVg = 1.0 - dVdsatCV_dVg / 3.0; + dT0_dVb = -dVdsatCV_dVb / 3.0; + qgate += CoxWL * T0; + Cgg1 = CoxWL * dT0_dVg; + Cgb1 = CoxWL * dT0_dVb + Cgg1 * dVgsteff_dVb; + Cgd1 = Cgg1 * dVgsteff_dVd; + Cgg1 *= dVgsteff_dVg; + Cgg += Cgg1; + Cgb += Cgb1; + Cgd += Cgd1; + + T0 = VdsatCV - Vgsteff; + dT0_dVg = dVdsatCV_dVg - 1.0; + dT0_dVb = dVdsatCV_dVb; + qbulk += One_Third_CoxWL * T0; + Cbg1 = One_Third_CoxWL * dT0_dVg; + Cbb1 = One_Third_CoxWL * dT0_dVb + Cbg1 * dVgsteff_dVb; + Cbd1 = Cbg1 * dVgsteff_dVd; + Cbg1 *= dVgsteff_dVg; + Cbg += Cbg1; + Cbb += Cbb1; + Cbd += Cbd1; + + if (model->BSIM3v1Sxpart > 0.5) + T0 = -Two_Third_CoxWL; + else if (model->BSIM3v1Sxpart < 0.5) + T0 = -0.4 * CoxWL; + else + T0 = -One_Third_CoxWL; + + qsrc = T0 * Vgsteff; + Csg = T0 * dVgsteff_dVg; + Csb = T0 * dVgsteff_dVb; + Csd = T0 * dVgsteff_dVd; + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + } + else + { T0 = AbulkCV * Vds; + T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1.e-20); + T2 = Vds / T1; + T3 = T0 * T2; + dT3_dVg = -12.0 * T2 * T2 * AbulkCV; + dT3_dVd = 6.0 * T0 * (4.0 * Vgsteff - T0) / T1 / T1 - 0.5; + dT3_dVb = 12.0 * T2 * T2 * dAbulkCV_dVb * Vgsteff; + + qgate += CoxWL * (Vgsteff - 0.5 * Vds + T3); + Cgg1 = CoxWL * (1.0 + dT3_dVg); + Cgb1 = CoxWL * dT3_dVb + Cgg1 * dVgsteff_dVb; + Cgd1 = CoxWL * dT3_dVd + Cgg1 * dVgsteff_dVd; + Cgg1 *= dVgsteff_dVg; + Cgg += Cgg1; + Cgb += Cgb1; + Cgd += Cgd1; + + qbulk += CoxWL * (1.0 - AbulkCV) * (0.5 * Vds - T3); + Cbg1 = -CoxWL * ((1.0 - AbulkCV) * dT3_dVg); + Cbb1 = -CoxWL * ((1.0 - AbulkCV) * dT3_dVb + + (0.5 * Vds - T3) * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb; + Cbd1 = -CoxWL * (1.0 - AbulkCV) * dT3_dVd + + Cbg1 * dVgsteff_dVd; + Cbg1 *= dVgsteff_dVg; + Cbg += Cbg1; + Cbb += Cbb1; + Cbd += Cbd1; + + if (model->BSIM3v1Sxpart > 0.5) + { /* 0/100 Charge petition model */ + T1 = T1 + T1; + qsrc = -CoxWL * (0.5 * Vgsteff + 0.25 * T0 + - T0 * T0 / T1); + Csg = -CoxWL * (0.5 + 24.0 * T0 * Vds / T1 / T1 + * AbulkCV); + Csb = -CoxWL * (0.25 * Vds * dAbulkCV_dVb + - 12.0 * T0 * Vds / T1 / T1 * (4.0 * Vgsteff - T0) + * dAbulkCV_dVb) + Csg * dVgsteff_dVb; + Csd = -CoxWL * (0.25 * AbulkCV - 12.0 * AbulkCV * T0 + / T1 / T1 * (4.0 * Vgsteff - T0)) + + Csg * dVgsteff_dVd; + Csg *= dVgsteff_dVg; + } + else if (model->BSIM3v1Sxpart < 0.5) + { /* 40/60 Charge petition model */ + T1 = T1 / 12.0; + T2 = 0.5 * CoxWL / (T1 * T1); + T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff + * (Vgsteff - 4.0 * T0 / 3.0)) + - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T2 * T3; + T4 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) + + 0.4 * T0 * T0; + Csg = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 + * Vgsteff - 8.0 * T0 / 3.0) + + 2.0 * T0 * T0 / 3.0); + Csb = (qsrc / T1 * Vds + T2 * T4 * Vds) * dAbulkCV_dVb + + Csg * dVgsteff_dVb; + Csd = (qsrc / T1 + T2 * T4) * AbulkCV + + Csg * dVgsteff_dVd; + Csg *= dVgsteff_dVg; + } + else + { /* 50/50 Charge petition model */ + qsrc = -0.5 * (qgate + qbulk); + Csg = -0.5 * (Cgg1 + Cbg1); + Csb = -0.5 * (Cgb1 + Cbb1); + Csd = -0.5 * (Cgd1 + Cbd1); + } + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + } + qdrn = -(qgate + qbulk + qsrc); + here->BSIM3v1Scggb = Cgg; + here->BSIM3v1Scgsb = -(Cgg + Cgd + Cgb); + here->BSIM3v1Scgdb = Cgd; + here->BSIM3v1Scdgb = -(Cgg + Cbg + Csg); + here->BSIM3v1Scdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM3v1Scddb = -(Cgd + Cbd + Csd); + here->BSIM3v1Scbgb = Cbg; + here->BSIM3v1Scbsb = -(Cbg + Cbd + Cbb); + here->BSIM3v1Scbdb = Cbd; + } + else if (model->BSIM3v1ScapMod == 2) + + { V3 = Vfb - Vgs_eff + VbseffCV - DELTA_3; + if (Vfb <= 0.0) + { T0 = sqrt(V3 * V3 - 4.0 * DELTA_3 * Vfb); + T2 = -DELTA_3 / T0; + } + else + { T0 = sqrt(V3 * V3 + 4.0 * DELTA_3 * Vfb); + T2 = DELTA_3 / T0; + } + + T1 = 0.5 * (1.0 + V3 / T0); + Vfbeff = Vfb - 0.5 * (V3 + T0); + dVfbeff_dVd = (1.0 - T1 - T2) * dVfb_dVd; + dVfbeff_dVg = T1 * dVgs_eff_dVg; + dVfbeff_dVb = (1.0 - T1 - T2) * dVfb_dVb + - T1 * dVbseffCV_dVb; + Qac0 = CoxWL * (Vfbeff - Vfb); + dQac0_dVg = CoxWL * dVfbeff_dVg; + dQac0_dVd = CoxWL * (dVfbeff_dVd - dVfb_dVd); + dQac0_dVb = CoxWL * (dVfbeff_dVb - dVfb_dVb); + + T0 = 0.5 * pParam->BSIM3v1Sk1; + T3 = Vgs_eff - Vfbeff - VbseffCV - Vgsteff; + if (pParam->BSIM3v1Sk1 == 0.0) + { T1 = 0.0; + T2 = 0.0; + } + else if (T3 < 0.0) + { T1 = T0 + T3 / pParam->BSIM3v1Sk1; + T2 = CoxWL; + } + else + { T1 = sqrt(T0 * T0 + T3); + T2 = CoxWL * T0 / T1; + } + + Qsub0 = CoxWL * pParam->BSIM3v1Sk1 * (T1 - T0); + + dQsub0_dVg = T2 * (dVgs_eff_dVg - dVfbeff_dVg - dVgsteff_dVg); + dQsub0_dVd = -T2 * (dVfbeff_dVd + dVgsteff_dVd); + dQsub0_dVb = -T2 * (dVfbeff_dVb + dVbseffCV_dVb + + dVgsteff_dVb); + + One_Third_CoxWL = CoxWL / 3.0; + Two_Third_CoxWL = 2.0 * One_Third_CoxWL; + AbulkCV = Abulk0 * pParam->BSIM3v1SabulkCVfactor; + dAbulkCV_dVb = pParam->BSIM3v1SabulkCVfactor * dAbulk0_dVb; + VdsatCV = Vgsteff / AbulkCV; + + V4 = VdsatCV - Vds - DELTA_4; + T0 = sqrt(V4 * V4 + 4.0 * DELTA_4 * VdsatCV); + VdseffCV = VdsatCV - 0.5 * (V4 + T0); + T1 = 0.5 * (1.0 + V4 / T0); + T2 = DELTA_4 / T0; + T3 = (1.0 - T1 - T2) / AbulkCV; + dVdseffCV_dVg = T3; + dVdseffCV_dVd = T1; + dVdseffCV_dVb = -T3 * VdsatCV * dAbulkCV_dVb; + + T0 = AbulkCV * VdseffCV; + T1 = 12.0 * (Vgsteff - 0.5 * T0 + 1e-20); + T2 = VdseffCV / T1; + T3 = T0 * T2; + + T4 = (1.0 - 12.0 * T2 * T2 * AbulkCV); + T5 = (6.0 * T0 * (4.0 * Vgsteff - T0) / (T1 * T1) - 0.5); + T6 = 12.0 * T2 * T2 * Vgsteff; + + qgate = CoxWL * (Vgsteff - 0.5 * VdseffCV + T3); + Cgg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Cgd1 = CoxWL * T5 * dVdseffCV_dVd + Cgg1 * dVgsteff_dVd; + Cgb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cgg1 * dVgsteff_dVb; + Cgg1 *= dVgsteff_dVg; + + T7 = 1.0 - AbulkCV; + qbulk = CoxWL * T7 * (0.5 * VdseffCV - T3); + T4 = -T7 * (T4 - 1.0); + T5 = -T7 * T5; + T6 = -(T7 * T6 + (0.5 * VdseffCV - T3)); + Cbg1 = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Cbd1 = CoxWL * T5 * dVdseffCV_dVd + Cbg1 * dVgsteff_dVd; + Cbb1 = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Cbg1 * dVgsteff_dVb; + Cbg1 *= dVgsteff_dVg; + + if (model->BSIM3v1Sxpart > 0.5) + { /* 0/100 Charge petition model */ + T1 = T1 + T1; + qsrc = -CoxWL * (0.5 * Vgsteff + 0.25 * T0 + - T0 * T0 / T1); + T7 = (4.0 * Vgsteff - T0) / (T1 * T1); + T4 = -(0.5 + 24.0 * T0 * T0 / (T1 * T1)); + T5 = -(0.25 * AbulkCV - 12.0 * AbulkCV * T0 * T7); + T6 = -(0.25 * VdseffCV - 12.0 * T0 * VdseffCV * T7); + Csg = CoxWL * (T4 + T5 * dVdseffCV_dVg); + Csd = CoxWL * T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; + Csb = CoxWL * (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; + } + else if (model->BSIM3v1Sxpart < 0.5) + { /* 40/60 Charge petition model */ + T1 = T1 / 12.0; + T2 = 0.5 * CoxWL / (T1 * T1); + T3 = Vgsteff * (2.0 * T0 * T0 / 3.0 + Vgsteff + * (Vgsteff - 4.0 * T0 / 3.0)) + - 2.0 * T0 * T0 * T0 / 15.0; + qsrc = -T2 * T3; + T7 = 4.0 / 3.0 * Vgsteff * (Vgsteff - T0) + + 0.4 * T0 * T0; + T4 = -2.0 * qsrc / T1 - T2 * (Vgsteff * (3.0 + * Vgsteff - 8.0 * T0 / 3.0) + + 2.0 * T0 * T0 / 3.0); + T5 = (qsrc / T1 + T2 * T7) * AbulkCV; + T6 = (qsrc / T1 * VdseffCV + T2 * T7 * VdseffCV); + Csg = (T4 + T5 * dVdseffCV_dVg); + Csd = T5 * dVdseffCV_dVd + Csg * dVgsteff_dVd; + Csb = (T5 * dVdseffCV_dVb + T6 * dAbulkCV_dVb) + + Csg * dVgsteff_dVb; + Csg *= dVgsteff_dVg; + } + else + { /* 50/50 Charge petition model */ + qsrc = -0.5 * (qgate + qbulk); + Csg = -0.5 * (Cgg1 + Cbg1); + Csb = -0.5 * (Cgb1 + Cbb1); + Csd = -0.5 * (Cgd1 + Cbd1); + } + + qgate += Qac0 + Qsub0; + qbulk -= (Qac0 + Qsub0); + qdrn = -(qgate + qbulk + qsrc); + + Cgg = dQac0_dVg + dQsub0_dVg + Cgg1; + Cgd = dQac0_dVd + dQsub0_dVd + Cgd1; + Cgb = dQac0_dVb + dQsub0_dVb + Cgb1; + + Cbg = Cbg1 - dQac0_dVg - dQsub0_dVg; + Cbd = Cbd1 - dQac0_dVd - dQsub0_dVd; + Cbb = Cbb1 - dQac0_dVb - dQsub0_dVb; + + Cgb *= dVbseff_dVb; + Cbb *= dVbseff_dVb; + Csb *= dVbseff_dVb; + + here->BSIM3v1Scggb = Cgg; + here->BSIM3v1Scgsb = -(Cgg + Cgd + Cgb); + here->BSIM3v1Scgdb = Cgd; + here->BSIM3v1Scdgb = -(Cgg + Cbg + Csg); + here->BSIM3v1Scdsb = (Cgg + Cgd + Cgb + Cbg + Cbd + Cbb + + Csg + Csd + Csb); + here->BSIM3v1Scddb = -(Cgd + Cbd + Csd); + here->BSIM3v1Scbgb = Cbg; + here->BSIM3v1Scbsb = -(Cbg + Cbd + Cbb); + here->BSIM3v1Scbdb = Cbd; + + } +/* Non-quasi-static Model */ + + if (here->BSIM3v1SnqsMod) + { + qcheq = -qbulk - qgate; + qbulk = qgate = qdrn = qsrc = 0.0; + + here->BSIM3v1Scqgb = -(here->BSIM3v1Scggb + here->BSIM3v1Scbgb); + here->BSIM3v1Scqdb = -(here->BSIM3v1Scgdb + here->BSIM3v1Scbdb); + here->BSIM3v1Scqsb = -(here->BSIM3v1Scgsb + here->BSIM3v1Scbsb); + here->BSIM3v1Scqbb = here->BSIM3v1Scggb + here->BSIM3v1Scgdb + + here->BSIM3v1Scgsb + here->BSIM3v1Scbgb + + here->BSIM3v1Scbdb + here->BSIM3v1Scbsb; + + here->BSIM3v1Scggb = here->BSIM3v1Scgsb = here->BSIM3v1Scgdb = 0.0; + here->BSIM3v1Scdgb = here->BSIM3v1Scdsb = here->BSIM3v1Scddb = 0.0; + here->BSIM3v1Scbgb = here->BSIM3v1Scbsb = here->BSIM3v1Scbdb = 0.0; + + T0 = pParam->BSIM3v1SleffCV * pParam->BSIM3v1SleffCV; + here->BSIM3v1Stconst = pParam->BSIM3v1Su0temp * pParam->BSIM3v1Selm + / CoxWL / T0; + + if (qcheq == 0.0) + here->BSIM3v1Stconst = 0.0; + else if (qcheq < 0.0) + here->BSIM3v1Stconst = -here->BSIM3v1Stconst; + + gtau_drift = fabs(here->BSIM3v1Stconst * qcheq); + gtau_diff = 16.0 * pParam->BSIM3v1Su0temp * model->BSIM3v1Svtm / T0; + + here->BSIM3v1Sgtau = gtau_drift + gtau_diff; + + *(ckt->CKTstate0 + here->BSIM3v1Sqcheq) = qcheq; + + if (ckt->CKTmode & MODEINITTRAN) + *(ckt->CKTstate1 + here->BSIM3v1Sqcheq) = + *(ckt->CKTstate0 + here->BSIM3v1Sqcheq); + + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM3v1Sqcheq); + if (error) return (error); + } + else + { here->BSIM3v1Scqgb = here->BSIM3v1Scqdb = here->BSIM3v1Scqsb + = here->BSIM3v1Scqbb = 0.0; + here->BSIM3v1Sgtau = 0.0; + } + } + +finished: /* returning Values to Calling Routine */ + /* + * COMPUTE EQUIVALENT DRAIN CURRENT SOURCE + */ + here->BSIM3v1Scd = here->BSIM3v1Smode * cdrain - here->BSIM3v1Scbd; + if (ChargeComputationNeeded) + { /* charge storage elements + * bulk-drain and bulk-source depletion capacitances + * czbd : zero bias drain junction capacitance + * czbs : zero bias source junction capacitance + * czbdsw: zero bias drain junction sidewall capacitance + along field oxide + * czbssw: zero bias source junction sidewall capacitance + along field oxide + * czbdswg: zero bias drain junction sidewall capacitance + along gate side + * czbsswg: zero bias source junction sidewall capacitance + along gate side + */ + + czbd = model->BSIM3v1SunitAreaJctCap * here->BSIM3v1SdrainArea; + czbs = model->BSIM3v1SunitAreaJctCap * here->BSIM3v1SsourceArea; + if (here->BSIM3v1SdrainPerimeter < pParam->BSIM3v1Sweff) + { + czbdswg = model->BSIM3v1SunitLengthGateSidewallJctCap + * here->BSIM3v1SdrainPerimeter; + czbdsw = 0.0; + } + else + { + czbdsw = model->BSIM3v1SunitLengthSidewallJctCap + * (here->BSIM3v1SdrainPerimeter - pParam->BSIM3v1Sweff); + czbdswg = model->BSIM3v1SunitLengthGateSidewallJctCap + * pParam->BSIM3v1Sweff; + } + if (here->BSIM3v1SsourcePerimeter < pParam->BSIM3v1Sweff) + { + czbssw = 0.0; + czbsswg = model->BSIM3v1SunitLengthGateSidewallJctCap + * here->BSIM3v1SsourcePerimeter; + } + else + { + czbssw = model->BSIM3v1SunitLengthSidewallJctCap + * (here->BSIM3v1SsourcePerimeter - pParam->BSIM3v1Sweff); + czbsswg = model->BSIM3v1SunitLengthGateSidewallJctCap + * pParam->BSIM3v1Sweff; + } + PhiB = model->BSIM3v1SbulkJctPotential; + PhiBSW = model->BSIM3v1SsidewallJctPotential; + PhiBSWG = model->BSIM3v1SGatesidewallJctPotential; + MJ = model->BSIM3v1SbulkJctBotGradingCoeff; + MJSW = model->BSIM3v1SbulkJctSideGradingCoeff; + MJSWG = model->BSIM3v1SbulkJctGateSideGradingCoeff; + + /* Source Bulk Junction */ + if (vbs == 0.0) + { *(ckt->CKTstate0 + here->BSIM3v1Sqbs) = 0.0; + here->BSIM3v1Scapbs = czbs + czbssw + czbsswg; + } + else if (vbs < 0.0) + { if (czbs > 0.0) + { arg = 1.0 - vbs / PhiB; + if (MJ == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJ * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v1Sqbs) = PhiB * czbs + * (1.0 - arg * sarg) / (1.0 - MJ); + here->BSIM3v1Scapbs = czbs * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM3v1Sqbs) = 0.0; + here->BSIM3v1Scapbs = 0.0; + } + if (czbssw > 0.0) + { arg = 1.0 - vbs / PhiBSW; + if (MJSW == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSW * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v1Sqbs) += PhiBSW * czbssw + * (1.0 - arg * sarg) / (1.0 - MJSW); + here->BSIM3v1Scapbs += czbssw * sarg; + } + if (czbsswg > 0.0) + { arg = 1.0 - vbs / PhiBSWG; + if (MJSWG == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWG * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v1Sqbs) += PhiBSWG * czbsswg + * (1.0 - arg * sarg) / (1.0 - MJSWG); + here->BSIM3v1Scapbs += czbsswg * sarg; + } + + } + else + { *(ckt->CKTstate0+here->BSIM3v1Sqbs) = vbs * (czbs + czbssw + + czbsswg) + vbs * vbs * (czbs * MJ * 0.5 / PhiB + + czbssw * MJSW * 0.5 / PhiBSW + + czbsswg * MJSWG * 0.5 / PhiBSWG); + here->BSIM3v1Scapbs = czbs + czbssw + czbsswg + vbs * (czbs * MJ /PhiB + czbssw * MJSW / PhiBSW + czbsswg * MJSWG / PhiBSWG); + } + + /* Drain Bulk Junction */ + if (vbd == 0.0) + { *(ckt->CKTstate0 + here->BSIM3v1Sqbd) = 0.0; + here->BSIM3v1Scapbd = czbd + czbdsw + czbdswg; + } + else if (vbd < 0.0) + { if (czbd > 0.0) + { arg = 1.0 - vbd / PhiB; + if (MJ == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJ * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v1Sqbd) = PhiB * czbd + * (1.0 - arg * sarg) / (1.0 - MJ); + here->BSIM3v1Scapbd = czbd * sarg; + } + else + { *(ckt->CKTstate0 + here->BSIM3v1Sqbd) = 0.0; + here->BSIM3v1Scapbd = 0.0; + } + if (czbdsw > 0.0) + { arg = 1.0 - vbd / PhiBSW; + if (MJSW == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSW * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v1Sqbd) += PhiBSW * czbdsw + * (1.0 - arg * sarg) / (1.0 - MJSW); + here->BSIM3v1Scapbd += czbdsw * sarg; + } + if (czbdswg > 0.0) + { arg = 1.0 - vbd / PhiBSWG; + if (MJSWG == 0.5) + sarg = 1.0 / sqrt(arg); + else + sarg = exp(-MJSWG * log(arg)); + *(ckt->CKTstate0 + here->BSIM3v1Sqbd) += PhiBSWG * czbdswg + * (1.0 - arg * sarg) / (1.0 - MJSWG); + here->BSIM3v1Scapbd += czbdswg * sarg; + } + } + else + { *(ckt->CKTstate0+here->BSIM3v1Sqbd) = vbd * (czbd + czbdsw + + czbdswg) + vbd * vbd * (czbd * MJ * 0.5 / PhiB + + czbdsw * MJSW * 0.5 / PhiBSW + + czbdswg * MJSWG * 0.5 / PhiBSWG); + here->BSIM3v1Scapbd = czbd + czbdsw + czbdswg + vbd * (czbd * MJ / PhiB + czbdsw * MJSW / PhiBSW + czbdswg * MJSWG / PhiBSWG); + } + } + + /* + * check convergence + */ + if ((here->BSIM3v1Soff == 0) || (!(ckt->CKTmode & MODEINITFIX))) + { if (Check == 1) + { ckt->CKTnoncon++; + } + } + *(ckt->CKTstate0 + here->BSIM3v1Svbs) = vbs; + *(ckt->CKTstate0 + here->BSIM3v1Svbd) = vbd; + *(ckt->CKTstate0 + here->BSIM3v1Svgs) = vgs; + *(ckt->CKTstate0 + here->BSIM3v1Svds) = vds; + + /* bulk and channel charge plus overlaps */ + + if (!ChargeComputationNeeded) + goto line850; + +line755: + ag0 = ckt->CKTag[0]; + + if (model->BSIM3v1ScapMod == 0) + { if (vgd < 0.0) + { + cgdo = pParam->BSIM3v1Scgdo; + qgdo = pParam->BSIM3v1Scgdo * vgd; + } + else + { cgdo = pParam->BSIM3v1Scgdo; + qgdo = pParam->BSIM3v1Scgdo * vgd; + } + + if (vgs < 0.0) + { + cgso = pParam->BSIM3v1Scgso; + qgso = pParam->BSIM3v1Scgso * vgs; + } + else + { cgso = pParam->BSIM3v1Scgso; + qgso = pParam->BSIM3v1Scgso * vgs; + } + } + else if (model->BSIM3v1ScapMod == 1) + { if (vgd < 0.0) + { T1 = sqrt(1.0 - 4.0 * vgd / pParam->BSIM3v1Sckappa); + cgdo = pParam->BSIM3v1Scgdo + pParam->BSIM3v1SweffCV + * pParam->BSIM3v1Scgdl / T1; + qgdo = pParam->BSIM3v1Scgdo * vgd - pParam->BSIM3v1SweffCV * 0.5 + * pParam->BSIM3v1Scgdl * pParam->BSIM3v1Sckappa * (T1 - 1.0); + } + else + { cgdo = pParam->BSIM3v1Scgdo + pParam->BSIM3v1SweffCV + * pParam->BSIM3v1Scgdl; + qgdo = (pParam->BSIM3v1SweffCV * pParam->BSIM3v1Scgdl + + pParam->BSIM3v1Scgdo) * vgd; + } + + + if (vgs < 0.0) + { T1 = sqrt(1.0 - 4.0 * vgs / pParam->BSIM3v1Sckappa); + cgso = pParam->BSIM3v1Scgso + pParam->BSIM3v1SweffCV + * pParam->BSIM3v1Scgsl / T1; + qgso = pParam->BSIM3v1Scgso * vgs - pParam->BSIM3v1SweffCV * 0.5 + * pParam->BSIM3v1Scgsl * pParam->BSIM3v1Sckappa * (T1 - 1.0); + } + else + { cgso = pParam->BSIM3v1Scgso + pParam->BSIM3v1SweffCV + * pParam->BSIM3v1Scgsl; + qgso = (pParam->BSIM3v1SweffCV * pParam->BSIM3v1Scgsl + + pParam->BSIM3v1Scgso) * vgs; + } + } + else + { T0 = vgd + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + + T3 = pParam->BSIM3v1SweffCV * pParam->BSIM3v1Scgdl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM3v1Sckappa); + cgdo = pParam->BSIM3v1Scgdo + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgdo = (pParam->BSIM3v1Scgdo + T3) * vgd - T3 * (T2 + + 0.5 * pParam->BSIM3v1Sckappa * (T4 - 1.0)); + + T0 = vgs + DELTA_1; + T1 = sqrt(T0 * T0 + 4.0 * DELTA_1); + T2 = 0.5 * (T0 - T1); + T3 = pParam->BSIM3v1SweffCV * pParam->BSIM3v1Scgsl; + T4 = sqrt(1.0 - 4.0 * T2 / pParam->BSIM3v1Sckappa); + cgso = pParam->BSIM3v1Scgso + T3 - T3 * (1.0 - 1.0 / T4) + * (0.5 - 0.5 * T0 / T1); + qgso = (pParam->BSIM3v1Scgso + T3) * vgs - T3 * (T2 + + 0.5 * pParam->BSIM3v1Sckappa * (T4 - 1.0)); + } + + if (here->BSIM3v1Smode > 0) + { gcdgb = (here->BSIM3v1Scdgb - cgdo) * ag0; + gcddb = (here->BSIM3v1Scddb + here->BSIM3v1Scapbd + cgdo) * ag0; + gcdsb = here->BSIM3v1Scdsb * ag0; + gcsgb = -(here->BSIM3v1Scggb + here->BSIM3v1Scbgb + here->BSIM3v1Scdgb + + cgso) * ag0; + gcsdb = -(here->BSIM3v1Scgdb + here->BSIM3v1Scbdb + here->BSIM3v1Scddb) + * ag0; + gcssb = (here->BSIM3v1Scapbs + cgso - (here->BSIM3v1Scgsb + + here->BSIM3v1Scbsb + here->BSIM3v1Scdsb)) * ag0; + gcggb = (here->BSIM3v1Scggb + cgdo + cgso + pParam->BSIM3v1Scgbo ) * ag0; + gcgdb = (here->BSIM3v1Scgdb - cgdo) * ag0; + gcgsb = (here->BSIM3v1Scgsb - cgso) * ag0; + gcbgb = (here->BSIM3v1Scbgb - pParam->BSIM3v1Scgbo) * ag0; + gcbdb = (here->BSIM3v1Scbdb - here->BSIM3v1Scapbd) * ag0; + gcbsb = (here->BSIM3v1Scbsb - here->BSIM3v1Scapbs) * ag0; + + gcqgb = here->BSIM3v1Scqgb * ag0; + gcqdb = here->BSIM3v1Scqdb * ag0; + gcqsb = here->BSIM3v1Scqsb * ag0; + gcqbb = here->BSIM3v1Scqbb * ag0; + + T0 = here->BSIM3v1Stconst * qdef; + here->BSIM3v1Sgtg = T0 * here->BSIM3v1Scqgb; + here->BSIM3v1Sgtb = T0 * here->BSIM3v1Scqbb; + here->BSIM3v1Sgtd = T0 * here->BSIM3v1Scqdb; + here->BSIM3v1Sgts = T0 * here->BSIM3v1Scqsb; + + sxpart = 0.6; + dxpart = 0.4; + + /* compute total terminal charge */ + qgd = qgdo; + qgs = qgso; + qgb = pParam->BSIM3v1Scgbo * vgb; + qgate += qgd + qgs + qgb; + qbulk -= qgb; + qdrn -= qgd; + qsrc = -(qgate + qbulk + qdrn); + } + else + { gcsgb = (here->BSIM3v1Scdgb - cgso) * ag0; + gcsdb = here->BSIM3v1Scdsb * ag0; + gcssb = (here->BSIM3v1Scddb + here->BSIM3v1Scapbs + cgso) * ag0; + + gcdgb = -(here->BSIM3v1Scggb + here->BSIM3v1Scbgb + here->BSIM3v1Scdgb + + cgdo) * ag0; + gcdsb = -(here->BSIM3v1Scgdb + here->BSIM3v1Scbdb + here->BSIM3v1Scddb) + * ag0; + gcddb = (here->BSIM3v1Scapbd + cgdo - (here->BSIM3v1Scgsb + + here->BSIM3v1Scbsb + here->BSIM3v1Scdsb)) * ag0; + gcggb = (here->BSIM3v1Scggb + cgdo + cgso + pParam->BSIM3v1Scgbo ) * ag0; + gcgdb = (here->BSIM3v1Scgsb - cgdo) * ag0; + gcgsb = (here->BSIM3v1Scgdb - cgso) * ag0; + gcbgb = (here->BSIM3v1Scbgb - pParam->BSIM3v1Scgbo) * ag0; + gcbdb = (here->BSIM3v1Scbsb - here->BSIM3v1Scapbd) * ag0; + gcbsb = (here->BSIM3v1Scbdb - here->BSIM3v1Scapbs) * ag0; + + gcqgb = here->BSIM3v1Scqgb * ag0; + gcqdb = here->BSIM3v1Scqsb * ag0; + gcqsb = here->BSIM3v1Scqdb * ag0; + gcqbb = here->BSIM3v1Scqbb * ag0; + + T0 = here->BSIM3v1Stconst * qdef; + here->BSIM3v1Sgtg = T0 * here->BSIM3v1Scqgb; + here->BSIM3v1Sgtb = T0 * here->BSIM3v1Scqbb; + here->BSIM3v1Sgtd = T0 * here->BSIM3v1Scqdb; + here->BSIM3v1Sgts = T0 * here->BSIM3v1Scqsb; + + dxpart = 0.6; + sxpart = 0.4; + + /* compute total terminal charge */ + qgd = qgdo; + qgs = qgso; + qgb = pParam->BSIM3v1Scgbo * vgb; + qgate += qgd + qgs + qgb; + qbulk -= qgb; + qsrc = qdrn - qgs; + qdrn = -(qgate + qbulk + qsrc); + } + + here->BSIM3v1Scgdo = cgdo; + here->BSIM3v1Scgso = cgso; + +/* added by Mansun 11/1/93 */ + + + if (here->BSIM3v1SnqsMod) + { *(ckt->CKTstate0 + here->BSIM3v1Sqcdump) = qdef; + + if (ckt->CKTmode & MODEINITTRAN) + *(ckt->CKTstate1 + here->BSIM3v1Sqcdump) = + *(ckt->CKTstate0 + here->BSIM3v1Sqcdump); + + error = NIintegrate(ckt, &gqdef, &cqdef, 1.0, here->BSIM3v1Sqcdump); + if (error) return (error); + } + else + { gqdef = cqdef = 0.0; + } + + if (ByPass) goto line860; + +/* End added by Mansun 11/1/93 */ + + *(ckt->CKTstate0 + here->BSIM3v1Sqg) = qgate; + *(ckt->CKTstate0 + here->BSIM3v1Sqd) = qdrn + - *(ckt->CKTstate0 + here->BSIM3v1Sqbd); + *(ckt->CKTstate0 + here->BSIM3v1Sqb) = qbulk + + *(ckt->CKTstate0 + here->BSIM3v1Sqbd) + + *(ckt->CKTstate0 + here->BSIM3v1Sqbs); + + /* store small signal parameters */ + if (ckt->CKTmode & MODEINITSMSIG) + { goto line1000; + } + if (!ChargeComputationNeeded) + goto line850; + + if (ckt->CKTmode & MODEINITTRAN) + { *(ckt->CKTstate1 + here->BSIM3v1Sqb) = + *(ckt->CKTstate0 + here->BSIM3v1Sqb); + *(ckt->CKTstate1 + here->BSIM3v1Sqg) = + *(ckt->CKTstate0 + here->BSIM3v1Sqg); + *(ckt->CKTstate1 + here->BSIM3v1Sqd) = + *(ckt->CKTstate0 + here->BSIM3v1Sqd); + } + + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM3v1Sqb); + if (error) + return(error); + error = NIintegrate(ckt, &geq, &ceq, 0.0, here->BSIM3v1Sqg); + if (error) + return(error); + error = NIintegrate(ckt,&geq, &ceq, 0.0, here->BSIM3v1Sqd); + if (error) + return(error); + + goto line860; + +line850: + /* initialize to zero charge conductance and current */ + ceqqg = ceqqb = ceqqd = 0.0; + + cqcheq = cqdef = 0.0; + + gcdgb = gcddb = gcdsb = 0.0; + gcsgb = gcsdb = gcssb = 0.0; + gcggb = gcgdb = gcgsb = 0.0; + gcbgb = gcbdb = gcbsb = 0.0; + + gcqgb = gcqdb = gcqsb = gcqbb = 0.0; + here->BSIM3v1Sgtg = here->BSIM3v1Sgtd = here->BSIM3v1Sgts = here->BSIM3v1Sgtb = 0.0; + gqdef = 0.0; + sxpart = (1.0 - (dxpart = (here->BSIM3v1Smode > 0) ? 0.4 : 0.6)); + if (here->BSIM3v1SnqsMod) + here->BSIM3v1Sgtau = 16.0 * pParam->BSIM3v1Su0temp * model->BSIM3v1Svtm + / Leff / Leff; + else + here->BSIM3v1Sgtau = 0.0; + + goto line900; + +line860: + /* evaluate equivalent charge current */ + + cqgate = *(ckt->CKTstate0 + here->BSIM3v1Scqg); + cqbulk = *(ckt->CKTstate0 + here->BSIM3v1Scqb); + cqdrn = *(ckt->CKTstate0 + here->BSIM3v1Scqd); + + ceqqg = cqgate - gcggb * vgb + gcgdb * vbd + gcgsb * vbs + + (here->BSIM3v1Sgtg * vgb - here->BSIM3v1Sgtd * vbd - here->BSIM3v1Sgts * vbs); + ceqqb = cqbulk - gcbgb * vgb + gcbdb * vbd + gcbsb * vbs; + ceqqd = cqdrn - gcdgb * vgb + gcddb * vbd + gcdsb * vbs + - dxpart * (here->BSIM3v1Sgtg * vgb - here->BSIM3v1Sgtd * vbd + - here->BSIM3v1Sgts * vbs); + + cqcheq = *(ckt->CKTstate0 + here->BSIM3v1Scqcheq) + - (gcqgb * vgb - gcqdb * vbd - gcqsb * vbs) + + (here->BSIM3v1Sgtg * vgb - here->BSIM3v1Sgtd * vbd - here->BSIM3v1Sgts * vbs); + + if (ckt->CKTmode & MODEINITTRAN) + { *(ckt->CKTstate1 + here->BSIM3v1Scqb) = + *(ckt->CKTstate0 + here->BSIM3v1Scqb); + *(ckt->CKTstate1 + here->BSIM3v1Scqg) = + *(ckt->CKTstate0 + here->BSIM3v1Scqg); + *(ckt->CKTstate1 + here->BSIM3v1Scqd) = + *(ckt->CKTstate0 + here->BSIM3v1Scqd); + *(ckt->CKTstate1 + here->BSIM3v1Scqcheq) = + *(ckt->CKTstate0 + here->BSIM3v1Scqcheq); + *(ckt->CKTstate1 + here->BSIM3v1Scqcdump) = + *(ckt->CKTstate0 + here->BSIM3v1Scqcdump); + } + + /* + * load current vector + */ +line900: + + if (here->BSIM3v1Smode >= 0) + { Gm = here->BSIM3v1Sgm; + Gmbs = here->BSIM3v1Sgmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + cdreq = model->BSIM3v1Stype * (cdrain - here->BSIM3v1Sgds * vds + - Gm * vgs - Gmbs * vbs); + ceqbs = -here->BSIM3v1Scsub; + ceqbd = 0.0; + + gbspsp = -here->BSIM3v1Sgbds - here->BSIM3v1Sgbgs - here->BSIM3v1Sgbbs; + gbbdp = -here->BSIM3v1Sgbds; + gbbsp = here->BSIM3v1Sgbds + here->BSIM3v1Sgbgs + here->BSIM3v1Sgbbs; + gbspg = here->BSIM3v1Sgbgs; + gbspb = here->BSIM3v1Sgbbs; + gbspdp = here->BSIM3v1Sgbds; + gbdpdp = 0.0; + gbdpg = 0.0; + gbdpb = 0.0; + gbdpsp = 0.0; + } + else + { Gm = -here->BSIM3v1Sgm; + Gmbs = -here->BSIM3v1Sgmbs; + FwdSum = 0.0; + RevSum = -(Gm + Gmbs); + cdreq = -model->BSIM3v1Stype * (cdrain + here->BSIM3v1Sgds * vds + + Gm * vgd + Gmbs * vbd); + ceqbs = 0.0; + ceqbd = -here->BSIM3v1Scsub; + + gbspsp = 0.0; + gbbdp = here->BSIM3v1Sgbds + here->BSIM3v1Sgbgs + here->BSIM3v1Sgbbs; + gbbsp = -here->BSIM3v1Sgbds; + gbspg = 0.0; + gbspb = 0.0; + gbspdp = 0.0; + gbdpdp = -here->BSIM3v1Sgbds - here->BSIM3v1Sgbgs - here->BSIM3v1Sgbbs; + gbdpg = here->BSIM3v1Sgbgs; + gbdpb = here->BSIM3v1Sgbbs; + gbdpsp = here->BSIM3v1Sgbds; + } + + if (model->BSIM3v1Stype > 0) + { ceqbs += (here->BSIM3v1Scbs - (here->BSIM3v1Sgbs - ckt->CKTgmin) * vbs); + ceqbd += (here->BSIM3v1Scbd - (here->BSIM3v1Sgbd - ckt->CKTgmin) * vbd); + ceqqg = ceqqg; + ceqqb = ceqqb; + ceqqd = ceqqd; + cqcheq = cqcheq; + } + else + { ceqbs = -ceqbs - (here->BSIM3v1Scbs - (here->BSIM3v1Sgbs + - ckt->CKTgmin) * vbs); + ceqbd = -ceqbd - (here->BSIM3v1Scbd - (here->BSIM3v1Sgbd + - ckt->CKTgmin) * vbd); + ceqqg = -ceqqg; + ceqqb = -ceqqb; + ceqqd = -ceqqd; + cqcheq = -cqcheq; + } + + (*(ckt->CKTrhs + here->BSIM3v1SgNode) -= ceqqg); + (*(ckt->CKTrhs + here->BSIM3v1SbNode) -=(ceqbs + ceqbd + ceqqb)); + (*(ckt->CKTrhs + here->BSIM3v1SdNodePrime) += (ceqbd - cdreq - ceqqd)); + (*(ckt->CKTrhs + here->BSIM3v1SsNodePrime) += (cdreq + ceqbs + ceqqg + + ceqqb + ceqqd)); + + *(ckt->CKTrhs + here->BSIM3v1SqNode) += (cqcheq - cqdef); + + /* + * load y matrix + */ + + (*(here->BSIM3v1SDdPtr) += here->BSIM3v1SdrainConductance); + (*(here->BSIM3v1SGgPtr) += gcggb - here->BSIM3v1Sgtg); + (*(here->BSIM3v1SSsPtr) += here->BSIM3v1SsourceConductance); + (*(here->BSIM3v1SBbPtr) += (here->BSIM3v1Sgbd + here->BSIM3v1Sgbs + - gcbgb - gcbdb - gcbsb) - here->BSIM3v1Sgbbs); + (*(here->BSIM3v1SDPdpPtr) += (here->BSIM3v1SdrainConductance + + here->BSIM3v1Sgds + here->BSIM3v1Sgbd + + RevSum + gcddb) + dxpart * here->BSIM3v1Sgtd + gbdpdp); + (*(here->BSIM3v1SSPspPtr) += (here->BSIM3v1SsourceConductance + + here->BSIM3v1Sgds + here->BSIM3v1Sgbs + + FwdSum + gcssb) + sxpart * here->BSIM3v1Sgts + gbspsp); + (*(here->BSIM3v1SDdpPtr) -= here->BSIM3v1SdrainConductance); + (*(here->BSIM3v1SGbPtr) -= gcggb + gcgdb + gcgsb + here->BSIM3v1Sgtb); + (*(here->BSIM3v1SGdpPtr) += gcgdb - here->BSIM3v1Sgtd); + (*(here->BSIM3v1SGspPtr) += gcgsb - here->BSIM3v1Sgts); + (*(here->BSIM3v1SSspPtr) -= here->BSIM3v1SsourceConductance); + (*(here->BSIM3v1SBgPtr) += gcbgb - here->BSIM3v1Sgbgs); + (*(here->BSIM3v1SBdpPtr) += gcbdb - here->BSIM3v1Sgbd + gbbdp); + (*(here->BSIM3v1SBspPtr) += gcbsb - here->BSIM3v1Sgbs + gbbsp); + (*(here->BSIM3v1SDPdPtr) -= here->BSIM3v1SdrainConductance); + (*(here->BSIM3v1SDPgPtr) += (Gm + gcdgb) + dxpart * here->BSIM3v1Sgtg + gbdpg); + (*(here->BSIM3v1SDPbPtr) -= (here->BSIM3v1Sgbd - Gmbs + gcdgb + gcddb + + gcdsb - dxpart * here->BSIM3v1Sgtb) - gbdpb); + (*(here->BSIM3v1SDPspPtr) -= (here->BSIM3v1Sgds + FwdSum - gcdsb + - dxpart * here->BSIM3v1Sgts) - gbdpsp); + (*(here->BSIM3v1SSPgPtr) += gcsgb - Gm + sxpart * here->BSIM3v1Sgtg + gbspg); + (*(here->BSIM3v1SSPsPtr) -= here->BSIM3v1SsourceConductance); + (*(here->BSIM3v1SSPbPtr) -= (here->BSIM3v1Sgbs + Gmbs + gcsgb + gcsdb + + gcssb - sxpart * here->BSIM3v1Sgtb) - gbspb); + (*(here->BSIM3v1SSPdpPtr) -= (here->BSIM3v1Sgds + RevSum - gcsdb + - sxpart * here->BSIM3v1Sgtd - here->BSIM3v1Sgbd) - gbspdp); + + *(here->BSIM3v1SQqPtr) += (gqdef + here->BSIM3v1Sgtau); + + *(here->BSIM3v1SDPqPtr) += (dxpart * here->BSIM3v1Sgtau); + *(here->BSIM3v1SSPqPtr) += (sxpart * here->BSIM3v1Sgtau); + *(here->BSIM3v1SGqPtr) -= here->BSIM3v1Sgtau; + + *(here->BSIM3v1SQgPtr) += (-gcqgb + here->BSIM3v1Sgtg); + *(here->BSIM3v1SQdpPtr) += (-gcqdb + here->BSIM3v1Sgtd); + *(here->BSIM3v1SQspPtr) += (-gcqsb + here->BSIM3v1Sgts); + *(here->BSIM3v1SQbPtr) += (-gcqbb + here->BSIM3v1Sgtb); + +line1000: ; + + } /* End of Mosfet Instance */ +} /* End of Model Instance */ + +return(OK); +} + + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1smask.c b/src/spicelib/devices/bsim3v1s/b3v1smask.c new file mode 100644 index 000000000..40998e81c --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1smask.c @@ -0,0 +1,1123 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1smask.c +**********/ + +#include "ngspice.h" +#include "ifsim.h" +#include "cktdefs.h" +#include "devdefs.h" +#include "bsim3v1sdef.h" +#include "sperror.h" +#include "suffix.h" + +int +BSIM3v1SmAsk(CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value) +{ + BSIM3v1Smodel *model = (BSIM3v1Smodel *)inst; + switch(which) + { case BSIM3v1S_MOD_MOBMOD: + value->iValue = model->BSIM3v1SmobMod; + return(OK); + case BSIM3v1S_MOD_PARAMCHK: + value->iValue = model->BSIM3v1SparamChk; + return(OK); + case BSIM3v1S_MOD_BINUNIT: + value->iValue = model->BSIM3v1SbinUnit; + return(OK); + case BSIM3v1S_MOD_CAPMOD: + value->iValue = model->BSIM3v1ScapMod; + return(OK); + case BSIM3v1S_MOD_NQSMOD: + value->iValue = model->BSIM3v1SnqsMod; + return(OK); + case BSIM3v1S_MOD_NOIMOD: + value->iValue = model->BSIM3v1SnoiMod; + return(OK); + case BSIM3v1S_MOD_VERSION : + value->rValue = model->BSIM3v1Sversion; + return(OK); + case BSIM3v1S_MOD_TOX : + value->rValue = model->BSIM3v1Stox; + return(OK); + case BSIM3v1S_MOD_CDSC : + value->rValue = model->BSIM3v1Scdsc; + return(OK); + case BSIM3v1S_MOD_CDSCB : + value->rValue = model->BSIM3v1Scdscb; + return(OK); + + case BSIM3v1S_MOD_CDSCD : + value->rValue = model->BSIM3v1Scdscd; + return(OK); + + case BSIM3v1S_MOD_CIT : + value->rValue = model->BSIM3v1Scit; + return(OK); + case BSIM3v1S_MOD_NFACTOR : + value->rValue = model->BSIM3v1Snfactor; + return(OK); + case BSIM3v1S_MOD_XJ: + value->rValue = model->BSIM3v1Sxj; + return(OK); + case BSIM3v1S_MOD_VSAT: + value->rValue = model->BSIM3v1Svsat; + return(OK); + case BSIM3v1S_MOD_AT: + value->rValue = model->BSIM3v1Sat; + return(OK); + case BSIM3v1S_MOD_A0: + value->rValue = model->BSIM3v1Sa0; + return(OK); + + case BSIM3v1S_MOD_AGS: + value->rValue = model->BSIM3v1Sags; + return(OK); + + case BSIM3v1S_MOD_A1: + value->rValue = model->BSIM3v1Sa1; + return(OK); + case BSIM3v1S_MOD_A2: + value->rValue = model->BSIM3v1Sa2; + return(OK); + case BSIM3v1S_MOD_KETA: + value->rValue = model->BSIM3v1Sketa; + return(OK); + case BSIM3v1S_MOD_NSUB: + value->rValue = model->BSIM3v1Snsub; + return(OK); + case BSIM3v1S_MOD_NPEAK: + value->rValue = model->BSIM3v1Snpeak; + return(OK); + case BSIM3v1S_MOD_NGATE: + value->rValue = model->BSIM3v1Sngate; + return(OK); + case BSIM3v1S_MOD_GAMMA1: + value->rValue = model->BSIM3v1Sgamma1; + return(OK); + case BSIM3v1S_MOD_GAMMA2: + value->rValue = model->BSIM3v1Sgamma2; + return(OK); + case BSIM3v1S_MOD_VBX: + value->rValue = model->BSIM3v1Svbx; + return(OK); + case BSIM3v1S_MOD_VBM: + value->rValue = model->BSIM3v1Svbm; + return(OK); + case BSIM3v1S_MOD_XT: + value->rValue = model->BSIM3v1Sxt; + return(OK); + case BSIM3v1S_MOD_K1: + value->rValue = model->BSIM3v1Sk1; + return(OK); + case BSIM3v1S_MOD_KT1: + value->rValue = model->BSIM3v1Skt1; + return(OK); + case BSIM3v1S_MOD_KT1L: + value->rValue = model->BSIM3v1Skt1l; + return(OK); + case BSIM3v1S_MOD_KT2 : + value->rValue = model->BSIM3v1Skt2; + return(OK); + case BSIM3v1S_MOD_K2 : + value->rValue = model->BSIM3v1Sk2; + return(OK); + case BSIM3v1S_MOD_K3: + value->rValue = model->BSIM3v1Sk3; + return(OK); + case BSIM3v1S_MOD_K3B: + value->rValue = model->BSIM3v1Sk3b; + return(OK); + case BSIM3v1S_MOD_W0: + value->rValue = model->BSIM3v1Sw0; + return(OK); + case BSIM3v1S_MOD_NLX: + value->rValue = model->BSIM3v1Snlx; + return(OK); + case BSIM3v1S_MOD_DVT0 : + value->rValue = model->BSIM3v1Sdvt0; + return(OK); + case BSIM3v1S_MOD_DVT1 : + value->rValue = model->BSIM3v1Sdvt1; + return(OK); + case BSIM3v1S_MOD_DVT2 : + value->rValue = model->BSIM3v1Sdvt2; + return(OK); + case BSIM3v1S_MOD_DVT0W : + value->rValue = model->BSIM3v1Sdvt0w; + return(OK); + case BSIM3v1S_MOD_DVT1W : + value->rValue = model->BSIM3v1Sdvt1w; + return(OK); + case BSIM3v1S_MOD_DVT2W : + value->rValue = model->BSIM3v1Sdvt2w; + return(OK); + case BSIM3v1S_MOD_DROUT : + value->rValue = model->BSIM3v1Sdrout; + return(OK); + case BSIM3v1S_MOD_DSUB : + value->rValue = model->BSIM3v1Sdsub; + return(OK); + case BSIM3v1S_MOD_VTH0: + value->rValue = model->BSIM3v1Svth0; + return(OK); + case BSIM3v1S_MOD_UA: + value->rValue = model->BSIM3v1Sua; + return(OK); + case BSIM3v1S_MOD_UA1: + value->rValue = model->BSIM3v1Sua1; + return(OK); + case BSIM3v1S_MOD_UB: + value->rValue = model->BSIM3v1Sub; + return(OK); + case BSIM3v1S_MOD_UB1: + value->rValue = model->BSIM3v1Sub1; + return(OK); + case BSIM3v1S_MOD_UC: + value->rValue = model->BSIM3v1Suc; + return(OK); + case BSIM3v1S_MOD_UC1: + value->rValue = model->BSIM3v1Suc1; + return(OK); + case BSIM3v1S_MOD_U0: + value->rValue = model->BSIM3v1Su0; + return(OK); + case BSIM3v1S_MOD_UTE: + value->rValue = model->BSIM3v1Sute; + return(OK); + case BSIM3v1S_MOD_VOFF: + value->rValue = model->BSIM3v1Svoff; + return(OK); + case BSIM3v1S_MOD_DELTA: + value->rValue = model->BSIM3v1Sdelta; + return(OK); + case BSIM3v1S_MOD_RDSW: + value->rValue = model->BSIM3v1Srdsw; + return(OK); + case BSIM3v1S_MOD_PRWG: + value->rValue = model->BSIM3v1Sprwg; + return(OK); + case BSIM3v1S_MOD_PRWB: + value->rValue = model->BSIM3v1Sprwb; + return(OK); + case BSIM3v1S_MOD_PRT: + value->rValue = model->BSIM3v1Sprt; + return(OK); + case BSIM3v1S_MOD_ETA0: + value->rValue = model->BSIM3v1Seta0; + return(OK); + case BSIM3v1S_MOD_ETAB: + value->rValue = model->BSIM3v1Setab; + return(OK); + case BSIM3v1S_MOD_PCLM: + value->rValue = model->BSIM3v1Spclm; + return(OK); + case BSIM3v1S_MOD_PDIBL1: + value->rValue = model->BSIM3v1Spdibl1; + return(OK); + case BSIM3v1S_MOD_PDIBL2: + value->rValue = model->BSIM3v1Spdibl2; + return(OK); + case BSIM3v1S_MOD_PDIBLB: + value->rValue = model->BSIM3v1Spdiblb; + return(OK); + case BSIM3v1S_MOD_PSCBE1: + value->rValue = model->BSIM3v1Spscbe1; + return(OK); + case BSIM3v1S_MOD_PSCBE2: + value->rValue = model->BSIM3v1Spscbe2; + return(OK); + case BSIM3v1S_MOD_PVAG: + value->rValue = model->BSIM3v1Spvag; + return(OK); + case BSIM3v1S_MOD_WR: + value->rValue = model->BSIM3v1Swr; + return(OK); + case BSIM3v1S_MOD_DWG: + value->rValue = model->BSIM3v1Sdwg; + return(OK); + case BSIM3v1S_MOD_DWB: + value->rValue = model->BSIM3v1Sdwb; + return(OK); + case BSIM3v1S_MOD_B0: + value->rValue = model->BSIM3v1Sb0; + return(OK); + case BSIM3v1S_MOD_B1: + value->rValue = model->BSIM3v1Sb1; + return(OK); + case BSIM3v1S_MOD_ALPHA0: + value->rValue = model->BSIM3v1Salpha0; + return(OK); + case BSIM3v1S_MOD_BETA0: + value->rValue = model->BSIM3v1Sbeta0; + return(OK); + + case BSIM3v1S_MOD_ELM: + value->rValue = model->BSIM3v1Selm; + return(OK); + case BSIM3v1S_MOD_CGSL: + value->rValue = model->BSIM3v1Scgsl; + return(OK); + case BSIM3v1S_MOD_CGDL: + value->rValue = model->BSIM3v1Scgdl; + return(OK); + case BSIM3v1S_MOD_CKAPPA: + value->rValue = model->BSIM3v1Sckappa; + return(OK); + case BSIM3v1S_MOD_CF: + value->rValue = model->BSIM3v1Scf; + return(OK); + case BSIM3v1S_MOD_CLC: + value->rValue = model->BSIM3v1Sclc; + return(OK); + case BSIM3v1S_MOD_CLE: + value->rValue = model->BSIM3v1Scle; + return(OK); + case BSIM3v1S_MOD_DWC: + value->rValue = model->BSIM3v1Sdwc; + return(OK); + case BSIM3v1S_MOD_DLC: + value->rValue = model->BSIM3v1Sdlc; + return(OK); + case BSIM3v1S_MOD_VFBCV: + value->rValue = model->BSIM3v1Svfbcv; + return(OK); + + /* Length dependence */ + case BSIM3v1S_MOD_LCDSC : + value->rValue = model->BSIM3v1Slcdsc; + return(OK); + case BSIM3v1S_MOD_LCDSCB : + value->rValue = model->BSIM3v1Slcdscb; + return(OK); + case BSIM3v1S_MOD_LCDSCD : + value->rValue = model->BSIM3v1Slcdscd; + return(OK); + case BSIM3v1S_MOD_LCIT : + value->rValue = model->BSIM3v1Slcit; + return(OK); + case BSIM3v1S_MOD_LNFACTOR : + value->rValue = model->BSIM3v1Slnfactor; + return(OK); + case BSIM3v1S_MOD_LXJ: + value->rValue = model->BSIM3v1Slxj; + return(OK); + case BSIM3v1S_MOD_LVSAT: + value->rValue = model->BSIM3v1Slvsat; + return(OK); + case BSIM3v1S_MOD_LAT: + value->rValue = model->BSIM3v1Slat; + return(OK); + case BSIM3v1S_MOD_LA0: + value->rValue = model->BSIM3v1Sla0; + return(OK); + case BSIM3v1S_MOD_LAGS: + value->rValue = model->BSIM3v1Slags; + return(OK); + case BSIM3v1S_MOD_LA1: + value->rValue = model->BSIM3v1Sla1; + return(OK); + case BSIM3v1S_MOD_LA2: + value->rValue = model->BSIM3v1Sla2; + return(OK); + case BSIM3v1S_MOD_LKETA: + value->rValue = model->BSIM3v1Slketa; + return(OK); + case BSIM3v1S_MOD_LNSUB: + value->rValue = model->BSIM3v1Slnsub; + return(OK); + case BSIM3v1S_MOD_LNPEAK: + value->rValue = model->BSIM3v1Slnpeak; + return(OK); + case BSIM3v1S_MOD_LNGATE: + value->rValue = model->BSIM3v1Slngate; + return(OK); + case BSIM3v1S_MOD_LGAMMA1: + value->rValue = model->BSIM3v1Slgamma1; + return(OK); + case BSIM3v1S_MOD_LGAMMA2: + value->rValue = model->BSIM3v1Slgamma2; + return(OK); + case BSIM3v1S_MOD_LVBX: + value->rValue = model->BSIM3v1Slvbx; + return(OK); + case BSIM3v1S_MOD_LVBM: + value->rValue = model->BSIM3v1Slvbm; + return(OK); + case BSIM3v1S_MOD_LXT: + value->rValue = model->BSIM3v1Slxt; + return(OK); + case BSIM3v1S_MOD_LK1: + value->rValue = model->BSIM3v1Slk1; + return(OK); + case BSIM3v1S_MOD_LKT1: + value->rValue = model->BSIM3v1Slkt1; + return(OK); + case BSIM3v1S_MOD_LKT1L: + value->rValue = model->BSIM3v1Slkt1l; + return(OK); + case BSIM3v1S_MOD_LKT2 : + value->rValue = model->BSIM3v1Slkt2; + return(OK); + case BSIM3v1S_MOD_LK2 : + value->rValue = model->BSIM3v1Slk2; + return(OK); + case BSIM3v1S_MOD_LK3: + value->rValue = model->BSIM3v1Slk3; + return(OK); + case BSIM3v1S_MOD_LK3B: + value->rValue = model->BSIM3v1Slk3b; + return(OK); + case BSIM3v1S_MOD_LW0: + value->rValue = model->BSIM3v1Slw0; + return(OK); + case BSIM3v1S_MOD_LNLX: + value->rValue = model->BSIM3v1Slnlx; + return(OK); + case BSIM3v1S_MOD_LDVT0: + value->rValue = model->BSIM3v1Sldvt0; + return(OK); + case BSIM3v1S_MOD_LDVT1 : + value->rValue = model->BSIM3v1Sldvt1; + return(OK); + case BSIM3v1S_MOD_LDVT2 : + value->rValue = model->BSIM3v1Sldvt2; + return(OK); + case BSIM3v1S_MOD_LDVT0W : + value->rValue = model->BSIM3v1Sldvt0w; + return(OK); + case BSIM3v1S_MOD_LDVT1W : + value->rValue = model->BSIM3v1Sldvt1w; + return(OK); + case BSIM3v1S_MOD_LDVT2W : + value->rValue = model->BSIM3v1Sldvt2w; + return(OK); + case BSIM3v1S_MOD_LDROUT : + value->rValue = model->BSIM3v1Sldrout; + return(OK); + case BSIM3v1S_MOD_LDSUB : + value->rValue = model->BSIM3v1Sldsub; + return(OK); + case BSIM3v1S_MOD_LVTH0: + value->rValue = model->BSIM3v1Slvth0; + return(OK); + case BSIM3v1S_MOD_LUA: + value->rValue = model->BSIM3v1Slua; + return(OK); + case BSIM3v1S_MOD_LUA1: + value->rValue = model->BSIM3v1Slua1; + return(OK); + case BSIM3v1S_MOD_LUB: + value->rValue = model->BSIM3v1Slub; + return(OK); + case BSIM3v1S_MOD_LUB1: + value->rValue = model->BSIM3v1Slub1; + return(OK); + case BSIM3v1S_MOD_LUC: + value->rValue = model->BSIM3v1Sluc; + return(OK); + case BSIM3v1S_MOD_LUC1: + value->rValue = model->BSIM3v1Sluc1; + return(OK); + case BSIM3v1S_MOD_LU0: + value->rValue = model->BSIM3v1Slu0; + return(OK); + case BSIM3v1S_MOD_LUTE: + value->rValue = model->BSIM3v1Slute; + return(OK); + case BSIM3v1S_MOD_LVOFF: + value->rValue = model->BSIM3v1Slvoff; + return(OK); + case BSIM3v1S_MOD_LDELTA: + value->rValue = model->BSIM3v1Sldelta; + return(OK); + case BSIM3v1S_MOD_LRDSW: + value->rValue = model->BSIM3v1Slrdsw; + return(OK); + case BSIM3v1S_MOD_LPRWB: + value->rValue = model->BSIM3v1Slprwb; + return(OK); + case BSIM3v1S_MOD_LPRWG: + value->rValue = model->BSIM3v1Slprwg; + return(OK); + case BSIM3v1S_MOD_LPRT: + value->rValue = model->BSIM3v1Slprt; + return(OK); + case BSIM3v1S_MOD_LETA0: + value->rValue = model->BSIM3v1Sleta0; + return(OK); + case BSIM3v1S_MOD_LETAB: + value->rValue = model->BSIM3v1Sletab; + return(OK); + case BSIM3v1S_MOD_LPCLM: + value->rValue = model->BSIM3v1Slpclm; + return(OK); + case BSIM3v1S_MOD_LPDIBL1: + value->rValue = model->BSIM3v1Slpdibl1; + return(OK); + case BSIM3v1S_MOD_LPDIBL2: + value->rValue = model->BSIM3v1Slpdibl2; + return(OK); + case BSIM3v1S_MOD_LPDIBLB: + value->rValue = model->BSIM3v1Slpdiblb; + return(OK); + case BSIM3v1S_MOD_LPSCBE1: + value->rValue = model->BSIM3v1Slpscbe1; + return(OK); + case BSIM3v1S_MOD_LPSCBE2: + value->rValue = model->BSIM3v1Slpscbe2; + return(OK); + case BSIM3v1S_MOD_LPVAG: + value->rValue = model->BSIM3v1Slpvag; + return(OK); + case BSIM3v1S_MOD_LWR: + value->rValue = model->BSIM3v1Slwr; + return(OK); + case BSIM3v1S_MOD_LDWG: + value->rValue = model->BSIM3v1Sldwg; + return(OK); + case BSIM3v1S_MOD_LDWB: + value->rValue = model->BSIM3v1Sldwb; + return(OK); + case BSIM3v1S_MOD_LB0: + value->rValue = model->BSIM3v1Slb0; + return(OK); + case BSIM3v1S_MOD_LB1: + value->rValue = model->BSIM3v1Slb1; + return(OK); + case BSIM3v1S_MOD_LALPHA0: + value->rValue = model->BSIM3v1Slalpha0; + return(OK); + case BSIM3v1S_MOD_LBETA0: + value->rValue = model->BSIM3v1Slbeta0; + return(OK); + + case BSIM3v1S_MOD_LELM: + value->rValue = model->BSIM3v1Slelm; + return(OK); + case BSIM3v1S_MOD_LCGSL: + value->rValue = model->BSIM3v1Slcgsl; + return(OK); + case BSIM3v1S_MOD_LCGDL: + value->rValue = model->BSIM3v1Slcgdl; + return(OK); + case BSIM3v1S_MOD_LCKAPPA: + value->rValue = model->BSIM3v1Slckappa; + return(OK); + case BSIM3v1S_MOD_LCF: + value->rValue = model->BSIM3v1Slcf; + return(OK); + case BSIM3v1S_MOD_LCLC: + value->rValue = model->BSIM3v1Slclc; + return(OK); + case BSIM3v1S_MOD_LCLE: + value->rValue = model->BSIM3v1Slcle; + return(OK); + case BSIM3v1S_MOD_LVFBCV: + value->rValue = model->BSIM3v1Slvfbcv; + return(OK); + + /* Width dependence */ + case BSIM3v1S_MOD_WCDSC : + value->rValue = model->BSIM3v1Swcdsc; + return(OK); + case BSIM3v1S_MOD_WCDSCB : + value->rValue = model->BSIM3v1Swcdscb; + return(OK); + case BSIM3v1S_MOD_WCDSCD : + value->rValue = model->BSIM3v1Swcdscd; + return(OK); + case BSIM3v1S_MOD_WCIT : + value->rValue = model->BSIM3v1Swcit; + return(OK); + case BSIM3v1S_MOD_WNFACTOR : + value->rValue = model->BSIM3v1Swnfactor; + return(OK); + case BSIM3v1S_MOD_WXJ: + value->rValue = model->BSIM3v1Swxj; + return(OK); + case BSIM3v1S_MOD_WVSAT: + value->rValue = model->BSIM3v1Swvsat; + return(OK); + case BSIM3v1S_MOD_WAT: + value->rValue = model->BSIM3v1Swat; + return(OK); + case BSIM3v1S_MOD_WA0: + value->rValue = model->BSIM3v1Swa0; + return(OK); + case BSIM3v1S_MOD_WAGS: + value->rValue = model->BSIM3v1Swags; + return(OK); + case BSIM3v1S_MOD_WA1: + value->rValue = model->BSIM3v1Swa1; + return(OK); + case BSIM3v1S_MOD_WA2: + value->rValue = model->BSIM3v1Swa2; + return(OK); + case BSIM3v1S_MOD_WKETA: + value->rValue = model->BSIM3v1Swketa; + return(OK); + case BSIM3v1S_MOD_WNSUB: + value->rValue = model->BSIM3v1Swnsub; + return(OK); + case BSIM3v1S_MOD_WNPEAK: + value->rValue = model->BSIM3v1Swnpeak; + return(OK); + case BSIM3v1S_MOD_WNGATE: + value->rValue = model->BSIM3v1Swngate; + return(OK); + case BSIM3v1S_MOD_WGAMMA1: + value->rValue = model->BSIM3v1Swgamma1; + return(OK); + case BSIM3v1S_MOD_WGAMMA2: + value->rValue = model->BSIM3v1Swgamma2; + return(OK); + case BSIM3v1S_MOD_WVBX: + value->rValue = model->BSIM3v1Swvbx; + return(OK); + case BSIM3v1S_MOD_WVBM: + value->rValue = model->BSIM3v1Swvbm; + return(OK); + case BSIM3v1S_MOD_WXT: + value->rValue = model->BSIM3v1Swxt; + return(OK); + case BSIM3v1S_MOD_WK1: + value->rValue = model->BSIM3v1Swk1; + return(OK); + case BSIM3v1S_MOD_WKT1: + value->rValue = model->BSIM3v1Swkt1; + return(OK); + case BSIM3v1S_MOD_WKT1L: + value->rValue = model->BSIM3v1Swkt1l; + return(OK); + case BSIM3v1S_MOD_WKT2 : + value->rValue = model->BSIM3v1Swkt2; + return(OK); + case BSIM3v1S_MOD_WK2 : + value->rValue = model->BSIM3v1Swk2; + return(OK); + case BSIM3v1S_MOD_WK3: + value->rValue = model->BSIM3v1Swk3; + return(OK); + case BSIM3v1S_MOD_WK3B: + value->rValue = model->BSIM3v1Swk3b; + return(OK); + case BSIM3v1S_MOD_WW0: + value->rValue = model->BSIM3v1Sww0; + return(OK); + case BSIM3v1S_MOD_WNLX: + value->rValue = model->BSIM3v1Swnlx; + return(OK); + case BSIM3v1S_MOD_WDVT0: + value->rValue = model->BSIM3v1Swdvt0; + return(OK); + case BSIM3v1S_MOD_WDVT1 : + value->rValue = model->BSIM3v1Swdvt1; + return(OK); + case BSIM3v1S_MOD_WDVT2 : + value->rValue = model->BSIM3v1Swdvt2; + return(OK); + case BSIM3v1S_MOD_WDVT0W : + value->rValue = model->BSIM3v1Swdvt0w; + return(OK); + case BSIM3v1S_MOD_WDVT1W : + value->rValue = model->BSIM3v1Swdvt1w; + return(OK); + case BSIM3v1S_MOD_WDVT2W : + value->rValue = model->BSIM3v1Swdvt2w; + return(OK); + case BSIM3v1S_MOD_WDROUT : + value->rValue = model->BSIM3v1Swdrout; + return(OK); + case BSIM3v1S_MOD_WDSUB : + value->rValue = model->BSIM3v1Swdsub; + return(OK); + case BSIM3v1S_MOD_WVTH0: + value->rValue = model->BSIM3v1Swvth0; + return(OK); + case BSIM3v1S_MOD_WUA: + value->rValue = model->BSIM3v1Swua; + return(OK); + case BSIM3v1S_MOD_WUA1: + value->rValue = model->BSIM3v1Swua1; + return(OK); + case BSIM3v1S_MOD_WUB: + value->rValue = model->BSIM3v1Swub; + return(OK); + case BSIM3v1S_MOD_WUB1: + value->rValue = model->BSIM3v1Swub1; + return(OK); + case BSIM3v1S_MOD_WUC: + value->rValue = model->BSIM3v1Swuc; + return(OK); + case BSIM3v1S_MOD_WUC1: + value->rValue = model->BSIM3v1Swuc1; + return(OK); + case BSIM3v1S_MOD_WU0: + value->rValue = model->BSIM3v1Swu0; + return(OK); + case BSIM3v1S_MOD_WUTE: + value->rValue = model->BSIM3v1Swute; + return(OK); + case BSIM3v1S_MOD_WVOFF: + value->rValue = model->BSIM3v1Swvoff; + return(OK); + case BSIM3v1S_MOD_WDELTA: + value->rValue = model->BSIM3v1Swdelta; + return(OK); + case BSIM3v1S_MOD_WRDSW: + value->rValue = model->BSIM3v1Swrdsw; + return(OK); + case BSIM3v1S_MOD_WPRWB: + value->rValue = model->BSIM3v1Swprwb; + return(OK); + case BSIM3v1S_MOD_WPRWG: + value->rValue = model->BSIM3v1Swprwg; + return(OK); + case BSIM3v1S_MOD_WPRT: + value->rValue = model->BSIM3v1Swprt; + return(OK); + case BSIM3v1S_MOD_WETA0: + value->rValue = model->BSIM3v1Sweta0; + return(OK); + case BSIM3v1S_MOD_WETAB: + value->rValue = model->BSIM3v1Swetab; + return(OK); + case BSIM3v1S_MOD_WPCLM: + value->rValue = model->BSIM3v1Swpclm; + return(OK); + case BSIM3v1S_MOD_WPDIBL1: + value->rValue = model->BSIM3v1Swpdibl1; + return(OK); + case BSIM3v1S_MOD_WPDIBL2: + value->rValue = model->BSIM3v1Swpdibl2; + return(OK); + case BSIM3v1S_MOD_WPDIBLB: + value->rValue = model->BSIM3v1Swpdiblb; + return(OK); + case BSIM3v1S_MOD_WPSCBE1: + value->rValue = model->BSIM3v1Swpscbe1; + return(OK); + case BSIM3v1S_MOD_WPSCBE2: + value->rValue = model->BSIM3v1Swpscbe2; + return(OK); + case BSIM3v1S_MOD_WPVAG: + value->rValue = model->BSIM3v1Swpvag; + return(OK); + case BSIM3v1S_MOD_WWR: + value->rValue = model->BSIM3v1Swwr; + return(OK); + case BSIM3v1S_MOD_WDWG: + value->rValue = model->BSIM3v1Swdwg; + return(OK); + case BSIM3v1S_MOD_WDWB: + value->rValue = model->BSIM3v1Swdwb; + return(OK); + case BSIM3v1S_MOD_WB0: + value->rValue = model->BSIM3v1Swb0; + return(OK); + case BSIM3v1S_MOD_WB1: + value->rValue = model->BSIM3v1Swb1; + return(OK); + case BSIM3v1S_MOD_WALPHA0: + value->rValue = model->BSIM3v1Swalpha0; + return(OK); + case BSIM3v1S_MOD_WBETA0: + value->rValue = model->BSIM3v1Swbeta0; + return(OK); + + case BSIM3v1S_MOD_WELM: + value->rValue = model->BSIM3v1Swelm; + return(OK); + case BSIM3v1S_MOD_WCGSL: + value->rValue = model->BSIM3v1Swcgsl; + return(OK); + case BSIM3v1S_MOD_WCGDL: + value->rValue = model->BSIM3v1Swcgdl; + return(OK); + case BSIM3v1S_MOD_WCKAPPA: + value->rValue = model->BSIM3v1Swckappa; + return(OK); + case BSIM3v1S_MOD_WCF: + value->rValue = model->BSIM3v1Swcf; + return(OK); + case BSIM3v1S_MOD_WCLC: + value->rValue = model->BSIM3v1Swclc; + return(OK); + case BSIM3v1S_MOD_WCLE: + value->rValue = model->BSIM3v1Swcle; + return(OK); + case BSIM3v1S_MOD_WVFBCV: + value->rValue = model->BSIM3v1Swvfbcv; + return(OK); + + /* Cross-term dependence */ + case BSIM3v1S_MOD_PCDSC : + value->rValue = model->BSIM3v1Spcdsc; + return(OK); + case BSIM3v1S_MOD_PCDSCB : + value->rValue = model->BSIM3v1Spcdscb; + return(OK); + case BSIM3v1S_MOD_PCDSCD : + value->rValue = model->BSIM3v1Spcdscd; + return(OK); + case BSIM3v1S_MOD_PCIT : + value->rValue = model->BSIM3v1Spcit; + return(OK); + case BSIM3v1S_MOD_PNFACTOR : + value->rValue = model->BSIM3v1Spnfactor; + return(OK); + case BSIM3v1S_MOD_PXJ: + value->rValue = model->BSIM3v1Spxj; + return(OK); + case BSIM3v1S_MOD_PVSAT: + value->rValue = model->BSIM3v1Spvsat; + return(OK); + case BSIM3v1S_MOD_PAT: + value->rValue = model->BSIM3v1Spat; + return(OK); + case BSIM3v1S_MOD_PA0: + value->rValue = model->BSIM3v1Spa0; + return(OK); + case BSIM3v1S_MOD_PAGS: + value->rValue = model->BSIM3v1Spags; + return(OK); + case BSIM3v1S_MOD_PA1: + value->rValue = model->BSIM3v1Spa1; + return(OK); + case BSIM3v1S_MOD_PA2: + value->rValue = model->BSIM3v1Spa2; + return(OK); + case BSIM3v1S_MOD_PKETA: + value->rValue = model->BSIM3v1Spketa; + return(OK); + case BSIM3v1S_MOD_PNSUB: + value->rValue = model->BSIM3v1Spnsub; + return(OK); + case BSIM3v1S_MOD_PNPEAK: + value->rValue = model->BSIM3v1Spnpeak; + return(OK); + case BSIM3v1S_MOD_PNGATE: + value->rValue = model->BSIM3v1Spngate; + return(OK); + case BSIM3v1S_MOD_PGAMMA1: + value->rValue = model->BSIM3v1Spgamma1; + return(OK); + case BSIM3v1S_MOD_PGAMMA2: + value->rValue = model->BSIM3v1Spgamma2; + return(OK); + case BSIM3v1S_MOD_PVBX: + value->rValue = model->BSIM3v1Spvbx; + return(OK); + case BSIM3v1S_MOD_PVBM: + value->rValue = model->BSIM3v1Spvbm; + return(OK); + case BSIM3v1S_MOD_PXT: + value->rValue = model->BSIM3v1Spxt; + return(OK); + case BSIM3v1S_MOD_PK1: + value->rValue = model->BSIM3v1Spk1; + return(OK); + case BSIM3v1S_MOD_PKT1: + value->rValue = model->BSIM3v1Spkt1; + return(OK); + case BSIM3v1S_MOD_PKT1L: + value->rValue = model->BSIM3v1Spkt1l; + return(OK); + case BSIM3v1S_MOD_PKT2 : + value->rValue = model->BSIM3v1Spkt2; + return(OK); + case BSIM3v1S_MOD_PK2 : + value->rValue = model->BSIM3v1Spk2; + return(OK); + case BSIM3v1S_MOD_PK3: + value->rValue = model->BSIM3v1Spk3; + return(OK); + case BSIM3v1S_MOD_PK3B: + value->rValue = model->BSIM3v1Spk3b; + return(OK); + case BSIM3v1S_MOD_PW0: + value->rValue = model->BSIM3v1Spw0; + return(OK); + case BSIM3v1S_MOD_PNLX: + value->rValue = model->BSIM3v1Spnlx; + return(OK); + case BSIM3v1S_MOD_PDVT0 : + value->rValue = model->BSIM3v1Spdvt0; + return(OK); + case BSIM3v1S_MOD_PDVT1 : + value->rValue = model->BSIM3v1Spdvt1; + return(OK); + case BSIM3v1S_MOD_PDVT2 : + value->rValue = model->BSIM3v1Spdvt2; + return(OK); + case BSIM3v1S_MOD_PDVT0W : + value->rValue = model->BSIM3v1Spdvt0w; + return(OK); + case BSIM3v1S_MOD_PDVT1W : + value->rValue = model->BSIM3v1Spdvt1w; + return(OK); + case BSIM3v1S_MOD_PDVT2W : + value->rValue = model->BSIM3v1Spdvt2w; + return(OK); + case BSIM3v1S_MOD_PDROUT : + value->rValue = model->BSIM3v1Spdrout; + return(OK); + case BSIM3v1S_MOD_PDSUB : + value->rValue = model->BSIM3v1Spdsub; + return(OK); + case BSIM3v1S_MOD_PVTH0: + value->rValue = model->BSIM3v1Spvth0; + return(OK); + case BSIM3v1S_MOD_PUA: + value->rValue = model->BSIM3v1Spua; + return(OK); + case BSIM3v1S_MOD_PUA1: + value->rValue = model->BSIM3v1Spua1; + return(OK); + case BSIM3v1S_MOD_PUB: + value->rValue = model->BSIM3v1Spub; + return(OK); + case BSIM3v1S_MOD_PUB1: + value->rValue = model->BSIM3v1Spub1; + return(OK); + case BSIM3v1S_MOD_PUC: + value->rValue = model->BSIM3v1Spuc; + return(OK); + case BSIM3v1S_MOD_PUC1: + value->rValue = model->BSIM3v1Spuc1; + return(OK); + case BSIM3v1S_MOD_PU0: + value->rValue = model->BSIM3v1Spu0; + return(OK); + case BSIM3v1S_MOD_PUTE: + value->rValue = model->BSIM3v1Spute; + return(OK); + case BSIM3v1S_MOD_PVOFF: + value->rValue = model->BSIM3v1Spvoff; + return(OK); + case BSIM3v1S_MOD_PDELTA: + value->rValue = model->BSIM3v1Spdelta; + return(OK); + case BSIM3v1S_MOD_PRDSW: + value->rValue = model->BSIM3v1Sprdsw; + return(OK); + case BSIM3v1S_MOD_PPRWB: + value->rValue = model->BSIM3v1Spprwb; + return(OK); + case BSIM3v1S_MOD_PPRWG: + value->rValue = model->BSIM3v1Spprwg; + return(OK); + case BSIM3v1S_MOD_PPRT: + value->rValue = model->BSIM3v1Spprt; + return(OK); + case BSIM3v1S_MOD_PETA0: + value->rValue = model->BSIM3v1Speta0; + return(OK); + case BSIM3v1S_MOD_PETAB: + value->rValue = model->BSIM3v1Spetab; + return(OK); + case BSIM3v1S_MOD_PPCLM: + value->rValue = model->BSIM3v1Sppclm; + return(OK); + case BSIM3v1S_MOD_PPDIBL1: + value->rValue = model->BSIM3v1Sppdibl1; + return(OK); + case BSIM3v1S_MOD_PPDIBL2: + value->rValue = model->BSIM3v1Sppdibl2; + return(OK); + case BSIM3v1S_MOD_PPDIBLB: + value->rValue = model->BSIM3v1Sppdiblb; + return(OK); + case BSIM3v1S_MOD_PPSCBE1: + value->rValue = model->BSIM3v1Sppscbe1; + return(OK); + case BSIM3v1S_MOD_PPSCBE2: + value->rValue = model->BSIM3v1Sppscbe2; + return(OK); + case BSIM3v1S_MOD_PPVAG: + value->rValue = model->BSIM3v1Sppvag; + return(OK); + case BSIM3v1S_MOD_PWR: + value->rValue = model->BSIM3v1Spwr; + return(OK); + case BSIM3v1S_MOD_PDWG: + value->rValue = model->BSIM3v1Spdwg; + return(OK); + case BSIM3v1S_MOD_PDWB: + value->rValue = model->BSIM3v1Spdwb; + return(OK); + case BSIM3v1S_MOD_PB0: + value->rValue = model->BSIM3v1Spb0; + return(OK); + case BSIM3v1S_MOD_PB1: + value->rValue = model->BSIM3v1Spb1; + return(OK); + case BSIM3v1S_MOD_PALPHA0: + value->rValue = model->BSIM3v1Spalpha0; + return(OK); + case BSIM3v1S_MOD_PBETA0: + value->rValue = model->BSIM3v1Spbeta0; + return(OK); + + case BSIM3v1S_MOD_PELM: + value->rValue = model->BSIM3v1Spelm; + return(OK); + case BSIM3v1S_MOD_PCGSL: + value->rValue = model->BSIM3v1Spcgsl; + return(OK); + case BSIM3v1S_MOD_PCGDL: + value->rValue = model->BSIM3v1Spcgdl; + return(OK); + case BSIM3v1S_MOD_PCKAPPA: + value->rValue = model->BSIM3v1Spckappa; + return(OK); + case BSIM3v1S_MOD_PCF: + value->rValue = model->BSIM3v1Spcf; + return(OK); + case BSIM3v1S_MOD_PCLC: + value->rValue = model->BSIM3v1Spclc; + return(OK); + case BSIM3v1S_MOD_PCLE: + value->rValue = model->BSIM3v1Spcle; + return(OK); + case BSIM3v1S_MOD_PVFBCV: + value->rValue = model->BSIM3v1Spvfbcv; + return(OK); + + case BSIM3v1S_MOD_TNOM : + value->rValue = model->BSIM3v1Stnom; + return(OK); + case BSIM3v1S_MOD_CGSO: + value->rValue = model->BSIM3v1Scgso; + return(OK); + case BSIM3v1S_MOD_CGDO: + value->rValue = model->BSIM3v1Scgdo; + return(OK); + case BSIM3v1S_MOD_CGBO: + value->rValue = model->BSIM3v1Scgbo; + return(OK); + case BSIM3v1S_MOD_XPART: + value->rValue = model->BSIM3v1Sxpart; + return(OK); + case BSIM3v1S_MOD_RSH: + value->rValue = model->BSIM3v1SsheetResistance; + return(OK); + case BSIM3v1S_MOD_JS: + value->rValue = model->BSIM3v1SjctSatCurDensity; + return(OK); + case BSIM3v1S_MOD_JSW: + value->rValue = model->BSIM3v1SjctSidewallSatCurDensity; + return(OK); + case BSIM3v1S_MOD_PB: + value->rValue = model->BSIM3v1SbulkJctPotential; + return(OK); + case BSIM3v1S_MOD_MJ: + value->rValue = model->BSIM3v1SbulkJctBotGradingCoeff; + return(OK); + case BSIM3v1S_MOD_PBSW: + value->rValue = model->BSIM3v1SsidewallJctPotential; + return(OK); + case BSIM3v1S_MOD_MJSW: + value->rValue = model->BSIM3v1SbulkJctSideGradingCoeff; + return(OK); + case BSIM3v1S_MOD_CJ: + value->rValue = model->BSIM3v1SunitAreaJctCap; + return(OK); + case BSIM3v1S_MOD_CJSW: + value->rValue = model->BSIM3v1SunitLengthSidewallJctCap; + return(OK); + case BSIM3v1S_MOD_PBSWG: + value->rValue = model->BSIM3v1SGatesidewallJctPotential; + return(OK); + case BSIM3v1S_MOD_MJSWG: + value->rValue = model->BSIM3v1SbulkJctGateSideGradingCoeff; + return(OK); + case BSIM3v1S_MOD_CJSWG: + value->rValue = model->BSIM3v1SunitLengthGateSidewallJctCap; + return(OK); + case BSIM3v1S_MOD_NJ: + value->rValue = model->BSIM3v1SjctEmissionCoeff; + return(OK); + case BSIM3v1S_MOD_XTI: + value->rValue = model->BSIM3v1SjctTempExponent; + return(OK); + case BSIM3v1S_MOD_LINT: + value->rValue = model->BSIM3v1SLint; + return(OK); + case BSIM3v1S_MOD_LL: + value->rValue = model->BSIM3v1SLl; + return(OK); + case BSIM3v1S_MOD_LLN: + value->rValue = model->BSIM3v1SLln; + return(OK); + case BSIM3v1S_MOD_LW: + value->rValue = model->BSIM3v1SLw; + return(OK); + case BSIM3v1S_MOD_LWN: + value->rValue = model->BSIM3v1SLwn; + return(OK); + case BSIM3v1S_MOD_LWL: + value->rValue = model->BSIM3v1SLwl; + return(OK); + case BSIM3v1S_MOD_LMIN: + value->rValue = model->BSIM3v1SLmin; + return(OK); + case BSIM3v1S_MOD_LMAX: + value->rValue = model->BSIM3v1SLmax; + return(OK); + case BSIM3v1S_MOD_WINT: + value->rValue = model->BSIM3v1SWint; + return(OK); + case BSIM3v1S_MOD_WL: + value->rValue = model->BSIM3v1SWl; + return(OK); + case BSIM3v1S_MOD_WLN: + value->rValue = model->BSIM3v1SWln; + return(OK); + case BSIM3v1S_MOD_WW: + value->rValue = model->BSIM3v1SWw; + return(OK); + case BSIM3v1S_MOD_WWN: + value->rValue = model->BSIM3v1SWwn; + return(OK); + case BSIM3v1S_MOD_WWL: + value->rValue = model->BSIM3v1SWwl; + return(OK); + case BSIM3v1S_MOD_WMIN: + value->rValue = model->BSIM3v1SWmin; + return(OK); + case BSIM3v1S_MOD_WMAX: + value->rValue = model->BSIM3v1SWmax; + return(OK); + case BSIM3v1S_MOD_NOIA: + value->rValue = model->BSIM3v1SoxideTrapDensityA; + return(OK); + case BSIM3v1S_MOD_NOIB: + value->rValue = model->BSIM3v1SoxideTrapDensityB; + return(OK); + case BSIM3v1S_MOD_NOIC: + value->rValue = model->BSIM3v1SoxideTrapDensityC; + return(OK); + case BSIM3v1S_MOD_EM: + value->rValue = model->BSIM3v1Sem; + return(OK); + case BSIM3v1S_MOD_EF: + value->rValue = model->BSIM3v1Sef; + return(OK); + case BSIM3v1S_MOD_AF: + value->rValue = model->BSIM3v1Saf; + return(OK); + case BSIM3v1S_MOD_KF: + value->rValue = model->BSIM3v1Skf; + return(OK); + default: + return(E_BADPARM); + } + /* NOTREACHED */ +} + + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1smdel.c b/src/spicelib/devices/bsim3v1s/b3v1smdel.c new file mode 100644 index 000000000..5d2b03cd4 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1smdel.c @@ -0,0 +1,43 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1mdel.c +**********/ + +#include "ngspice.h" +#include "bsim3v1sdef.h" +#include "sperror.h" +#include "suffix.h" + +int +BSIM3v1SmDelete(GENmodel **inModel, IFuid modname, GENmodel *kill) +{ +BSIM3v1Smodel **model = (BSIM3v1Smodel**)inModel; +BSIM3v1Smodel *modfast = (BSIM3v1Smodel*)kill; +BSIM3v1Sinstance *here; +BSIM3v1Sinstance *prev = NULL; +BSIM3v1Smodel **oldmod; + + oldmod = model; + for (; *model ; model = &((*model)->BSIM3v1SnextModel)) + { if ((*model)->BSIM3v1SmodName == modname || + (modfast && *model == modfast)) + goto delgot; + oldmod = model; + } + return(E_NOMOD); + +delgot: + *oldmod = (*model)->BSIM3v1SnextModel; /* cut deleted device out of list */ + for (here = (*model)->BSIM3v1Sinstances; here; here = here->BSIM3v1SnextInstance) + { if(prev) FREE(prev); + prev = here; + } + if(prev) FREE(prev); + FREE(*model); + return(OK); +} + + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1smpar.c b/src/spicelib/devices/bsim3v1s/b3v1smpar.c new file mode 100644 index 000000000..4c9ffcc5a --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1smpar.c @@ -0,0 +1,1528 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1smpar.c +**********/ + +#include "ngspice.h" +#include "bsim3v1sdef.h" +#include "ifsim.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM3v1SmParam(int param, IFvalue *value, GENmodel *inMod) +{ + BSIM3v1Smodel *mod = (BSIM3v1Smodel*)inMod; + switch(param) + { case BSIM3v1S_MOD_MOBMOD : + mod->BSIM3v1SmobMod = value->iValue; + mod->BSIM3v1SmobModGiven = TRUE; + break; + case BSIM3v1S_MOD_BINUNIT : + mod->BSIM3v1SbinUnit = value->iValue; + mod->BSIM3v1SbinUnitGiven = TRUE; + break; + case BSIM3v1S_MOD_PARAMCHK : + mod->BSIM3v1SparamChk = value->iValue; + mod->BSIM3v1SparamChkGiven = TRUE; + break; + case BSIM3v1S_MOD_CAPMOD : + mod->BSIM3v1ScapMod = value->iValue; + mod->BSIM3v1ScapModGiven = TRUE; + break; + case BSIM3v1S_MOD_NQSMOD : + mod->BSIM3v1SnqsMod = value->iValue; + mod->BSIM3v1SnqsModGiven = TRUE; + break; + case BSIM3v1S_MOD_NOIMOD : + mod->BSIM3v1SnoiMod = value->iValue; + mod->BSIM3v1SnoiModGiven = TRUE; + break; + case BSIM3v1S_MOD_VERSION : + mod->BSIM3v1Sversion = value->rValue; + mod->BSIM3v1SversionGiven = TRUE; + break; + case BSIM3v1S_MOD_TOX : + mod->BSIM3v1Stox = value->rValue; + mod->BSIM3v1StoxGiven = TRUE; + break; + + case BSIM3v1S_MOD_CDSC : + mod->BSIM3v1Scdsc = value->rValue; + mod->BSIM3v1ScdscGiven = TRUE; + break; + case BSIM3v1S_MOD_CDSCB : + mod->BSIM3v1Scdscb = value->rValue; + mod->BSIM3v1ScdscbGiven = TRUE; + break; + + case BSIM3v1S_MOD_CDSCD : + mod->BSIM3v1Scdscd = value->rValue; + mod->BSIM3v1ScdscdGiven = TRUE; + break; + + case BSIM3v1S_MOD_CIT : + mod->BSIM3v1Scit = value->rValue; + mod->BSIM3v1ScitGiven = TRUE; + break; + case BSIM3v1S_MOD_NFACTOR : + mod->BSIM3v1Snfactor = value->rValue; + mod->BSIM3v1SnfactorGiven = TRUE; + break; + case BSIM3v1S_MOD_XJ: + mod->BSIM3v1Sxj = value->rValue; + mod->BSIM3v1SxjGiven = TRUE; + break; + case BSIM3v1S_MOD_VSAT: + mod->BSIM3v1Svsat = value->rValue; + mod->BSIM3v1SvsatGiven = TRUE; + break; + case BSIM3v1S_MOD_A0: + mod->BSIM3v1Sa0 = value->rValue; + mod->BSIM3v1Sa0Given = TRUE; + break; + + case BSIM3v1S_MOD_AGS: + mod->BSIM3v1Sags= value->rValue; + mod->BSIM3v1SagsGiven = TRUE; + break; + + case BSIM3v1S_MOD_A1: + mod->BSIM3v1Sa1 = value->rValue; + mod->BSIM3v1Sa1Given = TRUE; + break; + case BSIM3v1S_MOD_A2: + mod->BSIM3v1Sa2 = value->rValue; + mod->BSIM3v1Sa2Given = TRUE; + break; + case BSIM3v1S_MOD_AT: + mod->BSIM3v1Sat = value->rValue; + mod->BSIM3v1SatGiven = TRUE; + break; + case BSIM3v1S_MOD_KETA: + mod->BSIM3v1Sketa = value->rValue; + mod->BSIM3v1SketaGiven = TRUE; + break; + case BSIM3v1S_MOD_NSUB: + mod->BSIM3v1Snsub = value->rValue; + mod->BSIM3v1SnsubGiven = TRUE; + break; + case BSIM3v1S_MOD_NPEAK: + mod->BSIM3v1Snpeak = value->rValue; + mod->BSIM3v1SnpeakGiven = TRUE; + if (mod->BSIM3v1Snpeak > 1.0e20) + mod->BSIM3v1Snpeak *= 1.0e-6; + break; + case BSIM3v1S_MOD_NGATE: + mod->BSIM3v1Sngate = value->rValue; + mod->BSIM3v1SngateGiven = TRUE; + if (mod->BSIM3v1Sngate > 1.0e23) + mod->BSIM3v1Sngate *= 1.0e-6; + break; + case BSIM3v1S_MOD_GAMMA1: + mod->BSIM3v1Sgamma1 = value->rValue; + mod->BSIM3v1Sgamma1Given = TRUE; + break; + case BSIM3v1S_MOD_GAMMA2: + mod->BSIM3v1Sgamma2 = value->rValue; + mod->BSIM3v1Sgamma2Given = TRUE; + break; + case BSIM3v1S_MOD_VBX: + mod->BSIM3v1Svbx = value->rValue; + mod->BSIM3v1SvbxGiven = TRUE; + break; + case BSIM3v1S_MOD_VBM: + mod->BSIM3v1Svbm = value->rValue; + mod->BSIM3v1SvbmGiven = TRUE; + break; + case BSIM3v1S_MOD_XT: + mod->BSIM3v1Sxt = value->rValue; + mod->BSIM3v1SxtGiven = TRUE; + break; + case BSIM3v1S_MOD_K1: + mod->BSIM3v1Sk1 = value->rValue; + mod->BSIM3v1Sk1Given = TRUE; + break; + case BSIM3v1S_MOD_KT1: + mod->BSIM3v1Skt1 = value->rValue; + mod->BSIM3v1Skt1Given = TRUE; + break; + case BSIM3v1S_MOD_KT1L: + mod->BSIM3v1Skt1l = value->rValue; + mod->BSIM3v1Skt1lGiven = TRUE; + break; + case BSIM3v1S_MOD_KT2: + mod->BSIM3v1Skt2 = value->rValue; + mod->BSIM3v1Skt2Given = TRUE; + break; + case BSIM3v1S_MOD_K2: + mod->BSIM3v1Sk2 = value->rValue; + mod->BSIM3v1Sk2Given = TRUE; + break; + case BSIM3v1S_MOD_K3: + mod->BSIM3v1Sk3 = value->rValue; + mod->BSIM3v1Sk3Given = TRUE; + break; + case BSIM3v1S_MOD_K3B: + mod->BSIM3v1Sk3b = value->rValue; + mod->BSIM3v1Sk3bGiven = TRUE; + break; + case BSIM3v1S_MOD_NLX: + mod->BSIM3v1Snlx = value->rValue; + mod->BSIM3v1SnlxGiven = TRUE; + break; + case BSIM3v1S_MOD_W0: + mod->BSIM3v1Sw0 = value->rValue; + mod->BSIM3v1Sw0Given = TRUE; + break; + case BSIM3v1S_MOD_DVT0: + mod->BSIM3v1Sdvt0 = value->rValue; + mod->BSIM3v1Sdvt0Given = TRUE; + break; + case BSIM3v1S_MOD_DVT1: + mod->BSIM3v1Sdvt1 = value->rValue; + mod->BSIM3v1Sdvt1Given = TRUE; + break; + case BSIM3v1S_MOD_DVT2: + mod->BSIM3v1Sdvt2 = value->rValue; + mod->BSIM3v1Sdvt2Given = TRUE; + break; + case BSIM3v1S_MOD_DVT0W: + mod->BSIM3v1Sdvt0w = value->rValue; + mod->BSIM3v1Sdvt0wGiven = TRUE; + break; + case BSIM3v1S_MOD_DVT1W: + mod->BSIM3v1Sdvt1w = value->rValue; + mod->BSIM3v1Sdvt1wGiven = TRUE; + break; + case BSIM3v1S_MOD_DVT2W: + mod->BSIM3v1Sdvt2w = value->rValue; + mod->BSIM3v1Sdvt2wGiven = TRUE; + break; + case BSIM3v1S_MOD_DROUT: + mod->BSIM3v1Sdrout = value->rValue; + mod->BSIM3v1SdroutGiven = TRUE; + break; + case BSIM3v1S_MOD_DSUB: + mod->BSIM3v1Sdsub = value->rValue; + mod->BSIM3v1SdsubGiven = TRUE; + break; + case BSIM3v1S_MOD_VTH0: + mod->BSIM3v1Svth0 = value->rValue; + mod->BSIM3v1Svth0Given = TRUE; + break; + case BSIM3v1S_MOD_UA: + mod->BSIM3v1Sua = value->rValue; + mod->BSIM3v1SuaGiven = TRUE; + break; + case BSIM3v1S_MOD_UA1: + mod->BSIM3v1Sua1 = value->rValue; + mod->BSIM3v1Sua1Given = TRUE; + break; + case BSIM3v1S_MOD_UB: + mod->BSIM3v1Sub = value->rValue; + mod->BSIM3v1SubGiven = TRUE; + break; + case BSIM3v1S_MOD_UB1: + mod->BSIM3v1Sub1 = value->rValue; + mod->BSIM3v1Sub1Given = TRUE; + break; + case BSIM3v1S_MOD_UC: + mod->BSIM3v1Suc = value->rValue; + mod->BSIM3v1SucGiven = TRUE; + break; + case BSIM3v1S_MOD_UC1: + mod->BSIM3v1Suc1 = value->rValue; + mod->BSIM3v1Suc1Given = TRUE; + break; + case BSIM3v1S_MOD_U0 : + mod->BSIM3v1Su0 = value->rValue; + mod->BSIM3v1Su0Given = TRUE; + break; + case BSIM3v1S_MOD_UTE : + mod->BSIM3v1Sute = value->rValue; + mod->BSIM3v1SuteGiven = TRUE; + break; + case BSIM3v1S_MOD_VOFF: + mod->BSIM3v1Svoff = value->rValue; + mod->BSIM3v1SvoffGiven = TRUE; + break; + case BSIM3v1S_MOD_DELTA : + mod->BSIM3v1Sdelta = value->rValue; + mod->BSIM3v1SdeltaGiven = TRUE; + break; + case BSIM3v1S_MOD_RDSW: + mod->BSIM3v1Srdsw = value->rValue; + mod->BSIM3v1SrdswGiven = TRUE; + break; + case BSIM3v1S_MOD_PRWG: + mod->BSIM3v1Sprwg = value->rValue; + mod->BSIM3v1SprwgGiven = TRUE; + break; + case BSIM3v1S_MOD_PRWB: + mod->BSIM3v1Sprwb = value->rValue; + mod->BSIM3v1SprwbGiven = TRUE; + break; + case BSIM3v1S_MOD_PRT: + mod->BSIM3v1Sprt = value->rValue; + mod->BSIM3v1SprtGiven = TRUE; + break; + case BSIM3v1S_MOD_ETA0: + mod->BSIM3v1Seta0 = value->rValue; + mod->BSIM3v1Seta0Given = TRUE; + break; + case BSIM3v1S_MOD_ETAB: + mod->BSIM3v1Setab = value->rValue; + mod->BSIM3v1SetabGiven = TRUE; + break; + case BSIM3v1S_MOD_PCLM: + mod->BSIM3v1Spclm = value->rValue; + mod->BSIM3v1SpclmGiven = TRUE; + break; + case BSIM3v1S_MOD_PDIBL1: + mod->BSIM3v1Spdibl1 = value->rValue; + mod->BSIM3v1Spdibl1Given = TRUE; + break; + case BSIM3v1S_MOD_PDIBL2: + mod->BSIM3v1Spdibl2 = value->rValue; + mod->BSIM3v1Spdibl2Given = TRUE; + break; + case BSIM3v1S_MOD_PDIBLB: + mod->BSIM3v1Spdiblb = value->rValue; + mod->BSIM3v1SpdiblbGiven = TRUE; + break; + case BSIM3v1S_MOD_PSCBE1: + mod->BSIM3v1Spscbe1 = value->rValue; + mod->BSIM3v1Spscbe1Given = TRUE; + break; + case BSIM3v1S_MOD_PSCBE2: + mod->BSIM3v1Spscbe2 = value->rValue; + mod->BSIM3v1Spscbe2Given = TRUE; + break; + case BSIM3v1S_MOD_PVAG: + mod->BSIM3v1Spvag = value->rValue; + mod->BSIM3v1SpvagGiven = TRUE; + break; + case BSIM3v1S_MOD_WR : + mod->BSIM3v1Swr = value->rValue; + mod->BSIM3v1SwrGiven = TRUE; + break; + case BSIM3v1S_MOD_DWG : + mod->BSIM3v1Sdwg = value->rValue; + mod->BSIM3v1SdwgGiven = TRUE; + break; + case BSIM3v1S_MOD_DWB : + mod->BSIM3v1Sdwb = value->rValue; + mod->BSIM3v1SdwbGiven = TRUE; + break; + case BSIM3v1S_MOD_B0 : + mod->BSIM3v1Sb0 = value->rValue; + mod->BSIM3v1Sb0Given = TRUE; + break; + case BSIM3v1S_MOD_B1 : + mod->BSIM3v1Sb1 = value->rValue; + mod->BSIM3v1Sb1Given = TRUE; + break; + case BSIM3v1S_MOD_ALPHA0 : + mod->BSIM3v1Salpha0 = value->rValue; + mod->BSIM3v1Salpha0Given = TRUE; + break; + case BSIM3v1S_MOD_BETA0 : + mod->BSIM3v1Sbeta0 = value->rValue; + mod->BSIM3v1Sbeta0Given = TRUE; + break; + + case BSIM3v1S_MOD_ELM : + mod->BSIM3v1Selm = value->rValue; + mod->BSIM3v1SelmGiven = TRUE; + break; + case BSIM3v1S_MOD_CGSL : + mod->BSIM3v1Scgsl = value->rValue; + mod->BSIM3v1ScgslGiven = TRUE; + break; + case BSIM3v1S_MOD_CGDL : + mod->BSIM3v1Scgdl = value->rValue; + mod->BSIM3v1ScgdlGiven = TRUE; + break; + case BSIM3v1S_MOD_CKAPPA : + mod->BSIM3v1Sckappa = value->rValue; + mod->BSIM3v1SckappaGiven = TRUE; + break; + case BSIM3v1S_MOD_CF : + mod->BSIM3v1Scf = value->rValue; + mod->BSIM3v1ScfGiven = TRUE; + break; + case BSIM3v1S_MOD_CLC : + mod->BSIM3v1Sclc = value->rValue; + mod->BSIM3v1SclcGiven = TRUE; + break; + case BSIM3v1S_MOD_CLE : + mod->BSIM3v1Scle = value->rValue; + mod->BSIM3v1ScleGiven = TRUE; + break; + case BSIM3v1S_MOD_DWC : + mod->BSIM3v1Sdwc = value->rValue; + mod->BSIM3v1SdwcGiven = TRUE; + break; + case BSIM3v1S_MOD_DLC : + mod->BSIM3v1Sdlc = value->rValue; + mod->BSIM3v1SdlcGiven = TRUE; + break; + case BSIM3v1S_MOD_VFBCV : + mod->BSIM3v1Svfbcv = value->rValue; + mod->BSIM3v1SvfbcvGiven = TRUE; + break; + + /* Length dependence */ + case BSIM3v1S_MOD_LCDSC : + mod->BSIM3v1Slcdsc = value->rValue; + mod->BSIM3v1SlcdscGiven = TRUE; + break; + + + case BSIM3v1S_MOD_LCDSCB : + mod->BSIM3v1Slcdscb = value->rValue; + mod->BSIM3v1SlcdscbGiven = TRUE; + break; + case BSIM3v1S_MOD_LCDSCD : + mod->BSIM3v1Slcdscd = value->rValue; + mod->BSIM3v1SlcdscdGiven = TRUE; + break; + case BSIM3v1S_MOD_LCIT : + mod->BSIM3v1Slcit = value->rValue; + mod->BSIM3v1SlcitGiven = TRUE; + break; + case BSIM3v1S_MOD_LNFACTOR : + mod->BSIM3v1Slnfactor = value->rValue; + mod->BSIM3v1SlnfactorGiven = TRUE; + break; + case BSIM3v1S_MOD_LXJ: + mod->BSIM3v1Slxj = value->rValue; + mod->BSIM3v1SlxjGiven = TRUE; + break; + case BSIM3v1S_MOD_LVSAT: + mod->BSIM3v1Slvsat = value->rValue; + mod->BSIM3v1SlvsatGiven = TRUE; + break; + + + case BSIM3v1S_MOD_LA0: + mod->BSIM3v1Sla0 = value->rValue; + mod->BSIM3v1Sla0Given = TRUE; + break; + case BSIM3v1S_MOD_LAGS: + mod->BSIM3v1Slags = value->rValue; + mod->BSIM3v1SlagsGiven = TRUE; + break; + case BSIM3v1S_MOD_LA1: + mod->BSIM3v1Sla1 = value->rValue; + mod->BSIM3v1Sla1Given = TRUE; + break; + case BSIM3v1S_MOD_LA2: + mod->BSIM3v1Sla2 = value->rValue; + mod->BSIM3v1Sla2Given = TRUE; + break; + case BSIM3v1S_MOD_LAT: + mod->BSIM3v1Slat = value->rValue; + mod->BSIM3v1SlatGiven = TRUE; + break; + case BSIM3v1S_MOD_LKETA: + mod->BSIM3v1Slketa = value->rValue; + mod->BSIM3v1SlketaGiven = TRUE; + break; + case BSIM3v1S_MOD_LNSUB: + mod->BSIM3v1Slnsub = value->rValue; + mod->BSIM3v1SlnsubGiven = TRUE; + break; + case BSIM3v1S_MOD_LNPEAK: + mod->BSIM3v1Slnpeak = value->rValue; + mod->BSIM3v1SlnpeakGiven = TRUE; + if (mod->BSIM3v1Slnpeak > 1.0e20) + mod->BSIM3v1Slnpeak *= 1.0e-6; + break; + case BSIM3v1S_MOD_LNGATE: + mod->BSIM3v1Slngate = value->rValue; + mod->BSIM3v1SlngateGiven = TRUE; + if (mod->BSIM3v1Slngate > 1.0e23) + mod->BSIM3v1Slngate *= 1.0e-6; + break; + case BSIM3v1S_MOD_LGAMMA1: + mod->BSIM3v1Slgamma1 = value->rValue; + mod->BSIM3v1Slgamma1Given = TRUE; + break; + case BSIM3v1S_MOD_LGAMMA2: + mod->BSIM3v1Slgamma2 = value->rValue; + mod->BSIM3v1Slgamma2Given = TRUE; + break; + case BSIM3v1S_MOD_LVBX: + mod->BSIM3v1Slvbx = value->rValue; + mod->BSIM3v1SlvbxGiven = TRUE; + break; + case BSIM3v1S_MOD_LVBM: + mod->BSIM3v1Slvbm = value->rValue; + mod->BSIM3v1SlvbmGiven = TRUE; + break; + case BSIM3v1S_MOD_LXT: + mod->BSIM3v1Slxt = value->rValue; + mod->BSIM3v1SlxtGiven = TRUE; + break; + case BSIM3v1S_MOD_LK1: + mod->BSIM3v1Slk1 = value->rValue; + mod->BSIM3v1Slk1Given = TRUE; + break; + case BSIM3v1S_MOD_LKT1: + mod->BSIM3v1Slkt1 = value->rValue; + mod->BSIM3v1Slkt1Given = TRUE; + break; + case BSIM3v1S_MOD_LKT1L: + mod->BSIM3v1Slkt1l = value->rValue; + mod->BSIM3v1Slkt1lGiven = TRUE; + break; + case BSIM3v1S_MOD_LKT2: + mod->BSIM3v1Slkt2 = value->rValue; + mod->BSIM3v1Slkt2Given = TRUE; + break; + case BSIM3v1S_MOD_LK2: + mod->BSIM3v1Slk2 = value->rValue; + mod->BSIM3v1Slk2Given = TRUE; + break; + case BSIM3v1S_MOD_LK3: + mod->BSIM3v1Slk3 = value->rValue; + mod->BSIM3v1Slk3Given = TRUE; + break; + case BSIM3v1S_MOD_LK3B: + mod->BSIM3v1Slk3b = value->rValue; + mod->BSIM3v1Slk3bGiven = TRUE; + break; + case BSIM3v1S_MOD_LNLX: + mod->BSIM3v1Slnlx = value->rValue; + mod->BSIM3v1SlnlxGiven = TRUE; + break; + case BSIM3v1S_MOD_LW0: + mod->BSIM3v1Slw0 = value->rValue; + mod->BSIM3v1Slw0Given = TRUE; + break; + case BSIM3v1S_MOD_LDVT0: + mod->BSIM3v1Sldvt0 = value->rValue; + mod->BSIM3v1Sldvt0Given = TRUE; + break; + case BSIM3v1S_MOD_LDVT1: + mod->BSIM3v1Sldvt1 = value->rValue; + mod->BSIM3v1Sldvt1Given = TRUE; + break; + case BSIM3v1S_MOD_LDVT2: + mod->BSIM3v1Sldvt2 = value->rValue; + mod->BSIM3v1Sldvt2Given = TRUE; + break; + case BSIM3v1S_MOD_LDVT0W: + mod->BSIM3v1Sldvt0w = value->rValue; + mod->BSIM3v1Sldvt0Given = TRUE; + break; + case BSIM3v1S_MOD_LDVT1W: + mod->BSIM3v1Sldvt1w = value->rValue; + mod->BSIM3v1Sldvt1wGiven = TRUE; + break; + case BSIM3v1S_MOD_LDVT2W: + mod->BSIM3v1Sldvt2w = value->rValue; + mod->BSIM3v1Sldvt2wGiven = TRUE; + break; + case BSIM3v1S_MOD_LDROUT: + mod->BSIM3v1Sldrout = value->rValue; + mod->BSIM3v1SldroutGiven = TRUE; + break; + case BSIM3v1S_MOD_LDSUB: + mod->BSIM3v1Sldsub = value->rValue; + mod->BSIM3v1SldsubGiven = TRUE; + break; + case BSIM3v1S_MOD_LVTH0: + mod->BSIM3v1Slvth0 = value->rValue; + mod->BSIM3v1Slvth0Given = TRUE; + break; + case BSIM3v1S_MOD_LUA: + mod->BSIM3v1Slua = value->rValue; + mod->BSIM3v1SluaGiven = TRUE; + break; + case BSIM3v1S_MOD_LUA1: + mod->BSIM3v1Slua1 = value->rValue; + mod->BSIM3v1Slua1Given = TRUE; + break; + case BSIM3v1S_MOD_LUB: + mod->BSIM3v1Slub = value->rValue; + mod->BSIM3v1SlubGiven = TRUE; + break; + case BSIM3v1S_MOD_LUB1: + mod->BSIM3v1Slub1 = value->rValue; + mod->BSIM3v1Slub1Given = TRUE; + break; + case BSIM3v1S_MOD_LUC: + mod->BSIM3v1Sluc = value->rValue; + mod->BSIM3v1SlucGiven = TRUE; + break; + case BSIM3v1S_MOD_LUC1: + mod->BSIM3v1Sluc1 = value->rValue; + mod->BSIM3v1Sluc1Given = TRUE; + break; + case BSIM3v1S_MOD_LU0 : + mod->BSIM3v1Slu0 = value->rValue; + mod->BSIM3v1Slu0Given = TRUE; + break; + case BSIM3v1S_MOD_LUTE : + mod->BSIM3v1Slute = value->rValue; + mod->BSIM3v1SluteGiven = TRUE; + break; + case BSIM3v1S_MOD_LVOFF: + mod->BSIM3v1Slvoff = value->rValue; + mod->BSIM3v1SlvoffGiven = TRUE; + break; + case BSIM3v1S_MOD_LDELTA : + mod->BSIM3v1Sldelta = value->rValue; + mod->BSIM3v1SldeltaGiven = TRUE; + break; + case BSIM3v1S_MOD_LRDSW: + mod->BSIM3v1Slrdsw = value->rValue; + mod->BSIM3v1SlrdswGiven = TRUE; + break; + case BSIM3v1S_MOD_LPRWB: + mod->BSIM3v1Slprwb = value->rValue; + mod->BSIM3v1SlprwbGiven = TRUE; + break; + case BSIM3v1S_MOD_LPRWG: + mod->BSIM3v1Slprwg = value->rValue; + mod->BSIM3v1SlprwgGiven = TRUE; + break; + case BSIM3v1S_MOD_LPRT: + mod->BSIM3v1Slprt = value->rValue; + mod->BSIM3v1SlprtGiven = TRUE; + break; + case BSIM3v1S_MOD_LETA0: + mod->BSIM3v1Sleta0 = value->rValue; + mod->BSIM3v1Sleta0Given = TRUE; + break; + case BSIM3v1S_MOD_LETAB: + mod->BSIM3v1Sletab = value->rValue; + mod->BSIM3v1SletabGiven = TRUE; + break; + case BSIM3v1S_MOD_LPCLM: + mod->BSIM3v1Slpclm = value->rValue; + mod->BSIM3v1SlpclmGiven = TRUE; + break; + case BSIM3v1S_MOD_LPDIBL1: + mod->BSIM3v1Slpdibl1 = value->rValue; + mod->BSIM3v1Slpdibl1Given = TRUE; + break; + case BSIM3v1S_MOD_LPDIBL2: + mod->BSIM3v1Slpdibl2 = value->rValue; + mod->BSIM3v1Slpdibl2Given = TRUE; + break; + case BSIM3v1S_MOD_LPDIBLB: + mod->BSIM3v1Slpdiblb = value->rValue; + mod->BSIM3v1SlpdiblbGiven = TRUE; + break; + case BSIM3v1S_MOD_LPSCBE1: + mod->BSIM3v1Slpscbe1 = value->rValue; + mod->BSIM3v1Slpscbe1Given = TRUE; + break; + case BSIM3v1S_MOD_LPSCBE2: + mod->BSIM3v1Slpscbe2 = value->rValue; + mod->BSIM3v1Slpscbe2Given = TRUE; + break; + case BSIM3v1S_MOD_LPVAG: + mod->BSIM3v1Slpvag = value->rValue; + mod->BSIM3v1SlpvagGiven = TRUE; + break; + case BSIM3v1S_MOD_LWR : + mod->BSIM3v1Slwr = value->rValue; + mod->BSIM3v1SlwrGiven = TRUE; + break; + case BSIM3v1S_MOD_LDWG : + mod->BSIM3v1Sldwg = value->rValue; + mod->BSIM3v1SldwgGiven = TRUE; + break; + case BSIM3v1S_MOD_LDWB : + mod->BSIM3v1Sldwb = value->rValue; + mod->BSIM3v1SldwbGiven = TRUE; + break; + case BSIM3v1S_MOD_LB0 : + mod->BSIM3v1Slb0 = value->rValue; + mod->BSIM3v1Slb0Given = TRUE; + break; + case BSIM3v1S_MOD_LB1 : + mod->BSIM3v1Slb1 = value->rValue; + mod->BSIM3v1Slb1Given = TRUE; + break; + case BSIM3v1S_MOD_LALPHA0 : + mod->BSIM3v1Slalpha0 = value->rValue; + mod->BSIM3v1Slalpha0Given = TRUE; + break; + case BSIM3v1S_MOD_LBETA0 : + mod->BSIM3v1Slbeta0 = value->rValue; + mod->BSIM3v1Slbeta0Given = TRUE; + break; + + case BSIM3v1S_MOD_LELM : + mod->BSIM3v1Slelm = value->rValue; + mod->BSIM3v1SlelmGiven = TRUE; + break; + case BSIM3v1S_MOD_LCGSL : + mod->BSIM3v1Slcgsl = value->rValue; + mod->BSIM3v1SlcgslGiven = TRUE; + break; + case BSIM3v1S_MOD_LCGDL : + mod->BSIM3v1Slcgdl = value->rValue; + mod->BSIM3v1SlcgdlGiven = TRUE; + break; + case BSIM3v1S_MOD_LCKAPPA : + mod->BSIM3v1Slckappa = value->rValue; + mod->BSIM3v1SlckappaGiven = TRUE; + break; + case BSIM3v1S_MOD_LCF : + mod->BSIM3v1Slcf = value->rValue; + mod->BSIM3v1SlcfGiven = TRUE; + break; + case BSIM3v1S_MOD_LCLC : + mod->BSIM3v1Slclc = value->rValue; + mod->BSIM3v1SlclcGiven = TRUE; + break; + case BSIM3v1S_MOD_LCLE : + mod->BSIM3v1Slcle = value->rValue; + mod->BSIM3v1SlcleGiven = TRUE; + break; + case BSIM3v1S_MOD_LVFBCV : + mod->BSIM3v1Slvfbcv = value->rValue; + mod->BSIM3v1SlvfbcvGiven = TRUE; + break; + + /* Width dependence */ + case BSIM3v1S_MOD_WCDSC : + mod->BSIM3v1Swcdsc = value->rValue; + mod->BSIM3v1SwcdscGiven = TRUE; + break; + + + case BSIM3v1S_MOD_WCDSCB : + mod->BSIM3v1Swcdscb = value->rValue; + mod->BSIM3v1SwcdscbGiven = TRUE; + break; + case BSIM3v1S_MOD_WCDSCD : + mod->BSIM3v1Swcdscd = value->rValue; + mod->BSIM3v1SwcdscdGiven = TRUE; + break; + case BSIM3v1S_MOD_WCIT : + mod->BSIM3v1Swcit = value->rValue; + mod->BSIM3v1SwcitGiven = TRUE; + break; + case BSIM3v1S_MOD_WNFACTOR : + mod->BSIM3v1Swnfactor = value->rValue; + mod->BSIM3v1SwnfactorGiven = TRUE; + break; + case BSIM3v1S_MOD_WXJ: + mod->BSIM3v1Swxj = value->rValue; + mod->BSIM3v1SwxjGiven = TRUE; + break; + case BSIM3v1S_MOD_WVSAT: + mod->BSIM3v1Swvsat = value->rValue; + mod->BSIM3v1SwvsatGiven = TRUE; + break; + + + case BSIM3v1S_MOD_WA0: + mod->BSIM3v1Swa0 = value->rValue; + mod->BSIM3v1Swa0Given = TRUE; + break; + case BSIM3v1S_MOD_WAGS: + mod->BSIM3v1Swags = value->rValue; + mod->BSIM3v1SwagsGiven = TRUE; + break; + case BSIM3v1S_MOD_WA1: + mod->BSIM3v1Swa1 = value->rValue; + mod->BSIM3v1Swa1Given = TRUE; + break; + case BSIM3v1S_MOD_WA2: + mod->BSIM3v1Swa2 = value->rValue; + mod->BSIM3v1Swa2Given = TRUE; + break; + case BSIM3v1S_MOD_WAT: + mod->BSIM3v1Swat = value->rValue; + mod->BSIM3v1SwatGiven = TRUE; + break; + case BSIM3v1S_MOD_WKETA: + mod->BSIM3v1Swketa = value->rValue; + mod->BSIM3v1SwketaGiven = TRUE; + break; + case BSIM3v1S_MOD_WNSUB: + mod->BSIM3v1Swnsub = value->rValue; + mod->BSIM3v1SwnsubGiven = TRUE; + break; + case BSIM3v1S_MOD_WNPEAK: + mod->BSIM3v1Swnpeak = value->rValue; + mod->BSIM3v1SwnpeakGiven = TRUE; + if (mod->BSIM3v1Swnpeak > 1.0e20) + mod->BSIM3v1Swnpeak *= 1.0e-6; + break; + case BSIM3v1S_MOD_WNGATE: + mod->BSIM3v1Swngate = value->rValue; + mod->BSIM3v1SwngateGiven = TRUE; + if (mod->BSIM3v1Swngate > 1.0e23) + mod->BSIM3v1Swngate *= 1.0e-6; + break; + case BSIM3v1S_MOD_WGAMMA1: + mod->BSIM3v1Swgamma1 = value->rValue; + mod->BSIM3v1Swgamma1Given = TRUE; + break; + case BSIM3v1S_MOD_WGAMMA2: + mod->BSIM3v1Swgamma2 = value->rValue; + mod->BSIM3v1Swgamma2Given = TRUE; + break; + case BSIM3v1S_MOD_WVBX: + mod->BSIM3v1Swvbx = value->rValue; + mod->BSIM3v1SwvbxGiven = TRUE; + break; + case BSIM3v1S_MOD_WVBM: + mod->BSIM3v1Swvbm = value->rValue; + mod->BSIM3v1SwvbmGiven = TRUE; + break; + case BSIM3v1S_MOD_WXT: + mod->BSIM3v1Swxt = value->rValue; + mod->BSIM3v1SwxtGiven = TRUE; + break; + case BSIM3v1S_MOD_WK1: + mod->BSIM3v1Swk1 = value->rValue; + mod->BSIM3v1Swk1Given = TRUE; + break; + case BSIM3v1S_MOD_WKT1: + mod->BSIM3v1Swkt1 = value->rValue; + mod->BSIM3v1Swkt1Given = TRUE; + break; + case BSIM3v1S_MOD_WKT1L: + mod->BSIM3v1Swkt1l = value->rValue; + mod->BSIM3v1Swkt1lGiven = TRUE; + break; + case BSIM3v1S_MOD_WKT2: + mod->BSIM3v1Swkt2 = value->rValue; + mod->BSIM3v1Swkt2Given = TRUE; + break; + case BSIM3v1S_MOD_WK2: + mod->BSIM3v1Swk2 = value->rValue; + mod->BSIM3v1Swk2Given = TRUE; + break; + case BSIM3v1S_MOD_WK3: + mod->BSIM3v1Swk3 = value->rValue; + mod->BSIM3v1Swk3Given = TRUE; + break; + case BSIM3v1S_MOD_WK3B: + mod->BSIM3v1Swk3b = value->rValue; + mod->BSIM3v1Swk3bGiven = TRUE; + break; + case BSIM3v1S_MOD_WNLX: + mod->BSIM3v1Swnlx = value->rValue; + mod->BSIM3v1SwnlxGiven = TRUE; + break; + case BSIM3v1S_MOD_WW0: + mod->BSIM3v1Sww0 = value->rValue; + mod->BSIM3v1Sww0Given = TRUE; + break; + case BSIM3v1S_MOD_WDVT0: + mod->BSIM3v1Swdvt0 = value->rValue; + mod->BSIM3v1Swdvt0Given = TRUE; + break; + case BSIM3v1S_MOD_WDVT1: + mod->BSIM3v1Swdvt1 = value->rValue; + mod->BSIM3v1Swdvt1Given = TRUE; + break; + case BSIM3v1S_MOD_WDVT2: + mod->BSIM3v1Swdvt2 = value->rValue; + mod->BSIM3v1Swdvt2Given = TRUE; + break; + case BSIM3v1S_MOD_WDVT0W: + mod->BSIM3v1Swdvt0w = value->rValue; + mod->BSIM3v1Swdvt0wGiven = TRUE; + break; + case BSIM3v1S_MOD_WDVT1W: + mod->BSIM3v1Swdvt1w = value->rValue; + mod->BSIM3v1Swdvt1wGiven = TRUE; + break; + case BSIM3v1S_MOD_WDVT2W: + mod->BSIM3v1Swdvt2w = value->rValue; + mod->BSIM3v1Swdvt2wGiven = TRUE; + break; + case BSIM3v1S_MOD_WDROUT: + mod->BSIM3v1Swdrout = value->rValue; + mod->BSIM3v1SwdroutGiven = TRUE; + break; + case BSIM3v1S_MOD_WDSUB: + mod->BSIM3v1Swdsub = value->rValue; + mod->BSIM3v1SwdsubGiven = TRUE; + break; + case BSIM3v1S_MOD_WVTH0: + mod->BSIM3v1Swvth0 = value->rValue; + mod->BSIM3v1Swvth0Given = TRUE; + break; + case BSIM3v1S_MOD_WUA: + mod->BSIM3v1Swua = value->rValue; + mod->BSIM3v1SwuaGiven = TRUE; + break; + case BSIM3v1S_MOD_WUA1: + mod->BSIM3v1Swua1 = value->rValue; + mod->BSIM3v1Swua1Given = TRUE; + break; + case BSIM3v1S_MOD_WUB: + mod->BSIM3v1Swub = value->rValue; + mod->BSIM3v1SwubGiven = TRUE; + break; + case BSIM3v1S_MOD_WUB1: + mod->BSIM3v1Swub1 = value->rValue; + mod->BSIM3v1Swub1Given = TRUE; + break; + case BSIM3v1S_MOD_WUC: + mod->BSIM3v1Swuc = value->rValue; + mod->BSIM3v1SwucGiven = TRUE; + break; + case BSIM3v1S_MOD_WUC1: + mod->BSIM3v1Swuc1 = value->rValue; + mod->BSIM3v1Swuc1Given = TRUE; + break; + case BSIM3v1S_MOD_WU0 : + mod->BSIM3v1Swu0 = value->rValue; + mod->BSIM3v1Swu0Given = TRUE; + break; + case BSIM3v1S_MOD_WUTE : + mod->BSIM3v1Swute = value->rValue; + mod->BSIM3v1SwuteGiven = TRUE; + break; + case BSIM3v1S_MOD_WVOFF: + mod->BSIM3v1Swvoff = value->rValue; + mod->BSIM3v1SwvoffGiven = TRUE; + break; + case BSIM3v1S_MOD_WDELTA : + mod->BSIM3v1Swdelta = value->rValue; + mod->BSIM3v1SwdeltaGiven = TRUE; + break; + case BSIM3v1S_MOD_WRDSW: + mod->BSIM3v1Swrdsw = value->rValue; + mod->BSIM3v1SwrdswGiven = TRUE; + break; + case BSIM3v1S_MOD_WPRWB: + mod->BSIM3v1Swprwb = value->rValue; + mod->BSIM3v1SwprwbGiven = TRUE; + break; + case BSIM3v1S_MOD_WPRWG: + mod->BSIM3v1Swprwg = value->rValue; + mod->BSIM3v1SwprwgGiven = TRUE; + break; + case BSIM3v1S_MOD_WPRT: + mod->BSIM3v1Swprt = value->rValue; + mod->BSIM3v1SwprtGiven = TRUE; + break; + case BSIM3v1S_MOD_WETA0: + mod->BSIM3v1Sweta0 = value->rValue; + mod->BSIM3v1Sweta0Given = TRUE; + break; + case BSIM3v1S_MOD_WETAB: + mod->BSIM3v1Swetab = value->rValue; + mod->BSIM3v1SwetabGiven = TRUE; + break; + case BSIM3v1S_MOD_WPCLM: + mod->BSIM3v1Swpclm = value->rValue; + mod->BSIM3v1SwpclmGiven = TRUE; + break; + case BSIM3v1S_MOD_WPDIBL1: + mod->BSIM3v1Swpdibl1 = value->rValue; + mod->BSIM3v1Swpdibl1Given = TRUE; + break; + case BSIM3v1S_MOD_WPDIBL2: + mod->BSIM3v1Swpdibl2 = value->rValue; + mod->BSIM3v1Swpdibl2Given = TRUE; + break; + case BSIM3v1S_MOD_WPDIBLB: + mod->BSIM3v1Swpdiblb = value->rValue; + mod->BSIM3v1SwpdiblbGiven = TRUE; + break; + case BSIM3v1S_MOD_WPSCBE1: + mod->BSIM3v1Swpscbe1 = value->rValue; + mod->BSIM3v1Swpscbe1Given = TRUE; + break; + case BSIM3v1S_MOD_WPSCBE2: + mod->BSIM3v1Swpscbe2 = value->rValue; + mod->BSIM3v1Swpscbe2Given = TRUE; + break; + case BSIM3v1S_MOD_WPVAG: + mod->BSIM3v1Swpvag = value->rValue; + mod->BSIM3v1SwpvagGiven = TRUE; + break; + case BSIM3v1S_MOD_WWR : + mod->BSIM3v1Swwr = value->rValue; + mod->BSIM3v1SwwrGiven = TRUE; + break; + case BSIM3v1S_MOD_WDWG : + mod->BSIM3v1Swdwg = value->rValue; + mod->BSIM3v1SwdwgGiven = TRUE; + break; + case BSIM3v1S_MOD_WDWB : + mod->BSIM3v1Swdwb = value->rValue; + mod->BSIM3v1SwdwbGiven = TRUE; + break; + case BSIM3v1S_MOD_WB0 : + mod->BSIM3v1Swb0 = value->rValue; + mod->BSIM3v1Swb0Given = TRUE; + break; + case BSIM3v1S_MOD_WB1 : + mod->BSIM3v1Swb1 = value->rValue; + mod->BSIM3v1Swb1Given = TRUE; + break; + case BSIM3v1S_MOD_WALPHA0 : + mod->BSIM3v1Swalpha0 = value->rValue; + mod->BSIM3v1Swalpha0Given = TRUE; + break; + case BSIM3v1S_MOD_WBETA0 : + mod->BSIM3v1Swbeta0 = value->rValue; + mod->BSIM3v1Swbeta0Given = TRUE; + break; + + case BSIM3v1S_MOD_WELM : + mod->BSIM3v1Swelm = value->rValue; + mod->BSIM3v1SwelmGiven = TRUE; + break; + case BSIM3v1S_MOD_WCGSL : + mod->BSIM3v1Swcgsl = value->rValue; + mod->BSIM3v1SwcgslGiven = TRUE; + break; + case BSIM3v1S_MOD_WCGDL : + mod->BSIM3v1Swcgdl = value->rValue; + mod->BSIM3v1SwcgdlGiven = TRUE; + break; + case BSIM3v1S_MOD_WCKAPPA : + mod->BSIM3v1Swckappa = value->rValue; + mod->BSIM3v1SwckappaGiven = TRUE; + break; + case BSIM3v1S_MOD_WCF : + mod->BSIM3v1Swcf = value->rValue; + mod->BSIM3v1SwcfGiven = TRUE; + break; + case BSIM3v1S_MOD_WCLC : + mod->BSIM3v1Swclc = value->rValue; + mod->BSIM3v1SwclcGiven = TRUE; + break; + case BSIM3v1S_MOD_WCLE : + mod->BSIM3v1Swcle = value->rValue; + mod->BSIM3v1SwcleGiven = TRUE; + break; + case BSIM3v1S_MOD_WVFBCV : + mod->BSIM3v1Swvfbcv = value->rValue; + mod->BSIM3v1SwvfbcvGiven = TRUE; + break; + + /* Cross-term dependence */ + case BSIM3v1S_MOD_PCDSC : + mod->BSIM3v1Spcdsc = value->rValue; + mod->BSIM3v1SpcdscGiven = TRUE; + break; + + + case BSIM3v1S_MOD_PCDSCB : + mod->BSIM3v1Spcdscb = value->rValue; + mod->BSIM3v1SpcdscbGiven = TRUE; + break; + case BSIM3v1S_MOD_PCDSCD : + mod->BSIM3v1Spcdscd = value->rValue; + mod->BSIM3v1SpcdscdGiven = TRUE; + break; + case BSIM3v1S_MOD_PCIT : + mod->BSIM3v1Spcit = value->rValue; + mod->BSIM3v1SpcitGiven = TRUE; + break; + case BSIM3v1S_MOD_PNFACTOR : + mod->BSIM3v1Spnfactor = value->rValue; + mod->BSIM3v1SpnfactorGiven = TRUE; + break; + case BSIM3v1S_MOD_PXJ: + mod->BSIM3v1Spxj = value->rValue; + mod->BSIM3v1SpxjGiven = TRUE; + break; + case BSIM3v1S_MOD_PVSAT: + mod->BSIM3v1Spvsat = value->rValue; + mod->BSIM3v1SpvsatGiven = TRUE; + break; + + + case BSIM3v1S_MOD_PA0: + mod->BSIM3v1Spa0 = value->rValue; + mod->BSIM3v1Spa0Given = TRUE; + break; + case BSIM3v1S_MOD_PAGS: + mod->BSIM3v1Spags = value->rValue; + mod->BSIM3v1SpagsGiven = TRUE; + break; + case BSIM3v1S_MOD_PA1: + mod->BSIM3v1Spa1 = value->rValue; + mod->BSIM3v1Spa1Given = TRUE; + break; + case BSIM3v1S_MOD_PA2: + mod->BSIM3v1Spa2 = value->rValue; + mod->BSIM3v1Spa2Given = TRUE; + break; + case BSIM3v1S_MOD_PAT: + mod->BSIM3v1Spat = value->rValue; + mod->BSIM3v1SpatGiven = TRUE; + break; + case BSIM3v1S_MOD_PKETA: + mod->BSIM3v1Spketa = value->rValue; + mod->BSIM3v1SpketaGiven = TRUE; + break; + case BSIM3v1S_MOD_PNSUB: + mod->BSIM3v1Spnsub = value->rValue; + mod->BSIM3v1SpnsubGiven = TRUE; + break; + case BSIM3v1S_MOD_PNPEAK: + mod->BSIM3v1Spnpeak = value->rValue; + mod->BSIM3v1SpnpeakGiven = TRUE; + if (mod->BSIM3v1Spnpeak > 1.0e20) + mod->BSIM3v1Spnpeak *= 1.0e-6; + break; + case BSIM3v1S_MOD_PNGATE: + mod->BSIM3v1Spngate = value->rValue; + mod->BSIM3v1SpngateGiven = TRUE; + if (mod->BSIM3v1Spngate > 1.0e23) + mod->BSIM3v1Spngate *= 1.0e-6; + break; + case BSIM3v1S_MOD_PGAMMA1: + mod->BSIM3v1Spgamma1 = value->rValue; + mod->BSIM3v1Spgamma1Given = TRUE; + break; + case BSIM3v1S_MOD_PGAMMA2: + mod->BSIM3v1Spgamma2 = value->rValue; + mod->BSIM3v1Spgamma2Given = TRUE; + break; + case BSIM3v1S_MOD_PVBX: + mod->BSIM3v1Spvbx = value->rValue; + mod->BSIM3v1SpvbxGiven = TRUE; + break; + case BSIM3v1S_MOD_PVBM: + mod->BSIM3v1Spvbm = value->rValue; + mod->BSIM3v1SpvbmGiven = TRUE; + break; + case BSIM3v1S_MOD_PXT: + mod->BSIM3v1Spxt = value->rValue; + mod->BSIM3v1SpxtGiven = TRUE; + break; + case BSIM3v1S_MOD_PK1: + mod->BSIM3v1Spk1 = value->rValue; + mod->BSIM3v1Spk1Given = TRUE; + break; + case BSIM3v1S_MOD_PKT1: + mod->BSIM3v1Spkt1 = value->rValue; + mod->BSIM3v1Spkt1Given = TRUE; + break; + case BSIM3v1S_MOD_PKT1L: + mod->BSIM3v1Spkt1l = value->rValue; + mod->BSIM3v1Spkt1lGiven = TRUE; + break; + case BSIM3v1S_MOD_PKT2: + mod->BSIM3v1Spkt2 = value->rValue; + mod->BSIM3v1Spkt2Given = TRUE; + break; + case BSIM3v1S_MOD_PK2: + mod->BSIM3v1Spk2 = value->rValue; + mod->BSIM3v1Spk2Given = TRUE; + break; + case BSIM3v1S_MOD_PK3: + mod->BSIM3v1Spk3 = value->rValue; + mod->BSIM3v1Spk3Given = TRUE; + break; + case BSIM3v1S_MOD_PK3B: + mod->BSIM3v1Spk3b = value->rValue; + mod->BSIM3v1Spk3bGiven = TRUE; + break; + case BSIM3v1S_MOD_PNLX: + mod->BSIM3v1Spnlx = value->rValue; + mod->BSIM3v1SpnlxGiven = TRUE; + break; + case BSIM3v1S_MOD_PW0: + mod->BSIM3v1Spw0 = value->rValue; + mod->BSIM3v1Spw0Given = TRUE; + break; + case BSIM3v1S_MOD_PDVT0: + mod->BSIM3v1Spdvt0 = value->rValue; + mod->BSIM3v1Spdvt0Given = TRUE; + break; + case BSIM3v1S_MOD_PDVT1: + mod->BSIM3v1Spdvt1 = value->rValue; + mod->BSIM3v1Spdvt1Given = TRUE; + break; + case BSIM3v1S_MOD_PDVT2: + mod->BSIM3v1Spdvt2 = value->rValue; + mod->BSIM3v1Spdvt2Given = TRUE; + break; + case BSIM3v1S_MOD_PDVT0W: + mod->BSIM3v1Spdvt0w = value->rValue; + mod->BSIM3v1Spdvt0wGiven = TRUE; + break; + case BSIM3v1S_MOD_PDVT1W: + mod->BSIM3v1Spdvt1w = value->rValue; + mod->BSIM3v1Spdvt1wGiven = TRUE; + break; + case BSIM3v1S_MOD_PDVT2W: + mod->BSIM3v1Spdvt2w = value->rValue; + mod->BSIM3v1Spdvt2wGiven = TRUE; + break; + case BSIM3v1S_MOD_PDROUT: + mod->BSIM3v1Spdrout = value->rValue; + mod->BSIM3v1SpdroutGiven = TRUE; + break; + case BSIM3v1S_MOD_PDSUB: + mod->BSIM3v1Spdsub = value->rValue; + mod->BSIM3v1SpdsubGiven = TRUE; + break; + case BSIM3v1S_MOD_PVTH0: + mod->BSIM3v1Spvth0 = value->rValue; + mod->BSIM3v1Spvth0Given = TRUE; + break; + case BSIM3v1S_MOD_PUA: + mod->BSIM3v1Spua = value->rValue; + mod->BSIM3v1SpuaGiven = TRUE; + break; + case BSIM3v1S_MOD_PUA1: + mod->BSIM3v1Spua1 = value->rValue; + mod->BSIM3v1Spua1Given = TRUE; + break; + case BSIM3v1S_MOD_PUB: + mod->BSIM3v1Spub = value->rValue; + mod->BSIM3v1SpubGiven = TRUE; + break; + case BSIM3v1S_MOD_PUB1: + mod->BSIM3v1Spub1 = value->rValue; + mod->BSIM3v1Spub1Given = TRUE; + break; + case BSIM3v1S_MOD_PUC: + mod->BSIM3v1Spuc = value->rValue; + mod->BSIM3v1SpucGiven = TRUE; + break; + case BSIM3v1S_MOD_PUC1: + mod->BSIM3v1Spuc1 = value->rValue; + mod->BSIM3v1Spuc1Given = TRUE; + break; + case BSIM3v1S_MOD_PU0 : + mod->BSIM3v1Spu0 = value->rValue; + mod->BSIM3v1Spu0Given = TRUE; + break; + case BSIM3v1S_MOD_PUTE : + mod->BSIM3v1Spute = value->rValue; + mod->BSIM3v1SputeGiven = TRUE; + break; + case BSIM3v1S_MOD_PVOFF: + mod->BSIM3v1Spvoff = value->rValue; + mod->BSIM3v1SpvoffGiven = TRUE; + break; + case BSIM3v1S_MOD_PDELTA : + mod->BSIM3v1Spdelta = value->rValue; + mod->BSIM3v1SpdeltaGiven = TRUE; + break; + case BSIM3v1S_MOD_PRDSW: + mod->BSIM3v1Sprdsw = value->rValue; + mod->BSIM3v1SprdswGiven = TRUE; + break; + case BSIM3v1S_MOD_PPRWB: + mod->BSIM3v1Spprwb = value->rValue; + mod->BSIM3v1SpprwbGiven = TRUE; + break; + case BSIM3v1S_MOD_PPRWG: + mod->BSIM3v1Spprwg = value->rValue; + mod->BSIM3v1SpprwgGiven = TRUE; + break; + case BSIM3v1S_MOD_PPRT: + mod->BSIM3v1Spprt = value->rValue; + mod->BSIM3v1SpprtGiven = TRUE; + break; + case BSIM3v1S_MOD_PETA0: + mod->BSIM3v1Speta0 = value->rValue; + mod->BSIM3v1Speta0Given = TRUE; + break; + case BSIM3v1S_MOD_PETAB: + mod->BSIM3v1Spetab = value->rValue; + mod->BSIM3v1SpetabGiven = TRUE; + break; + case BSIM3v1S_MOD_PPCLM: + mod->BSIM3v1Sppclm = value->rValue; + mod->BSIM3v1SppclmGiven = TRUE; + break; + case BSIM3v1S_MOD_PPDIBL1: + mod->BSIM3v1Sppdibl1 = value->rValue; + mod->BSIM3v1Sppdibl1Given = TRUE; + break; + case BSIM3v1S_MOD_PPDIBL2: + mod->BSIM3v1Sppdibl2 = value->rValue; + mod->BSIM3v1Sppdibl2Given = TRUE; + break; + case BSIM3v1S_MOD_PPDIBLB: + mod->BSIM3v1Sppdiblb = value->rValue; + mod->BSIM3v1SppdiblbGiven = TRUE; + break; + case BSIM3v1S_MOD_PPSCBE1: + mod->BSIM3v1Sppscbe1 = value->rValue; + mod->BSIM3v1Sppscbe1Given = TRUE; + break; + case BSIM3v1S_MOD_PPSCBE2: + mod->BSIM3v1Sppscbe2 = value->rValue; + mod->BSIM3v1Sppscbe2Given = TRUE; + break; + case BSIM3v1S_MOD_PPVAG: + mod->BSIM3v1Sppvag = value->rValue; + mod->BSIM3v1SppvagGiven = TRUE; + break; + case BSIM3v1S_MOD_PWR : + mod->BSIM3v1Spwr = value->rValue; + mod->BSIM3v1SpwrGiven = TRUE; + break; + case BSIM3v1S_MOD_PDWG : + mod->BSIM3v1Spdwg = value->rValue; + mod->BSIM3v1SpdwgGiven = TRUE; + break; + case BSIM3v1S_MOD_PDWB : + mod->BSIM3v1Spdwb = value->rValue; + mod->BSIM3v1SpdwbGiven = TRUE; + break; + case BSIM3v1S_MOD_PB0 : + mod->BSIM3v1Spb0 = value->rValue; + mod->BSIM3v1Spb0Given = TRUE; + break; + case BSIM3v1S_MOD_PB1 : + mod->BSIM3v1Spb1 = value->rValue; + mod->BSIM3v1Spb1Given = TRUE; + break; + case BSIM3v1S_MOD_PALPHA0 : + mod->BSIM3v1Spalpha0 = value->rValue; + mod->BSIM3v1Spalpha0Given = TRUE; + break; + case BSIM3v1S_MOD_PBETA0 : + mod->BSIM3v1Spbeta0 = value->rValue; + mod->BSIM3v1Spbeta0Given = TRUE; + break; + + case BSIM3v1S_MOD_PELM : + mod->BSIM3v1Spelm = value->rValue; + mod->BSIM3v1SpelmGiven = TRUE; + break; + case BSIM3v1S_MOD_PCGSL : + mod->BSIM3v1Spcgsl = value->rValue; + mod->BSIM3v1SpcgslGiven = TRUE; + break; + case BSIM3v1S_MOD_PCGDL : + mod->BSIM3v1Spcgdl = value->rValue; + mod->BSIM3v1SpcgdlGiven = TRUE; + break; + case BSIM3v1S_MOD_PCKAPPA : + mod->BSIM3v1Spckappa = value->rValue; + mod->BSIM3v1SpckappaGiven = TRUE; + break; + case BSIM3v1S_MOD_PCF : + mod->BSIM3v1Spcf = value->rValue; + mod->BSIM3v1SpcfGiven = TRUE; + break; + case BSIM3v1S_MOD_PCLC : + mod->BSIM3v1Spclc = value->rValue; + mod->BSIM3v1SpclcGiven = TRUE; + break; + case BSIM3v1S_MOD_PCLE : + mod->BSIM3v1Spcle = value->rValue; + mod->BSIM3v1SpcleGiven = TRUE; + break; + case BSIM3v1S_MOD_PVFBCV : + mod->BSIM3v1Spvfbcv = value->rValue; + mod->BSIM3v1SpvfbcvGiven = TRUE; + break; + + case BSIM3v1S_MOD_TNOM : + mod->BSIM3v1Stnom = value->rValue + 273.15; + mod->BSIM3v1StnomGiven = TRUE; + break; + case BSIM3v1S_MOD_CGSO : + mod->BSIM3v1Scgso = value->rValue; + mod->BSIM3v1ScgsoGiven = TRUE; + break; + case BSIM3v1S_MOD_CGDO : + mod->BSIM3v1Scgdo = value->rValue; + mod->BSIM3v1ScgdoGiven = TRUE; + break; + case BSIM3v1S_MOD_CGBO : + mod->BSIM3v1Scgbo = value->rValue; + mod->BSIM3v1ScgboGiven = TRUE; + break; + case BSIM3v1S_MOD_XPART : + mod->BSIM3v1Sxpart = value->rValue; + mod->BSIM3v1SxpartGiven = TRUE; + break; + case BSIM3v1S_MOD_RSH : + mod->BSIM3v1SsheetResistance = value->rValue; + mod->BSIM3v1SsheetResistanceGiven = TRUE; + break; + case BSIM3v1S_MOD_JS : + mod->BSIM3v1SjctSatCurDensity = value->rValue; + mod->BSIM3v1SjctSatCurDensityGiven = TRUE; + break; + case BSIM3v1S_MOD_JSW : + mod->BSIM3v1SjctSidewallSatCurDensity = value->rValue; + mod->BSIM3v1SjctSidewallSatCurDensityGiven = TRUE; + break; + case BSIM3v1S_MOD_PB : + mod->BSIM3v1SbulkJctPotential = value->rValue; + mod->BSIM3v1SbulkJctPotentialGiven = TRUE; + break; + case BSIM3v1S_MOD_MJ : + mod->BSIM3v1SbulkJctBotGradingCoeff = value->rValue; + mod->BSIM3v1SbulkJctBotGradingCoeffGiven = TRUE; + break; + case BSIM3v1S_MOD_PBSW : + mod->BSIM3v1SsidewallJctPotential = value->rValue; + mod->BSIM3v1SsidewallJctPotentialGiven = TRUE; + break; + case BSIM3v1S_MOD_MJSW : + mod->BSIM3v1SbulkJctSideGradingCoeff = value->rValue; + mod->BSIM3v1SbulkJctSideGradingCoeffGiven = TRUE; + break; + case BSIM3v1S_MOD_CJ : + mod->BSIM3v1SunitAreaJctCap = value->rValue; + mod->BSIM3v1SunitAreaJctCapGiven = TRUE; + break; + case BSIM3v1S_MOD_CJSW : + mod->BSIM3v1SunitLengthSidewallJctCap = value->rValue; + mod->BSIM3v1SunitLengthSidewallJctCapGiven = TRUE; + break; + case BSIM3v1S_MOD_NJ : + mod->BSIM3v1SjctEmissionCoeff = value->rValue; + mod->BSIM3v1SjctEmissionCoeffGiven = TRUE; + break; + case BSIM3v1S_MOD_PBSWG : + mod->BSIM3v1SGatesidewallJctPotential = value->rValue; + mod->BSIM3v1SGatesidewallJctPotentialGiven = TRUE; + break; + case BSIM3v1S_MOD_MJSWG : + mod->BSIM3v1SbulkJctGateSideGradingCoeff = value->rValue; + mod->BSIM3v1SbulkJctGateSideGradingCoeffGiven = TRUE; + break; + case BSIM3v1S_MOD_CJSWG : + mod->BSIM3v1SunitLengthGateSidewallJctCap = value->rValue; + mod->BSIM3v1SunitLengthGateSidewallJctCapGiven = TRUE; + break; + case BSIM3v1S_MOD_XTI : + mod->BSIM3v1SjctTempExponent = value->rValue; + mod->BSIM3v1SjctTempExponentGiven = TRUE; + break; + case BSIM3v1S_MOD_LINT : + mod->BSIM3v1SLint = value->rValue; + mod->BSIM3v1SLintGiven = TRUE; + break; + case BSIM3v1S_MOD_LL : + mod->BSIM3v1SLl = value->rValue; + mod->BSIM3v1SLlGiven = TRUE; + break; + case BSIM3v1S_MOD_LLN : + mod->BSIM3v1SLln = value->rValue; + mod->BSIM3v1SLlnGiven = TRUE; + break; + case BSIM3v1S_MOD_LW : + mod->BSIM3v1SLw = value->rValue; + mod->BSIM3v1SLwGiven = TRUE; + break; + case BSIM3v1S_MOD_LWN : + mod->BSIM3v1SLwn = value->rValue; + mod->BSIM3v1SLwnGiven = TRUE; + break; + case BSIM3v1S_MOD_LWL : + mod->BSIM3v1SLwl = value->rValue; + mod->BSIM3v1SLwlGiven = TRUE; + break; + case BSIM3v1S_MOD_LMIN : + mod->BSIM3v1SLmin = value->rValue; + mod->BSIM3v1SLminGiven = TRUE; + break; + case BSIM3v1S_MOD_LMAX : + mod->BSIM3v1SLmax = value->rValue; + mod->BSIM3v1SLmaxGiven = TRUE; + break; + case BSIM3v1S_MOD_WINT : + mod->BSIM3v1SWint = value->rValue; + mod->BSIM3v1SWintGiven = TRUE; + break; + case BSIM3v1S_MOD_WL : + mod->BSIM3v1SWl = value->rValue; + mod->BSIM3v1SWlGiven = TRUE; + break; + case BSIM3v1S_MOD_WLN : + mod->BSIM3v1SWln = value->rValue; + mod->BSIM3v1SWlnGiven = TRUE; + break; + case BSIM3v1S_MOD_WW : + mod->BSIM3v1SWw = value->rValue; + mod->BSIM3v1SWwGiven = TRUE; + break; + case BSIM3v1S_MOD_WWN : + mod->BSIM3v1SWwn = value->rValue; + mod->BSIM3v1SWwnGiven = TRUE; + break; + case BSIM3v1S_MOD_WWL : + mod->BSIM3v1SWwl = value->rValue; + mod->BSIM3v1SWwlGiven = TRUE; + break; + case BSIM3v1S_MOD_WMIN : + mod->BSIM3v1SWmin = value->rValue; + mod->BSIM3v1SWminGiven = TRUE; + break; + case BSIM3v1S_MOD_WMAX : + mod->BSIM3v1SWmax = value->rValue; + mod->BSIM3v1SWmaxGiven = TRUE; + break; + + case BSIM3v1S_MOD_NOIA : + mod->BSIM3v1SoxideTrapDensityA = value->rValue; + mod->BSIM3v1SoxideTrapDensityAGiven = TRUE; + break; + case BSIM3v1S_MOD_NOIB : + mod->BSIM3v1SoxideTrapDensityB = value->rValue; + mod->BSIM3v1SoxideTrapDensityBGiven = TRUE; + break; + case BSIM3v1S_MOD_NOIC : + mod->BSIM3v1SoxideTrapDensityC = value->rValue; + mod->BSIM3v1SoxideTrapDensityCGiven = TRUE; + break; + case BSIM3v1S_MOD_EM : + mod->BSIM3v1Sem = value->rValue; + mod->BSIM3v1SemGiven = TRUE; + break; + case BSIM3v1S_MOD_EF : + mod->BSIM3v1Sef = value->rValue; + mod->BSIM3v1SefGiven = TRUE; + break; + case BSIM3v1S_MOD_AF : + mod->BSIM3v1Saf = value->rValue; + mod->BSIM3v1SafGiven = TRUE; + break; + case BSIM3v1S_MOD_KF : + mod->BSIM3v1Skf = value->rValue; + mod->BSIM3v1SkfGiven = TRUE; + break; + case BSIM3v1S_MOD_NMOS : + if(value->iValue) { + mod->BSIM3v1Stype = 1; + mod->BSIM3v1StypeGiven = TRUE; + } + break; + case BSIM3v1S_MOD_PMOS : + if(value->iValue) { + mod->BSIM3v1Stype = - 1; + mod->BSIM3v1StypeGiven = TRUE; + } + break; +/* serban */ + case BSIM3v1S_MOD_HDIF : + mod->BSIM3v1Shdif = value->rValue; + mod->BSIM3v1ShdifGiven = TRUE; + break; + default: + return(E_BADPARM); + } + return(OK); +} + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1snoi.c b/src/spicelib/devices/bsim3v1s/b3v1snoi.c new file mode 100644 index 000000000..54aa58dc0 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1snoi.c @@ -0,0 +1,377 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Gary W. Ng and Min-Chie Jeng. +Modified by Paolo Nenzi 2002 +File: b3v1snoi.c +**********/ + +#include "ngspice.h" +#include "bsim3v1sdef.h" +#include "cktdefs.h" +#include "iferrmsg.h" +#include "noisedef.h" +#include "suffix.h" +#include "const.h" /* jwan */ + +/* + * BSIM3v1Snoise (mode, operation, firstModel, ckt, data, OnDens) + * This routine names and evaluates all of the noise sources + * associated with MOSFET's. It starts with the model *firstModel and + * traverses all of its insts. It then proceeds to any other models + * on the linked list. The total output noise density generated by + * all of the MOSFET's is summed with the variable "OnDens". + */ + +/* + Channel thermal and flicker noises are calculated based on the value + of model->BSIM3v1SnoiMod. + If model->BSIM3v1SnoiMod = 1, + Channel thermal noise = SPICE2 model + Flicker noise = SPICE2 model + If model->BSIM3v1SnoiMod = 2, + Channel thermal noise = BSIM3v1S model + Flicker noise = BSIM3v1S model + If model->BSIM3v1SnoiMod = 3, + Channel thermal noise = SPICE2 model + Flicker noise = BSIM3v1S model + If model->BSIM3v1SnoiMod = 4, + Channel thermal noise = BSIM3v1S model + Flicker noise = SPICE2 model + */ + +extern void NevalSrc(); +extern double Nintegrate(); + +double +StrongInversionNoiseEval(double vgs, double vds, BSIM3v1Smodel *model, + BSIM3v1Sinstance *here, double freq, double temp) +{ +struct bsim3v1sSizeDependParam *pParam; +double cd, esat, DelClm, EffFreq, N0, Nl, Vgst; +double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9; +double Ssi; + + pParam = here->pParam; + cd = fabs(here->BSIM3v1Scd); + if (vds > here->BSIM3v1Svdsat) + { esat = 2.0 * pParam->BSIM3v1Svsattemp / here->BSIM3v1Sueff; + T0 = ((((vds - here->BSIM3v1Svdsat) / pParam->BSIM3v1Slitl) + model->BSIM3v1Sem) + / esat); + DelClm = pParam->BSIM3v1Slitl * log (MAX(T0, N_MINLOG)); + } + else + DelClm = 0.0; + EffFreq = pow(freq, model->BSIM3v1Sef); + T1 = CHARGE * CHARGE * 8.62e-5 * cd * temp * here->BSIM3v1Sueff; + T2 = 1.0e8 * EffFreq * model->BSIM3v1Scox + * pParam->BSIM3v1Sleff * pParam->BSIM3v1Sleff; + Vgst = vgs - here->BSIM3v1Svon; + N0 = model->BSIM3v1Scox * Vgst / CHARGE; + if (N0 < 0.0) + N0 = 0.0; + Nl = model->BSIM3v1Scox * (Vgst - MIN(vds, here->BSIM3v1Svdsat)) / CHARGE; + if (Nl < 0.0) + Nl = 0.0; + + T3 = model->BSIM3v1SoxideTrapDensityA + * log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG)); + T4 = model->BSIM3v1SoxideTrapDensityB * (N0 - Nl); + T5 = model->BSIM3v1SoxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl); + + T6 = 8.62e-5 * temp * cd * cd; + T7 = 1.0e8 * EffFreq * pParam->BSIM3v1Sleff + * pParam->BSIM3v1Sleff * pParam->BSIM3v1Sweff; + T8 = model->BSIM3v1SoxideTrapDensityA + model->BSIM3v1SoxideTrapDensityB * Nl + + model->BSIM3v1SoxideTrapDensityC * Nl * Nl; + T9 = (Nl + 2.0e14) * (Nl + 2.0e14); + + Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9; + return Ssi; +} + +int +BSIM3v1Snoise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt, + Ndata *data, double *OnDens) +{ +BSIM3v1Smodel *model = (BSIM3v1Smodel *)inModel; +BSIM3v1Sinstance *here; +struct bsim3v1sSizeDependParam *pParam; +char name[N_MXVLNTH]; +double tempOnoise; +double tempInoise; +double noizDens[BSIM3v1SNSRCS]; +double lnNdens[BSIM3v1SNSRCS]; + +double vgs, vds, Slimit; +double T1, T10, T11; +double Ssi, Swi; + +int i; + + /* define the names of the noise sources */ + static char *BSIM3v1SnNames[BSIM3v1SNSRCS] = + { /* Note that we have to keep the order */ + ".rd", /* noise due to rd */ + /* consistent with the index definitions */ + ".rs", /* noise due to rs */ + /* in BSIM3v1Sdefs.h */ + ".id", /* noise due to id */ + ".1overf", /* flicker (1/f) noise */ + "" /* total transistor noise */ + }; + + for (; model != NULL; model = model->BSIM3v1SnextModel) + { for (here = model->BSIM3v1Sinstances; here != NULL; + here = here->BSIM3v1SnextInstance) + { pParam = here->pParam; + switch (operation) + { case N_OPEN: + /* see if we have to to produce a summary report */ + /* if so, name all the noise generators */ + + if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) + { switch (mode) + { case N_DENS: + for (i = 0; i < BSIM3v1SNSRCS; i++) + { (void) sprintf(name, "onoise.%s%s", + here->BSIM3v1Sname, + BSIM3v1SnNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **) NULL); + /* we've added one more plot */ + } + break; + case INT_NOIZ: + for (i = 0; i < BSIM3v1SNSRCS; i++) + { (void) sprintf(name, "onoise_total.%s%s", + here->BSIM3v1Sname, + BSIM3v1SnNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **) NULL); + /* we've added one more plot */ + + (void) sprintf(name, "inoise_total.%s%s", + here->BSIM3v1Sname, + BSIM3v1SnNames[i]); + data->namelist = (IFuid *) trealloc( + (char *) data->namelist, + (data->numPlots + 1) + * sizeof(IFuid)); + if (!data->namelist) + return(E_NOMEM); + (*(SPfrontEnd->IFnewUid)) (ckt, + &(data->namelist[data->numPlots++]), + (IFuid) NULL, name, UID_OTHER, + (void **)NULL); + /* we've added one more plot */ + } + break; + } + } + break; + case N_CALC: + switch (mode) + { case N_DENS: + NevalSrc(&noizDens[BSIM3v1SRDNOIZ], + &lnNdens[BSIM3v1SRDNOIZ], ckt, THERMNOISE, + here->BSIM3v1SdNodePrime, here->BSIM3v1SdNode, + here->BSIM3v1SdrainConductance); + + NevalSrc(&noizDens[BSIM3v1SRSNOIZ], + &lnNdens[BSIM3v1SRSNOIZ], ckt, THERMNOISE, + here->BSIM3v1SsNodePrime, here->BSIM3v1SsNode, + here->BSIM3v1SsourceConductance); + + switch( model->BSIM3v1SnoiMod ) + { case 1: + case 3: + NevalSrc(&noizDens[BSIM3v1SIDNOIZ], + &lnNdens[BSIM3v1SIDNOIZ], ckt, + THERMNOISE, here->BSIM3v1SdNodePrime, + here->BSIM3v1SsNodePrime, + (2.0 / 3.0 * fabs(here->BSIM3v1Sgm + + here->BSIM3v1Sgds + + here->BSIM3v1Sgmbs))); + break; + case 2: + case 4: + NevalSrc(&noizDens[BSIM3v1SIDNOIZ], + &lnNdens[BSIM3v1SIDNOIZ], ckt, + THERMNOISE, here->BSIM3v1SdNodePrime, + here->BSIM3v1SsNodePrime, + (here->BSIM3v1Sueff + * fabs(here->BSIM3v1Sqinv + / (pParam->BSIM3v1Sleff + * pParam->BSIM3v1Sleff)))); + break; + } + NevalSrc(&noizDens[BSIM3v1SFLNOIZ], (double*) NULL, + ckt, N_GAIN, here->BSIM3v1SdNodePrime, + here->BSIM3v1SsNodePrime, (double) 0.0); + + switch( model->BSIM3v1SnoiMod ) + { case 1: + case 4: + noizDens[BSIM3v1SFLNOIZ] *= model->BSIM3v1Skf + * exp(model->BSIM3v1Saf + * log(MAX(fabs(here->BSIM3v1Scd), + N_MINLOG))) + / (pow(data->freq, model->BSIM3v1Sef) + * pParam->BSIM3v1Sleff + * pParam->BSIM3v1Sleff + * model->BSIM3v1Scox); + break; + case 2: + case 3: + vgs = *(ckt->CKTstates[0] + here->BSIM3v1Svgs); + vds = *(ckt->CKTstates[0] + here->BSIM3v1Svds); + if (vds < 0.0) + { vds = -vds; + vgs = vgs + vds; + } + if (vgs >= here->BSIM3v1Svon + 0.1) + { Ssi = StrongInversionNoiseEval(vgs, + vds, model, here, data->freq, + ckt->CKTtemp); + noizDens[BSIM3v1SFLNOIZ] *= Ssi; + } + else + { pParam = here->pParam; + T10 = model->BSIM3v1SoxideTrapDensityA + * 8.62e-5 * ckt->CKTtemp; + T11 = pParam->BSIM3v1Sweff + * pParam->BSIM3v1Sleff + * pow(data->freq, model->BSIM3v1Sef) + * 4.0e36; + Swi = T10 / T11 * here->BSIM3v1Scd + * here->BSIM3v1Scd; + Slimit = StrongInversionNoiseEval( + here->BSIM3v1Svon + 0.1, vds, model, + here, data->freq, ckt->CKTtemp); + T1 = Swi + Slimit; + if (T1 > 0.0) + noizDens[BSIM3v1SFLNOIZ] *= (Slimit + * Swi) / T1; + else + noizDens[BSIM3v1SFLNOIZ] *= 0.0; + } + break; + } + + lnNdens[BSIM3v1SFLNOIZ] = + log(MAX(noizDens[BSIM3v1SFLNOIZ], N_MINLOG)); + + noizDens[BSIM3v1STOTNOIZ] = noizDens[BSIM3v1SRDNOIZ] + + noizDens[BSIM3v1SRSNOIZ] + + noizDens[BSIM3v1SIDNOIZ] + + noizDens[BSIM3v1SFLNOIZ]; + lnNdens[BSIM3v1STOTNOIZ] = + log(MAX(noizDens[BSIM3v1STOTNOIZ], N_MINLOG)); + + *OnDens += noizDens[BSIM3v1STOTNOIZ]; + + if (data->delFreq == 0.0) + { /* if we haven't done any previous + integration, we need to initialize our + "history" variables. + */ + + for (i = 0; i < BSIM3v1SNSRCS; i++) + { here->BSIM3v1SnVar[LNLSTDENS][i] = + lnNdens[i]; + } + + /* clear out our integration variables + if it's the first pass + */ + if (data->freq == + ((NOISEAN*) ckt->CKTcurJob)->NstartFreq) + { for (i = 0; i < BSIM3v1SNSRCS; i++) + { here->BSIM3v1SnVar[OUTNOIZ][i] = 0.0; + here->BSIM3v1SnVar[INNOIZ][i] = 0.0; + } + } + } + else + { /* data->delFreq != 0.0, + we have to integrate. + */ + for (i = 0; i < BSIM3v1SNSRCS; i++) + { if (i != BSIM3v1STOTNOIZ) + { tempOnoise = Nintegrate(noizDens[i], + lnNdens[i], + here->BSIM3v1SnVar[LNLSTDENS][i], + data); + tempInoise = Nintegrate(noizDens[i] + * data->GainSqInv, lnNdens[i] + + data->lnGainInv, + here->BSIM3v1SnVar[LNLSTDENS][i] + + data->lnGainInv, data); + here->BSIM3v1SnVar[LNLSTDENS][i] = + lnNdens[i]; + data->outNoiz += tempOnoise; + data->inNoise += tempInoise; + if (((NOISEAN*) + ckt->CKTcurJob)->NStpsSm != 0) + { here->BSIM3v1SnVar[OUTNOIZ][i] + += tempOnoise; + here->BSIM3v1SnVar[OUTNOIZ][BSIM3v1STOTNOIZ] + += tempOnoise; + here->BSIM3v1SnVar[INNOIZ][i] + += tempInoise; + here->BSIM3v1SnVar[INNOIZ][BSIM3v1STOTNOIZ] + += tempInoise; + } + } + } + } + if (data->prtSummary) + { for (i = 0; i < BSIM3v1SNSRCS; i++) + { /* print a summary report */ + data->outpVector[data->outNumber++] + = noizDens[i]; + } + } + break; + case INT_NOIZ: + /* already calculated, just output */ + if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0) + { for (i = 0; i < BSIM3v1SNSRCS; i++) + { data->outpVector[data->outNumber++] + = here->BSIM3v1SnVar[OUTNOIZ][i]; + data->outpVector[data->outNumber++] + = here->BSIM3v1SnVar[INNOIZ][i]; + } + } + break; + } + break; + case N_CLOSE: + /* do nothing, the main calling routine will close */ + return (OK); + break; /* the plots */ + } /* switch (operation) */ + } /* for here */ + } /* for model */ + + return(OK); +} + + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1spar.c b/src/spicelib/devices/bsim3v1s/b3v1spar.c new file mode 100644 index 000000000..035ec0950 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1spar.c @@ -0,0 +1,96 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1spar.c +**********/ + +#include "ngspice.h" +#include "ifsim.h" +#include "bsim3v1sdef.h" +#include "sperror.h" +#include "suffix.h" + +int +BSIM3v1Sparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select) +{ + BSIM3v1Sinstance *here = (BSIM3v1Sinstance*)inst; + switch(param) + { case BSIM3v1S_W: + here->BSIM3v1Sw = value->rValue; + here->BSIM3v1SwGiven = TRUE; + break; + case BSIM3v1S_L: + here->BSIM3v1Sl = value->rValue; + here->BSIM3v1SlGiven = TRUE; + break; + case BSIM3v1S_AS: + here->BSIM3v1SsourceArea = value->rValue; + here->BSIM3v1SsourceAreaGiven = TRUE; + break; + case BSIM3v1S_AD: + here->BSIM3v1SdrainArea = value->rValue; + here->BSIM3v1SdrainAreaGiven = TRUE; + break; + case BSIM3v1S_PS: + here->BSIM3v1SsourcePerimeter = value->rValue; + here->BSIM3v1SsourcePerimeterGiven = TRUE; + break; + case BSIM3v1S_PD: + here->BSIM3v1SdrainPerimeter = value->rValue; + here->BSIM3v1SdrainPerimeterGiven = TRUE; + break; + case BSIM3v1S_NRS: + here->BSIM3v1SsourceSquares = value->rValue; + here->BSIM3v1SsourceSquaresGiven = TRUE; + break; + case BSIM3v1S_NRD: + here->BSIM3v1SdrainSquares = value->rValue; + here->BSIM3v1SdrainSquaresGiven = TRUE; + break; + case BSIM3v1S_OFF: + here->BSIM3v1Soff = value->iValue; + break; + case BSIM3v1S_M: + here->BSIM3v1Sm = value->rValue; + break; + case BSIM3v1S_IC_VBS: + here->BSIM3v1SicVBS = value->rValue; + here->BSIM3v1SicVBSGiven = TRUE; + break; + case BSIM3v1S_IC_VDS: + here->BSIM3v1SicVDS = value->rValue; + here->BSIM3v1SicVDSGiven = TRUE; + break; + case BSIM3v1S_IC_VGS: + here->BSIM3v1SicVGS = value->rValue; + here->BSIM3v1SicVGSGiven = TRUE; + break; + case BSIM3v1S_NQSMOD: + here->BSIM3v1SnqsMod = value->iValue; + here->BSIM3v1SnqsModGiven = TRUE; + break; + case BSIM3v1S_IC: + switch(value->v.numValue){ + case 3: + here->BSIM3v1SicVBS = *(value->v.vec.rVec+2); + here->BSIM3v1SicVBSGiven = TRUE; + case 2: + here->BSIM3v1SicVGS = *(value->v.vec.rVec+1); + here->BSIM3v1SicVGSGiven = TRUE; + case 1: + here->BSIM3v1SicVDS = *(value->v.vec.rVec); + here->BSIM3v1SicVDSGiven = TRUE; + break; + default: + return(E_BADPARM); + } + break; + default: + return(E_BADPARM); + } + return(OK); +} + + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1spzld.c b/src/spicelib/devices/bsim3v1s/b3v1spzld.c new file mode 100644 index 000000000..ba9a50db1 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1spzld.c @@ -0,0 +1,147 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1pzld.c +**********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "complex.h" +#include "sperror.h" +#include "bsim3v1sdef.h" +#include "suffix.h" + +int +BSIM3v1SpzLoad(GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s) +{ +BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; +BSIM3v1Sinstance *here; +double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb; +double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb; +double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb; +double GSoverlapCap, GDoverlapCap, GBoverlapCap; +double FwdSum, RevSum, Gm, Gmbs; + + for (; model != NULL; model = model->BSIM3v1SnextModel) + { for (here = model->BSIM3v1Sinstances; here!= NULL; + here = here->BSIM3v1SnextInstance) + { + if (here->BSIM3v1Sowner != ARCHme) + continue; + + if (here->BSIM3v1Smode >= 0) + { Gm = here->BSIM3v1Sgm; + Gmbs = here->BSIM3v1Sgmbs; + FwdSum = Gm + Gmbs; + RevSum = 0.0; + cggb = here->BSIM3v1Scggb; + cgsb = here->BSIM3v1Scgsb; + cgdb = here->BSIM3v1Scgdb; + + cbgb = here->BSIM3v1Scbgb; + cbsb = here->BSIM3v1Scbsb; + cbdb = here->BSIM3v1Scbdb; + + cdgb = here->BSIM3v1Scdgb; + cdsb = here->BSIM3v1Scdsb; + cddb = here->BSIM3v1Scddb; + } + else + { Gm = -here->BSIM3v1Sgm; + Gmbs = -here->BSIM3v1Sgmbs; + FwdSum = 0.0; + RevSum = -Gm - Gmbs; + cggb = here->BSIM3v1Scggb; + cgsb = here->BSIM3v1Scgdb; + cgdb = here->BSIM3v1Scgsb; + + cbgb = here->BSIM3v1Scbgb; + cbsb = here->BSIM3v1Scbdb; + cbdb = here->BSIM3v1Scbsb; + + cdgb = -(here->BSIM3v1Scdgb + cggb + cbgb); + cdsb = -(here->BSIM3v1Scddb + cgsb + cbsb); + cddb = -(here->BSIM3v1Scdsb + cgdb + cbdb); + } + gdpr=here->BSIM3v1SdrainConductance; + gspr=here->BSIM3v1SsourceConductance; + gds= here->BSIM3v1Sgds; + gbd= here->BSIM3v1Sgbd; + gbs= here->BSIM3v1Sgbs; + capbd= here->BSIM3v1Scapbd; + capbs= here->BSIM3v1Scapbs; + GSoverlapCap = here->BSIM3v1Scgso; + GDoverlapCap = here->BSIM3v1Scgdo; + GBoverlapCap = here->pParam->BSIM3v1Scgbo; + + xcdgb = (cdgb - GDoverlapCap); + xcddb = (cddb + capbd + GDoverlapCap); + xcdsb = cdsb; + xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap); + xcsdb = -(cgdb + cbdb + cddb); + xcssb = (capbs + GSoverlapCap - (cgsb+cbsb+cdsb)); + xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap); + xcgdb = (cgdb - GDoverlapCap); + xcgsb = (cgsb - GSoverlapCap); + xcbgb = (cbgb - GBoverlapCap); + xcbdb = (cbdb - capbd); + xcbsb = (cbsb - capbs); + + + *(here->BSIM3v1SGgPtr ) += xcggb * s->real; + *(here->BSIM3v1SGgPtr +1) += xcggb * s->imag; + *(here->BSIM3v1SBbPtr ) += (-xcbgb-xcbdb-xcbsb) * s->real; + *(here->BSIM3v1SBbPtr +1) += (-xcbgb-xcbdb-xcbsb) * s->imag; + *(here->BSIM3v1SDPdpPtr ) += xcddb * s->real; + *(here->BSIM3v1SDPdpPtr +1) += xcddb * s->imag; + *(here->BSIM3v1SSPspPtr ) += xcssb * s->real; + *(here->BSIM3v1SSPspPtr +1) += xcssb * s->imag; + *(here->BSIM3v1SGbPtr ) += (-xcggb-xcgdb-xcgsb) * s->real; + *(here->BSIM3v1SGbPtr +1) += (-xcggb-xcgdb-xcgsb) * s->imag; + *(here->BSIM3v1SGdpPtr ) += xcgdb * s->real; + *(here->BSIM3v1SGdpPtr +1) += xcgdb * s->imag; + *(here->BSIM3v1SGspPtr ) += xcgsb * s->real; + *(here->BSIM3v1SGspPtr +1) += xcgsb * s->imag; + *(here->BSIM3v1SBgPtr ) += xcbgb * s->real; + *(here->BSIM3v1SBgPtr +1) += xcbgb * s->imag; + *(here->BSIM3v1SBdpPtr ) += xcbdb * s->real; + *(here->BSIM3v1SBdpPtr +1) += xcbdb * s->imag; + *(here->BSIM3v1SBspPtr ) += xcbsb * s->real; + *(here->BSIM3v1SBspPtr +1) += xcbsb * s->imag; + *(here->BSIM3v1SDPgPtr ) += xcdgb * s->real; + *(here->BSIM3v1SDPgPtr +1) += xcdgb * s->imag; + *(here->BSIM3v1SDPbPtr ) += (-xcdgb-xcddb-xcdsb) * s->real; + *(here->BSIM3v1SDPbPtr +1) += (-xcdgb-xcddb-xcdsb) * s->imag; + *(here->BSIM3v1SDPspPtr ) += xcdsb * s->real; + *(here->BSIM3v1SDPspPtr +1) += xcdsb * s->imag; + *(here->BSIM3v1SSPgPtr ) += xcsgb * s->real; + *(here->BSIM3v1SSPgPtr +1) += xcsgb * s->imag; + *(here->BSIM3v1SSPbPtr ) += (-xcsgb-xcsdb-xcssb) * s->real; + *(here->BSIM3v1SSPbPtr +1) += (-xcsgb-xcsdb-xcssb) * s->imag; + *(here->BSIM3v1SSPdpPtr ) += xcsdb * s->real; + *(here->BSIM3v1SSPdpPtr +1) += xcsdb * s->imag; + *(here->BSIM3v1SDdPtr) += gdpr; + *(here->BSIM3v1SSsPtr) += gspr; + *(here->BSIM3v1SBbPtr) += gbd+gbs; + *(here->BSIM3v1SDPdpPtr) += gdpr+gds+gbd+RevSum; + *(here->BSIM3v1SSPspPtr) += gspr+gds+gbs+FwdSum; + *(here->BSIM3v1SDdpPtr) -= gdpr; + *(here->BSIM3v1SSspPtr) -= gspr; + *(here->BSIM3v1SBdpPtr) -= gbd; + *(here->BSIM3v1SBspPtr) -= gbs; + *(here->BSIM3v1SDPdPtr) -= gdpr; + *(here->BSIM3v1SDPgPtr) += Gm; + *(here->BSIM3v1SDPbPtr) -= gbd - Gmbs; + *(here->BSIM3v1SDPspPtr) -= gds + FwdSum; + *(here->BSIM3v1SSPgPtr) -= Gm; + *(here->BSIM3v1SSPsPtr) -= gspr; + *(here->BSIM3v1SSPbPtr) -= gbs + Gmbs; + *(here->BSIM3v1SSPdpPtr) -= gds + RevSum; + + } + } + return(OK); +} + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1sset.c b/src/spicelib/devices/bsim3v1s/b3v1sset.c new file mode 100644 index 000000000..2fcb89113 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1sset.c @@ -0,0 +1,981 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1sset.c +**********/ + +#include "ngspice.h" +#include "smpdefs.h" +#include "cktdefs.h" +#include "bsim3v1sdef.h" +#include "const.h" +#include "sperror.h" +#include "suffix.h" + +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define SMOOTHFACTOR 0.1 +#define EPSOX 3.453133e-11 +#define EPSSI 1.03594e-10 +#define PI 3.141592654 +#define Charge_q 1.60219e-19 +#define Meter2Micron 1.0e6 + +int +BSIM3v1Ssetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, + int *states) +{ +BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; +BSIM3v1Sinstance *here; +int error; +CKTnode *tmp; + +CKTnode *tmpNode; +IFuid tmpName; + + + /* loop through all the BSIM3v1S device models */ + for( ; model != NULL; model = model->BSIM3v1SnextModel ) + { +/* Default value Processing for BSIM3v1S MOSFET Models */ + if (!model->BSIM3v1StypeGiven) + model->BSIM3v1Stype = NMOS; + if (!model->BSIM3v1SmobModGiven) + model->BSIM3v1SmobMod = 1; + if (!model->BSIM3v1SbinUnitGiven) + model->BSIM3v1SbinUnit = 1; + if (!model->BSIM3v1SparamChkGiven) + model->BSIM3v1SparamChk = 0; + if (!model->BSIM3v1ScapModGiven) + model->BSIM3v1ScapMod = 2; + if (!model->BSIM3v1SnqsModGiven) + model->BSIM3v1SnqsMod = 0; + if (!model->BSIM3v1SnoiModGiven) + model->BSIM3v1SnoiMod = 1; + if (!model->BSIM3v1SversionGiven) + model->BSIM3v1Sversion = 3.1; + if (!model->BSIM3v1StoxGiven) + model->BSIM3v1Stox = 150.0e-10; + model->BSIM3v1Scox = 3.453133e-11 / model->BSIM3v1Stox; + + if (!model->BSIM3v1ScdscGiven) + model->BSIM3v1Scdsc = 2.4e-4; /* unit Q/V/m^2 */ + if (!model->BSIM3v1ScdscbGiven) + model->BSIM3v1Scdscb = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM3v1ScdscdGiven) + model->BSIM3v1Scdscd = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM3v1ScitGiven) + model->BSIM3v1Scit = 0.0; /* unit Q/V/m^2 */ + if (!model->BSIM3v1SnfactorGiven) + model->BSIM3v1Snfactor = 1; + if (!model->BSIM3v1SxjGiven) + model->BSIM3v1Sxj = .15e-6; + if (!model->BSIM3v1SvsatGiven) + model->BSIM3v1Svsat = 8.0e4; /* unit m/s */ + if (!model->BSIM3v1SatGiven) + model->BSIM3v1Sat = 3.3e4; /* unit m/s */ + if (!model->BSIM3v1Sa0Given) + model->BSIM3v1Sa0 = 1.0; + if (!model->BSIM3v1SagsGiven) + model->BSIM3v1Sags = 0.0; + if (!model->BSIM3v1Sa1Given) + model->BSIM3v1Sa1 = 0.0; + if (!model->BSIM3v1Sa2Given) + model->BSIM3v1Sa2 = 1.0; + if (!model->BSIM3v1SketaGiven) + model->BSIM3v1Sketa = -0.047; /* unit / V */ + if (!model->BSIM3v1SnsubGiven) + model->BSIM3v1Snsub = 6.0e16; /* unit 1/cm3 */ + if (!model->BSIM3v1SnpeakGiven) + model->BSIM3v1Snpeak = 1.7e17; /* unit 1/cm3 */ + if (!model->BSIM3v1SngateGiven) + model->BSIM3v1Sngate = 0; /* unit 1/cm3 */ + if (!model->BSIM3v1SvbmGiven) + model->BSIM3v1Svbm = -3.0; + if (!model->BSIM3v1SxtGiven) + model->BSIM3v1Sxt = 1.55e-7; + if (!model->BSIM3v1Skt1Given) + model->BSIM3v1Skt1 = -0.11; /* unit V */ + if (!model->BSIM3v1Skt1lGiven) + model->BSIM3v1Skt1l = 0.0; /* unit V*m */ + if (!model->BSIM3v1Skt2Given) + model->BSIM3v1Skt2 = 0.022; /* No unit */ + if (!model->BSIM3v1Sk3Given) + model->BSIM3v1Sk3 = 80.0; + if (!model->BSIM3v1Sk3bGiven) + model->BSIM3v1Sk3b = 0.0; + if (!model->BSIM3v1Sw0Given) + model->BSIM3v1Sw0 = 2.5e-6; + if (!model->BSIM3v1SnlxGiven) + model->BSIM3v1Snlx = 1.74e-7; + if (!model->BSIM3v1Sdvt0Given) + model->BSIM3v1Sdvt0 = 2.2; + if (!model->BSIM3v1Sdvt1Given) + model->BSIM3v1Sdvt1 = 0.53; + if (!model->BSIM3v1Sdvt2Given) + model->BSIM3v1Sdvt2 = -0.032; /* unit 1 / V */ + + if (!model->BSIM3v1Sdvt0wGiven) + model->BSIM3v1Sdvt0w = 0.0; + if (!model->BSIM3v1Sdvt1wGiven) + model->BSIM3v1Sdvt1w = 5.3e6; + if (!model->BSIM3v1Sdvt2wGiven) + model->BSIM3v1Sdvt2w = -0.032; + + if (!model->BSIM3v1SdroutGiven) + model->BSIM3v1Sdrout = 0.56; + if (!model->BSIM3v1SdsubGiven) + model->BSIM3v1Sdsub = model->BSIM3v1Sdrout; + if (!model->BSIM3v1Svth0Given) + model->BSIM3v1Svth0 = (model->BSIM3v1Stype == NMOS) ? 0.7 : -0.7; + if (!model->BSIM3v1SuaGiven) + model->BSIM3v1Sua = 2.25e-9; /* unit m/V */ + if (!model->BSIM3v1Sua1Given) + model->BSIM3v1Sua1 = 4.31e-9; /* unit m/V */ + if (!model->BSIM3v1SubGiven) + model->BSIM3v1Sub = 5.87e-19; /* unit (m/V)**2 */ + if (!model->BSIM3v1Sub1Given) + model->BSIM3v1Sub1 = -7.61e-18; /* unit (m/V)**2 */ + if (!model->BSIM3v1SucGiven) + model->BSIM3v1Suc = (model->BSIM3v1SmobMod == 3) ? -0.0465 : -0.0465e-9; + if (!model->BSIM3v1Suc1Given) + model->BSIM3v1Suc1 = (model->BSIM3v1SmobMod == 3) ? -0.056 : -0.056e-9; + if (!model->BSIM3v1Su0Given) + model->BSIM3v1Su0 = (model->BSIM3v1Stype == NMOS) ? 0.067 : 0.025; + if (!model->BSIM3v1SuteGiven) + model->BSIM3v1Sute = -1.5; + if (!model->BSIM3v1SvoffGiven) + model->BSIM3v1Svoff = -0.08; + if (!model->BSIM3v1SdeltaGiven) + model->BSIM3v1Sdelta = 0.01; + if (!model->BSIM3v1SrdswGiven) + model->BSIM3v1Srdsw = 0; + if (!model->BSIM3v1SprwgGiven) + model->BSIM3v1Sprwg = 0.0; /* unit 1/V */ + if (!model->BSIM3v1SprwbGiven) + model->BSIM3v1Sprwb = 0.0; + if (!model->BSIM3v1SprtGiven) + if (!model->BSIM3v1SprtGiven) + model->BSIM3v1Sprt = 0.0; + if (!model->BSIM3v1Seta0Given) + model->BSIM3v1Seta0 = 0.08; /* no unit */ + if (!model->BSIM3v1SetabGiven) + model->BSIM3v1Setab = -0.07; /* unit 1/V */ + if (!model->BSIM3v1SpclmGiven) + model->BSIM3v1Spclm = 1.3; /* no unit */ + if (!model->BSIM3v1Spdibl1Given) + model->BSIM3v1Spdibl1 = .39; /* no unit */ + if (!model->BSIM3v1Spdibl2Given) + model->BSIM3v1Spdibl2 = 0.0086; /* no unit */ + if (!model->BSIM3v1SpdiblbGiven) + model->BSIM3v1Spdiblb = 0.0; /* 1/V */ + if (!model->BSIM3v1Spscbe1Given) + model->BSIM3v1Spscbe1 = 4.24e8; + if (!model->BSIM3v1Spscbe2Given) + model->BSIM3v1Spscbe2 = 1.0e-5; + if (!model->BSIM3v1SpvagGiven) + model->BSIM3v1Spvag = 0.0; + if (!model->BSIM3v1SwrGiven) + model->BSIM3v1Swr = 1.0; + if (!model->BSIM3v1SdwgGiven) + model->BSIM3v1Sdwg = 0.0; + if (!model->BSIM3v1SdwbGiven) + model->BSIM3v1Sdwb = 0.0; + if (!model->BSIM3v1Sb0Given) + model->BSIM3v1Sb0 = 0.0; + if (!model->BSIM3v1Sb1Given) + model->BSIM3v1Sb1 = 0.0; + if (!model->BSIM3v1Salpha0Given) + model->BSIM3v1Salpha0 = 0.0; + if (!model->BSIM3v1Sbeta0Given) + model->BSIM3v1Sbeta0 = 30.0; + + if (!model->BSIM3v1SelmGiven) + model->BSIM3v1Selm = 5.0; + if (!model->BSIM3v1ScgslGiven) + model->BSIM3v1Scgsl = 0.0; + if (!model->BSIM3v1ScgdlGiven) + model->BSIM3v1Scgdl = 0.0; + if (!model->BSIM3v1SckappaGiven) + model->BSIM3v1Sckappa = 0.6; + if (!model->BSIM3v1SclcGiven) + model->BSIM3v1Sclc = 0.1e-6; + if (!model->BSIM3v1ScleGiven) + model->BSIM3v1Scle = 0.6; + if (!model->BSIM3v1SvfbcvGiven) + model->BSIM3v1Svfbcv = -1.0; + + /* Length dependence */ + if (!model->BSIM3v1SlcdscGiven) + model->BSIM3v1Slcdsc = 0.0; + if (!model->BSIM3v1SlcdscbGiven) + model->BSIM3v1Slcdscb = 0.0; + if (!model->BSIM3v1SlcdscdGiven) + model->BSIM3v1Slcdscd = 0.0; + if (!model->BSIM3v1SlcitGiven) + model->BSIM3v1Slcit = 0.0; + if (!model->BSIM3v1SlnfactorGiven) + model->BSIM3v1Slnfactor = 0.0; + if (!model->BSIM3v1SlxjGiven) + model->BSIM3v1Slxj = 0.0; + if (!model->BSIM3v1SlvsatGiven) + model->BSIM3v1Slvsat = 0.0; + if (!model->BSIM3v1SlatGiven) + model->BSIM3v1Slat = 0.0; + if (!model->BSIM3v1Sla0Given) + model->BSIM3v1Sla0 = 0.0; + if (!model->BSIM3v1SlagsGiven) + model->BSIM3v1Slags = 0.0; + if (!model->BSIM3v1Sla1Given) + model->BSIM3v1Sla1 = 0.0; + if (!model->BSIM3v1Sla2Given) + model->BSIM3v1Sla2 = 0.0; + if (!model->BSIM3v1SlketaGiven) + model->BSIM3v1Slketa = 0.0; + if (!model->BSIM3v1SlnsubGiven) + model->BSIM3v1Slnsub = 0.0; + if (!model->BSIM3v1SlnpeakGiven) + model->BSIM3v1Slnpeak = 0.0; + if (!model->BSIM3v1SlngateGiven) + model->BSIM3v1Slngate = 0.0; + if (!model->BSIM3v1SlvbmGiven) + model->BSIM3v1Slvbm = 0.0; + if (!model->BSIM3v1SlxtGiven) + model->BSIM3v1Slxt = 0.0; + if (!model->BSIM3v1Slkt1Given) + model->BSIM3v1Slkt1 = 0.0; + if (!model->BSIM3v1Slkt1lGiven) + model->BSIM3v1Slkt1l = 0.0; + if (!model->BSIM3v1Slkt2Given) + model->BSIM3v1Slkt2 = 0.0; + if (!model->BSIM3v1Slk3Given) + model->BSIM3v1Slk3 = 0.0; + if (!model->BSIM3v1Slk3bGiven) + model->BSIM3v1Slk3b = 0.0; + if (!model->BSIM3v1Slw0Given) + model->BSIM3v1Slw0 = 0.0; + if (!model->BSIM3v1SlnlxGiven) + model->BSIM3v1Slnlx = 0.0; + if (!model->BSIM3v1Sldvt0Given) + model->BSIM3v1Sldvt0 = 0.0; + if (!model->BSIM3v1Sldvt1Given) + model->BSIM3v1Sldvt1 = 0.0; + if (!model->BSIM3v1Sldvt2Given) + model->BSIM3v1Sldvt2 = 0.0; + if (!model->BSIM3v1Sldvt0wGiven) + model->BSIM3v1Sldvt0w = 0.0; + if (!model->BSIM3v1Sldvt1wGiven) + model->BSIM3v1Sldvt1w = 0.0; + if (!model->BSIM3v1Sldvt2wGiven) + model->BSIM3v1Sldvt2w = 0.0; + if (!model->BSIM3v1SldroutGiven) + model->BSIM3v1Sldrout = 0.0; + if (!model->BSIM3v1SldsubGiven) + model->BSIM3v1Sldsub = 0.0; + if (!model->BSIM3v1Slvth0Given) + model->BSIM3v1Slvth0 = 0.0; + if (!model->BSIM3v1SluaGiven) + model->BSIM3v1Slua = 0.0; + if (!model->BSIM3v1Slua1Given) + model->BSIM3v1Slua1 = 0.0; + if (!model->BSIM3v1SlubGiven) + model->BSIM3v1Slub = 0.0; + if (!model->BSIM3v1Slub1Given) + model->BSIM3v1Slub1 = 0.0; + if (!model->BSIM3v1SlucGiven) + model->BSIM3v1Sluc = 0.0; + if (!model->BSIM3v1Sluc1Given) + model->BSIM3v1Sluc1 = 0.0; + if (!model->BSIM3v1Slu0Given) + model->BSIM3v1Slu0 = 0.0; + if (!model->BSIM3v1SluteGiven) + model->BSIM3v1Slute = 0.0; + if (!model->BSIM3v1SlvoffGiven) + model->BSIM3v1Slvoff = 0.0; + if (!model->BSIM3v1SldeltaGiven) + model->BSIM3v1Sldelta = 0.0; + if (!model->BSIM3v1SlrdswGiven) + model->BSIM3v1Slrdsw = 0.0; + if (!model->BSIM3v1SlprwbGiven) + model->BSIM3v1Slprwb = 0.0; + if (!model->BSIM3v1SlprwgGiven) + model->BSIM3v1Slprwg = 0.0; + if (!model->BSIM3v1SlprtGiven) + if (!model->BSIM3v1SlprtGiven) + model->BSIM3v1Slprt = 0.0; + if (!model->BSIM3v1Sleta0Given) + model->BSIM3v1Sleta0 = 0.0; + if (!model->BSIM3v1SletabGiven) + model->BSIM3v1Sletab = -0.0; + if (!model->BSIM3v1SlpclmGiven) + model->BSIM3v1Slpclm = 0.0; + if (!model->BSIM3v1Slpdibl1Given) + model->BSIM3v1Slpdibl1 = 0.0; + if (!model->BSIM3v1Slpdibl2Given) + model->BSIM3v1Slpdibl2 = 0.0; + if (!model->BSIM3v1SlpdiblbGiven) + model->BSIM3v1Slpdiblb = 0.0; + if (!model->BSIM3v1Slpscbe1Given) + model->BSIM3v1Slpscbe1 = 0.0; + if (!model->BSIM3v1Slpscbe2Given) + model->BSIM3v1Slpscbe2 = 0.0; + if (!model->BSIM3v1SlpvagGiven) + model->BSIM3v1Slpvag = 0.0; + if (!model->BSIM3v1SlwrGiven) + model->BSIM3v1Slwr = 0.0; + if (!model->BSIM3v1SldwgGiven) + model->BSIM3v1Sldwg = 0.0; + if (!model->BSIM3v1SldwbGiven) + model->BSIM3v1Sldwb = 0.0; + if (!model->BSIM3v1Slb0Given) + model->BSIM3v1Slb0 = 0.0; + if (!model->BSIM3v1Slb1Given) + model->BSIM3v1Slb1 = 0.0; + if (!model->BSIM3v1Slalpha0Given) + model->BSIM3v1Slalpha0 = 0.0; + if (!model->BSIM3v1Slbeta0Given) + model->BSIM3v1Slbeta0 = 0.0; + + if (!model->BSIM3v1SlelmGiven) + model->BSIM3v1Slelm = 0.0; + if (!model->BSIM3v1SlcgslGiven) + model->BSIM3v1Slcgsl = 0.0; + if (!model->BSIM3v1SlcgdlGiven) + model->BSIM3v1Slcgdl = 0.0; + if (!model->BSIM3v1SlckappaGiven) + model->BSIM3v1Slckappa = 0.0; + if (!model->BSIM3v1SlclcGiven) + model->BSIM3v1Slclc = 0.0; + if (!model->BSIM3v1SlcleGiven) + model->BSIM3v1Slcle = 0.0; + if (!model->BSIM3v1SlcfGiven) + model->BSIM3v1Slcf = 0.0; + if (!model->BSIM3v1SlvfbcvGiven) + model->BSIM3v1Slvfbcv = 0.0; + + /* Width dependence */ + if (!model->BSIM3v1SwcdscGiven) + model->BSIM3v1Swcdsc = 0.0; + if (!model->BSIM3v1SwcdscbGiven) + model->BSIM3v1Swcdscb = 0.0; + if (!model->BSIM3v1SwcdscdGiven) + model->BSIM3v1Swcdscd = 0.0; + if (!model->BSIM3v1SwcitGiven) + model->BSIM3v1Swcit = 0.0; + if (!model->BSIM3v1SwnfactorGiven) + model->BSIM3v1Swnfactor = 0.0; + if (!model->BSIM3v1SwxjGiven) + model->BSIM3v1Swxj = 0.0; + if (!model->BSIM3v1SwvsatGiven) + model->BSIM3v1Swvsat = 0.0; + if (!model->BSIM3v1SwatGiven) + model->BSIM3v1Swat = 0.0; + if (!model->BSIM3v1Swa0Given) + model->BSIM3v1Swa0 = 0.0; + if (!model->BSIM3v1SwagsGiven) + model->BSIM3v1Swags = 0.0; + if (!model->BSIM3v1Swa1Given) + model->BSIM3v1Swa1 = 0.0; + if (!model->BSIM3v1Swa2Given) + model->BSIM3v1Swa2 = 0.0; + if (!model->BSIM3v1SwketaGiven) + model->BSIM3v1Swketa = 0.0; + if (!model->BSIM3v1SwnsubGiven) + model->BSIM3v1Swnsub = 0.0; + if (!model->BSIM3v1SwnpeakGiven) + model->BSIM3v1Swnpeak = 0.0; + if (!model->BSIM3v1SwngateGiven) + model->BSIM3v1Swngate = 0.0; + if (!model->BSIM3v1SwvbmGiven) + model->BSIM3v1Swvbm = 0.0; + if (!model->BSIM3v1SwxtGiven) + model->BSIM3v1Swxt = 0.0; + if (!model->BSIM3v1Swkt1Given) + model->BSIM3v1Swkt1 = 0.0; + if (!model->BSIM3v1Swkt1lGiven) + model->BSIM3v1Swkt1l = 0.0; + if (!model->BSIM3v1Swkt2Given) + model->BSIM3v1Swkt2 = 0.0; + if (!model->BSIM3v1Swk3Given) + model->BSIM3v1Swk3 = 0.0; + if (!model->BSIM3v1Swk3bGiven) + model->BSIM3v1Swk3b = 0.0; + if (!model->BSIM3v1Sww0Given) + model->BSIM3v1Sww0 = 0.0; + if (!model->BSIM3v1SwnlxGiven) + model->BSIM3v1Swnlx = 0.0; + if (!model->BSIM3v1Swdvt0Given) + model->BSIM3v1Swdvt0 = 0.0; + if (!model->BSIM3v1Swdvt1Given) + model->BSIM3v1Swdvt1 = 0.0; + if (!model->BSIM3v1Swdvt2Given) + model->BSIM3v1Swdvt2 = 0.0; + if (!model->BSIM3v1Swdvt0wGiven) + model->BSIM3v1Swdvt0w = 0.0; + if (!model->BSIM3v1Swdvt1wGiven) + model->BSIM3v1Swdvt1w = 0.0; + if (!model->BSIM3v1Swdvt2wGiven) + model->BSIM3v1Swdvt2w = 0.0; + if (!model->BSIM3v1SwdroutGiven) + model->BSIM3v1Swdrout = 0.0; + if (!model->BSIM3v1SwdsubGiven) + model->BSIM3v1Swdsub = 0.0; + if (!model->BSIM3v1Swvth0Given) + model->BSIM3v1Swvth0 = 0.0; + if (!model->BSIM3v1SwuaGiven) + model->BSIM3v1Swua = 0.0; + if (!model->BSIM3v1Swua1Given) + model->BSIM3v1Swua1 = 0.0; + if (!model->BSIM3v1SwubGiven) + model->BSIM3v1Swub = 0.0; + if (!model->BSIM3v1Swub1Given) + model->BSIM3v1Swub1 = 0.0; + if (!model->BSIM3v1SwucGiven) + model->BSIM3v1Swuc = 0.0; + if (!model->BSIM3v1Swuc1Given) + model->BSIM3v1Swuc1 = 0.0; + if (!model->BSIM3v1Swu0Given) + model->BSIM3v1Swu0 = 0.0; + if (!model->BSIM3v1SwuteGiven) + model->BSIM3v1Swute = 0.0; + if (!model->BSIM3v1SwvoffGiven) + model->BSIM3v1Swvoff = 0.0; + if (!model->BSIM3v1SwdeltaGiven) + model->BSIM3v1Swdelta = 0.0; + if (!model->BSIM3v1SwrdswGiven) + model->BSIM3v1Swrdsw = 0.0; + if (!model->BSIM3v1SwprwbGiven) + model->BSIM3v1Swprwb = 0.0; + if (!model->BSIM3v1SwprwgGiven) + model->BSIM3v1Swprwg = 0.0; + if (!model->BSIM3v1SwprtGiven) + model->BSIM3v1Swprt = 0.0; + if (!model->BSIM3v1Sweta0Given) + model->BSIM3v1Sweta0 = 0.0; + if (!model->BSIM3v1SwetabGiven) + model->BSIM3v1Swetab = 0.0; + if (!model->BSIM3v1SwpclmGiven) + model->BSIM3v1Swpclm = 0.0; + if (!model->BSIM3v1Swpdibl1Given) + model->BSIM3v1Swpdibl1 = 0.0; + if (!model->BSIM3v1Swpdibl2Given) + model->BSIM3v1Swpdibl2 = 0.0; + if (!model->BSIM3v1SwpdiblbGiven) + model->BSIM3v1Swpdiblb = 0.0; + if (!model->BSIM3v1Swpscbe1Given) + model->BSIM3v1Swpscbe1 = 0.0; + if (!model->BSIM3v1Swpscbe2Given) + model->BSIM3v1Swpscbe2 = 0.0; + if (!model->BSIM3v1SwpvagGiven) + model->BSIM3v1Swpvag = 0.0; + if (!model->BSIM3v1SwwrGiven) + model->BSIM3v1Swwr = 0.0; + if (!model->BSIM3v1SwdwgGiven) + model->BSIM3v1Swdwg = 0.0; + if (!model->BSIM3v1SwdwbGiven) + model->BSIM3v1Swdwb = 0.0; + if (!model->BSIM3v1Swb0Given) + model->BSIM3v1Swb0 = 0.0; + if (!model->BSIM3v1Swb1Given) + model->BSIM3v1Swb1 = 0.0; + if (!model->BSIM3v1Swalpha0Given) + model->BSIM3v1Swalpha0 = 0.0; + if (!model->BSIM3v1Swbeta0Given) + model->BSIM3v1Swbeta0 = 0.0; + + if (!model->BSIM3v1SwelmGiven) + model->BSIM3v1Swelm = 0.0; + if (!model->BSIM3v1SwcgslGiven) + model->BSIM3v1Swcgsl = 0.0; + if (!model->BSIM3v1SwcgdlGiven) + model->BSIM3v1Swcgdl = 0.0; + if (!model->BSIM3v1SwckappaGiven) + model->BSIM3v1Swckappa = 0.0; + if (!model->BSIM3v1SwcfGiven) + model->BSIM3v1Swcf = 0.0; + if (!model->BSIM3v1SwclcGiven) + model->BSIM3v1Swclc = 0.0; + if (!model->BSIM3v1SwcleGiven) + model->BSIM3v1Swcle = 0.0; + if (!model->BSIM3v1SwvfbcvGiven) + model->BSIM3v1Swvfbcv = 0.0; + + /* Cross-term dependence */ + if (!model->BSIM3v1SpcdscGiven) + model->BSIM3v1Spcdsc = 0.0; + if (!model->BSIM3v1SpcdscbGiven) + model->BSIM3v1Spcdscb = 0.0; + if (!model->BSIM3v1SpcdscdGiven) + model->BSIM3v1Spcdscd = 0.0; + if (!model->BSIM3v1SpcitGiven) + model->BSIM3v1Spcit = 0.0; + if (!model->BSIM3v1SpnfactorGiven) + model->BSIM3v1Spnfactor = 0.0; + if (!model->BSIM3v1SpxjGiven) + model->BSIM3v1Spxj = 0.0; + if (!model->BSIM3v1SpvsatGiven) + model->BSIM3v1Spvsat = 0.0; + if (!model->BSIM3v1SpatGiven) + model->BSIM3v1Spat = 0.0; + if (!model->BSIM3v1Spa0Given) + model->BSIM3v1Spa0 = 0.0; + + if (!model->BSIM3v1SpagsGiven) + model->BSIM3v1Spags = 0.0; + if (!model->BSIM3v1Spa1Given) + model->BSIM3v1Spa1 = 0.0; + if (!model->BSIM3v1Spa2Given) + model->BSIM3v1Spa2 = 0.0; + if (!model->BSIM3v1SpketaGiven) + model->BSIM3v1Spketa = 0.0; + if (!model->BSIM3v1SpnsubGiven) + model->BSIM3v1Spnsub = 0.0; + if (!model->BSIM3v1SpnpeakGiven) + model->BSIM3v1Spnpeak = 0.0; + if (!model->BSIM3v1SpngateGiven) + model->BSIM3v1Spngate = 0.0; + if (!model->BSIM3v1SpvbmGiven) + model->BSIM3v1Spvbm = 0.0; + if (!model->BSIM3v1SpxtGiven) + model->BSIM3v1Spxt = 0.0; + if (!model->BSIM3v1Spkt1Given) + model->BSIM3v1Spkt1 = 0.0; + if (!model->BSIM3v1Spkt1lGiven) + model->BSIM3v1Spkt1l = 0.0; + if (!model->BSIM3v1Spkt2Given) + model->BSIM3v1Spkt2 = 0.0; + if (!model->BSIM3v1Spk3Given) + model->BSIM3v1Spk3 = 0.0; + if (!model->BSIM3v1Spk3bGiven) + model->BSIM3v1Spk3b = 0.0; + if (!model->BSIM3v1Spw0Given) + model->BSIM3v1Spw0 = 0.0; + if (!model->BSIM3v1SpnlxGiven) + model->BSIM3v1Spnlx = 0.0; + if (!model->BSIM3v1Spdvt0Given) + model->BSIM3v1Spdvt0 = 0.0; + if (!model->BSIM3v1Spdvt1Given) + model->BSIM3v1Spdvt1 = 0.0; + if (!model->BSIM3v1Spdvt2Given) + model->BSIM3v1Spdvt2 = 0.0; + if (!model->BSIM3v1Spdvt0wGiven) + model->BSIM3v1Spdvt0w = 0.0; + if (!model->BSIM3v1Spdvt1wGiven) + model->BSIM3v1Spdvt1w = 0.0; + if (!model->BSIM3v1Spdvt2wGiven) + model->BSIM3v1Spdvt2w = 0.0; + if (!model->BSIM3v1SpdroutGiven) + model->BSIM3v1Spdrout = 0.0; + if (!model->BSIM3v1SpdsubGiven) + model->BSIM3v1Spdsub = 0.0; + if (!model->BSIM3v1Spvth0Given) + model->BSIM3v1Spvth0 = 0.0; + if (!model->BSIM3v1SpuaGiven) + model->BSIM3v1Spua = 0.0; + if (!model->BSIM3v1Spua1Given) + model->BSIM3v1Spua1 = 0.0; + if (!model->BSIM3v1SpubGiven) + model->BSIM3v1Spub = 0.0; + if (!model->BSIM3v1Spub1Given) + model->BSIM3v1Spub1 = 0.0; + if (!model->BSIM3v1SpucGiven) + model->BSIM3v1Spuc = 0.0; + if (!model->BSIM3v1Spuc1Given) + model->BSIM3v1Spuc1 = 0.0; + if (!model->BSIM3v1Spu0Given) + model->BSIM3v1Spu0 = 0.0; + if (!model->BSIM3v1SputeGiven) + model->BSIM3v1Spute = 0.0; + if (!model->BSIM3v1SpvoffGiven) + model->BSIM3v1Spvoff = 0.0; + if (!model->BSIM3v1SpdeltaGiven) + model->BSIM3v1Spdelta = 0.0; + if (!model->BSIM3v1SprdswGiven) + model->BSIM3v1Sprdsw = 0.0; + if (!model->BSIM3v1SpprwbGiven) + model->BSIM3v1Spprwb = 0.0; + if (!model->BSIM3v1SpprwgGiven) + model->BSIM3v1Spprwg = 0.0; + if (!model->BSIM3v1SpprtGiven) + model->BSIM3v1Spprt = 0.0; + if (!model->BSIM3v1Speta0Given) + model->BSIM3v1Speta0 = 0.0; + if (!model->BSIM3v1SpetabGiven) + model->BSIM3v1Spetab = 0.0; + if (!model->BSIM3v1SppclmGiven) + model->BSIM3v1Sppclm = 0.0; + if (!model->BSIM3v1Sppdibl1Given) + model->BSIM3v1Sppdibl1 = 0.0; + if (!model->BSIM3v1Sppdibl2Given) + model->BSIM3v1Sppdibl2 = 0.0; + if (!model->BSIM3v1SppdiblbGiven) + model->BSIM3v1Sppdiblb = 0.0; + if (!model->BSIM3v1Sppscbe1Given) + model->BSIM3v1Sppscbe1 = 0.0; + if (!model->BSIM3v1Sppscbe2Given) + model->BSIM3v1Sppscbe2 = 0.0; + if (!model->BSIM3v1SppvagGiven) + model->BSIM3v1Sppvag = 0.0; + if (!model->BSIM3v1SpwrGiven) + model->BSIM3v1Spwr = 0.0; + if (!model->BSIM3v1SpdwgGiven) + model->BSIM3v1Spdwg = 0.0; + if (!model->BSIM3v1SpdwbGiven) + model->BSIM3v1Spdwb = 0.0; + if (!model->BSIM3v1Spb0Given) + model->BSIM3v1Spb0 = 0.0; + if (!model->BSIM3v1Spb1Given) + model->BSIM3v1Spb1 = 0.0; + if (!model->BSIM3v1Spalpha0Given) + model->BSIM3v1Spalpha0 = 0.0; + if (!model->BSIM3v1Spbeta0Given) + model->BSIM3v1Spbeta0 = 0.0; + + if (!model->BSIM3v1SpelmGiven) + model->BSIM3v1Spelm = 0.0; + if (!model->BSIM3v1SpcgslGiven) + model->BSIM3v1Spcgsl = 0.0; + if (!model->BSIM3v1SpcgdlGiven) + model->BSIM3v1Spcgdl = 0.0; + if (!model->BSIM3v1SpckappaGiven) + model->BSIM3v1Spckappa = 0.0; + if (!model->BSIM3v1SpcfGiven) + model->BSIM3v1Spcf = 0.0; + if (!model->BSIM3v1SpclcGiven) + model->BSIM3v1Spclc = 0.0; + if (!model->BSIM3v1SpcleGiven) + model->BSIM3v1Spcle = 0.0; + if (!model->BSIM3v1SpvfbcvGiven) + model->BSIM3v1Spvfbcv = 0.0; + + /* unit degree celcius */ + if (!model->BSIM3v1StnomGiven) + model->BSIM3v1Stnom = ckt->CKTnomTemp; + if (!model->BSIM3v1SLintGiven) + model->BSIM3v1SLint = 0.0; + if (!model->BSIM3v1SLlGiven) + model->BSIM3v1SLl = 0.0; + if (!model->BSIM3v1SLlnGiven) + model->BSIM3v1SLln = 1.0; + if (!model->BSIM3v1SLwGiven) + model->BSIM3v1SLw = 0.0; + if (!model->BSIM3v1SLwnGiven) + model->BSIM3v1SLwn = 1.0; + if (!model->BSIM3v1SLwlGiven) + model->BSIM3v1SLwl = 0.0; + if (!model->BSIM3v1SLminGiven) + model->BSIM3v1SLmin = 0.0; + if (!model->BSIM3v1SLmaxGiven) + model->BSIM3v1SLmax = 1.0; + if (!model->BSIM3v1SWintGiven) + model->BSIM3v1SWint = 0.0; + if (!model->BSIM3v1SWlGiven) + model->BSIM3v1SWl = 0.0; + if (!model->BSIM3v1SWlnGiven) + model->BSIM3v1SWln = 1.0; + if (!model->BSIM3v1SWwGiven) + model->BSIM3v1SWw = 0.0; + if (!model->BSIM3v1SWwnGiven) + model->BSIM3v1SWwn = 1.0; + if (!model->BSIM3v1SWwlGiven) + model->BSIM3v1SWwl = 0.0; + if (!model->BSIM3v1SWminGiven) + model->BSIM3v1SWmin = 0.0; + if (!model->BSIM3v1SWmaxGiven) + model->BSIM3v1SWmax = 1.0; + if (!model->BSIM3v1SdwcGiven) + model->BSIM3v1Sdwc = model->BSIM3v1SWint; + if (!model->BSIM3v1SdlcGiven) + model->BSIM3v1Sdlc = model->BSIM3v1SLint; + if (!model->BSIM3v1ScfGiven) + model->BSIM3v1Scf = 2.0 * EPSOX / PI + * log(1.0 + 0.4e-6 / model->BSIM3v1Stox); + if (!model->BSIM3v1ScgdoGiven) + { if (model->BSIM3v1SdlcGiven && (model->BSIM3v1Sdlc > 0.0)) + { model->BSIM3v1Scgdo = model->BSIM3v1Sdlc * model->BSIM3v1Scox + - model->BSIM3v1Scgdl ; + } + else + model->BSIM3v1Scgdo = 0.6 * model->BSIM3v1Sxj * model->BSIM3v1Scox; + } + if (!model->BSIM3v1ScgsoGiven) + { if (model->BSIM3v1SdlcGiven && (model->BSIM3v1Sdlc > 0.0)) + { model->BSIM3v1Scgso = model->BSIM3v1Sdlc * model->BSIM3v1Scox + - model->BSIM3v1Scgsl ; + } + else + model->BSIM3v1Scgso = 0.6 * model->BSIM3v1Sxj * model->BSIM3v1Scox; + } + + if (!model->BSIM3v1ScgboGiven) + { model->BSIM3v1Scgbo = 2.0 * model->BSIM3v1Sdwc * model->BSIM3v1Scox; + } + if (!model->BSIM3v1SxpartGiven) + model->BSIM3v1Sxpart = 0.0; + if (!model->BSIM3v1SsheetResistanceGiven) + model->BSIM3v1SsheetResistance = 0.0; + if (!model->BSIM3v1SunitAreaJctCapGiven) + model->BSIM3v1SunitAreaJctCap = 5.0E-4; + if (!model->BSIM3v1SunitLengthSidewallJctCapGiven) + model->BSIM3v1SunitLengthSidewallJctCap = 5.0E-10; + if (!model->BSIM3v1SunitLengthGateSidewallJctCapGiven) + model->BSIM3v1SunitLengthGateSidewallJctCap = model->BSIM3v1SunitLengthSidewallJctCap ; + if (!model->BSIM3v1SjctSatCurDensityGiven) + model->BSIM3v1SjctSatCurDensity = 1.0E-4; + if (!model->BSIM3v1SjctSidewallSatCurDensityGiven) + model->BSIM3v1SjctSidewallSatCurDensity = 0.0; + if (!model->BSIM3v1SbulkJctPotentialGiven) + model->BSIM3v1SbulkJctPotential = 1.0; + if (!model->BSIM3v1SsidewallJctPotentialGiven) + model->BSIM3v1SsidewallJctPotential = 1.0; + if (!model->BSIM3v1SGatesidewallJctPotentialGiven) + model->BSIM3v1SGatesidewallJctPotential = model->BSIM3v1SsidewallJctPotential; + if (!model->BSIM3v1SbulkJctBotGradingCoeffGiven) + model->BSIM3v1SbulkJctBotGradingCoeff = 0.5; + if (!model->BSIM3v1SbulkJctSideGradingCoeffGiven) + model->BSIM3v1SbulkJctSideGradingCoeff = 0.33; + if (!model->BSIM3v1SbulkJctGateSideGradingCoeffGiven) + model->BSIM3v1SbulkJctGateSideGradingCoeff = model->BSIM3v1SbulkJctSideGradingCoeff; + if (!model->BSIM3v1SjctEmissionCoeffGiven) + model->BSIM3v1SjctEmissionCoeff = 1.0; + if (!model->BSIM3v1SjctTempExponentGiven) + model->BSIM3v1SjctTempExponent = 3.0; + if (!model->BSIM3v1SoxideTrapDensityAGiven) + if (!model->BSIM3v1SoxideTrapDensityAGiven) + { if (model->BSIM3v1Stype == NMOS) + model->BSIM3v1SoxideTrapDensityA = 1e20; + else + model->BSIM3v1SoxideTrapDensityA=9.9e18; + } + if (!model->BSIM3v1SoxideTrapDensityBGiven) + { if (model->BSIM3v1Stype == NMOS) + model->BSIM3v1SoxideTrapDensityB = 5e4; + else + model->BSIM3v1SoxideTrapDensityB = 2.4e3; + } + if (!model->BSIM3v1SoxideTrapDensityCGiven) + { if (model->BSIM3v1Stype == NMOS) + model->BSIM3v1SoxideTrapDensityC = -1.4e-12; + else + model->BSIM3v1SoxideTrapDensityC = 1.4e-12; + + } + if (!model->BSIM3v1SemGiven) + model->BSIM3v1Sem = 4.1e7; /* V/m */ + if (!model->BSIM3v1SefGiven) + model->BSIM3v1Sef = 1.0; + if (!model->BSIM3v1SafGiven) + model->BSIM3v1Saf = 1.0; + if (!model->BSIM3v1SkfGiven) + model->BSIM3v1Skf = 0.0; + /* loop through all the instances of the model */ + for (here = model->BSIM3v1Sinstances; here != NULL ; + here=here->BSIM3v1SnextInstance) + + { + if (here->BSIM3v1Sowner == ARCHme) { + /* allocate a chunk of the state vector */ + here->BSIM3v1Sstates = *states; + *states += BSIM3v1SnumStates; + } + + /* perform the parameter defaulting */ + if(here->BSIM3v1Sm == 0.0) + here->BSIM3v1Sm = 1.0; + fprintf(stderr, "M = %.2f\n", here->BSIM3v1Sm); + if (!here->BSIM3v1SwGiven) + here->BSIM3v1Sw = 5e-6; + here->BSIM3v1Sw *= here->BSIM3v1Sm; + + if (!here->BSIM3v1SdrainAreaGiven) + { + if(model->BSIM3v1ShdifGiven) + here->BSIM3v1SdrainArea = here->BSIM3v1Sw * 2 * model->BSIM3v1Shdif; + else + here->BSIM3v1SdrainArea = 0.0; + } + here->BSIM3v1SdrainArea *= here->BSIM3v1Sm; + if (!here->BSIM3v1SdrainPerimeterGiven) + { + if(model->BSIM3v1ShdifGiven) + here->BSIM3v1SdrainPerimeter = + 2 * here->BSIM3v1Sw + 4 * model->BSIM3v1Shdif; + else + here->BSIM3v1SdrainPerimeter = 0.0; + } + here->BSIM3v1SdrainPerimeter *= here->BSIM3v1Sm; + + if (!here->BSIM3v1SdrainSquaresGiven) + here->BSIM3v1SdrainSquares = 1.0; + here->BSIM3v1SdrainSquares /= here->BSIM3v1Sm; + + if (!here->BSIM3v1SicVBSGiven) + here->BSIM3v1SicVBS = 0; + if (!here->BSIM3v1SicVDSGiven) + here->BSIM3v1SicVDS = 0; + if (!here->BSIM3v1SicVGSGiven) + here->BSIM3v1SicVGS = 0; + if (!here->BSIM3v1SlGiven) + here->BSIM3v1Sl = 5e-6; + if (!here->BSIM3v1SsourceAreaGiven) + { + if(model->BSIM3v1ShdifGiven) + here->BSIM3v1SsourceArea = here->BSIM3v1Sw * 2 * model->BSIM3v1Shdif; + else + here->BSIM3v1SsourceArea = 0.0; + } + here->BSIM3v1SsourceArea *= here->BSIM3v1Sm; + + if (!here->BSIM3v1SsourcePerimeterGiven) + { + if(model->BSIM3v1ShdifGiven) + here->BSIM3v1SsourcePerimeter = + 2 * here->BSIM3v1Sw + 4 * model->BSIM3v1Shdif; + else + here->BSIM3v1SsourcePerimeter = 0.0; + } + here->BSIM3v1SsourcePerimeter *= here->BSIM3v1Sm; + + if (!here->BSIM3v1SsourceSquaresGiven) + here->BSIM3v1SsourceSquares = 1.0; + here->BSIM3v1SsourceSquares /= here->BSIM3v1Sm; + + if (!here->BSIM3v1SnqsModGiven) + here->BSIM3v1SnqsMod = model->BSIM3v1SnqsMod; + + /* process drain series resistance */ + if ((model->BSIM3v1SsheetResistance > 0.0) && + (here->BSIM3v1SdrainSquares > 0.0 ) && + (here->BSIM3v1SdNodePrime == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM3v1Sname,"drain"); + if(error) return(error); + here->BSIM3v1SdNodePrime = tmp->number; + + if (ckt->CKTcopyNodesets) { + if (CKTinst2Node(ckt,here,1,&tmpNode,&tmpName)==OK) { + if (tmpNode->nsGiven) { + tmp->nodeset=tmpNode->nodeset; + tmp->nsGiven=tmpNode->nsGiven; + } + } + } + + } + else + { here->BSIM3v1SdNodePrime = here->BSIM3v1SdNode; + } + + /* process source series resistance */ + if ((model->BSIM3v1SsheetResistance > 0.0) && + (here->BSIM3v1SsourceSquares > 0.0 ) && + (here->BSIM3v1SsNodePrime == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM3v1Sname,"source"); + if(error) return(error); + here->BSIM3v1SsNodePrime = tmp->number; + + if (ckt->CKTcopyNodesets) { + if (CKTinst2Node(ckt,here,3,&tmpNode,&tmpName)==OK) { + if (tmpNode->nsGiven) { + tmp->nodeset=tmpNode->nodeset; + tmp->nsGiven=tmpNode->nsGiven; + } + } + } + + } + else + { here->BSIM3v1SsNodePrime = here->BSIM3v1SsNode; + } + + /* internal charge node */ + + if ((here->BSIM3v1SnqsMod) && (here->BSIM3v1SqNode == 0)) + { error = CKTmkVolt(ckt,&tmp,here->BSIM3v1Sname,"charge"); + if(error) return(error); + here->BSIM3v1SqNode = tmp->number; + } + else + { here->BSIM3v1SqNode = 0; + } + + /* set Sparse Matrix Pointers */ + +/* macro to make elements with built in test for out of memory */ +#define TSTALLOC(ptr,first,second) \ +if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NULL){\ + return(E_NOMEM);\ +} + + TSTALLOC(BSIM3v1SDdPtr, BSIM3v1SdNode, BSIM3v1SdNode) + TSTALLOC(BSIM3v1SGgPtr, BSIM3v1SgNode, BSIM3v1SgNode) + TSTALLOC(BSIM3v1SSsPtr, BSIM3v1SsNode, BSIM3v1SsNode) + TSTALLOC(BSIM3v1SBbPtr, BSIM3v1SbNode, BSIM3v1SbNode) + TSTALLOC(BSIM3v1SDPdpPtr, BSIM3v1SdNodePrime, BSIM3v1SdNodePrime) + TSTALLOC(BSIM3v1SSPspPtr, BSIM3v1SsNodePrime, BSIM3v1SsNodePrime) + TSTALLOC(BSIM3v1SDdpPtr, BSIM3v1SdNode, BSIM3v1SdNodePrime) + TSTALLOC(BSIM3v1SGbPtr, BSIM3v1SgNode, BSIM3v1SbNode) + TSTALLOC(BSIM3v1SGdpPtr, BSIM3v1SgNode, BSIM3v1SdNodePrime) + TSTALLOC(BSIM3v1SGspPtr, BSIM3v1SgNode, BSIM3v1SsNodePrime) + TSTALLOC(BSIM3v1SSspPtr, BSIM3v1SsNode, BSIM3v1SsNodePrime) + TSTALLOC(BSIM3v1SBdpPtr, BSIM3v1SbNode, BSIM3v1SdNodePrime) + TSTALLOC(BSIM3v1SBspPtr, BSIM3v1SbNode, BSIM3v1SsNodePrime) + TSTALLOC(BSIM3v1SDPspPtr, BSIM3v1SdNodePrime, BSIM3v1SsNodePrime) + TSTALLOC(BSIM3v1SDPdPtr, BSIM3v1SdNodePrime, BSIM3v1SdNode) + TSTALLOC(BSIM3v1SBgPtr, BSIM3v1SbNode, BSIM3v1SgNode) + TSTALLOC(BSIM3v1SDPgPtr, BSIM3v1SdNodePrime, BSIM3v1SgNode) + TSTALLOC(BSIM3v1SSPgPtr, BSIM3v1SsNodePrime, BSIM3v1SgNode) + TSTALLOC(BSIM3v1SSPsPtr, BSIM3v1SsNodePrime, BSIM3v1SsNode) + TSTALLOC(BSIM3v1SDPbPtr, BSIM3v1SdNodePrime, BSIM3v1SbNode) + TSTALLOC(BSIM3v1SSPbPtr, BSIM3v1SsNodePrime, BSIM3v1SbNode) + TSTALLOC(BSIM3v1SSPdpPtr, BSIM3v1SsNodePrime, BSIM3v1SdNodePrime) + + TSTALLOC(BSIM3v1SQqPtr, BSIM3v1SqNode, BSIM3v1SqNode) + + TSTALLOC(BSIM3v1SQdpPtr, BSIM3v1SqNode, BSIM3v1SdNodePrime) + TSTALLOC(BSIM3v1SQspPtr, BSIM3v1SqNode, BSIM3v1SsNodePrime) + TSTALLOC(BSIM3v1SQgPtr, BSIM3v1SqNode, BSIM3v1SgNode) + TSTALLOC(BSIM3v1SQbPtr, BSIM3v1SqNode, BSIM3v1SbNode) + TSTALLOC(BSIM3v1SDPqPtr, BSIM3v1SdNodePrime, BSIM3v1SqNode) + TSTALLOC(BSIM3v1SSPqPtr, BSIM3v1SsNodePrime, BSIM3v1SqNode) + TSTALLOC(BSIM3v1SGqPtr, BSIM3v1SgNode, BSIM3v1SqNode) + TSTALLOC(BSIM3v1SBqPtr, BSIM3v1SbNode, BSIM3v1SqNode) + + } + } + return(OK); +} + + +int +BSIM3v1Sunsetup(GENmodel *inModel, CKTcircuit *ckt) +{ + BSIM3v1Smodel *model; + BSIM3v1Sinstance *here; + + for (model = (BSIM3v1Smodel *)inModel; model != NULL; + model = model->BSIM3v1SnextModel) + { + for (here = model->BSIM3v1Sinstances; here != NULL; + here=here->BSIM3v1SnextInstance) + { + if (here->BSIM3v1SdNodePrime + && here->BSIM3v1SdNodePrime != here->BSIM3v1SdNode) + { + CKTdltNNum(ckt, here->BSIM3v1SdNodePrime); + here->BSIM3v1SdNodePrime = 0; + } + if (here->BSIM3v1SsNodePrime + && here->BSIM3v1SsNodePrime != here->BSIM3v1SsNode) + { + CKTdltNNum(ckt, here->BSIM3v1SsNodePrime); + here->BSIM3v1SsNodePrime = 0; + } + } + } + return OK; +} + + + diff --git a/src/spicelib/devices/bsim3v1s/b3v1stemp.c b/src/spicelib/devices/bsim3v1s/b3v1stemp.c new file mode 100644 index 000000000..fd66038db --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1stemp.c @@ -0,0 +1,670 @@ +/*********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1stemp.c +**********/ +/* Lmin, Lmax, Wmin, Wmax */ + +#include "ngspice.h" +#include "smpdefs.h" +#include "cktdefs.h" +#include "bsim3v1sdef.h" +#include "const.h" +#include "sperror.h" +#include "suffix.h" + +#define Kb 1.3806226e-23 +#define KboQ 8.617087e-5 /* Kb / q where q = 1.60219e-19 */ +#define EPSOX 3.453133e-11 +#define EPSSI 1.03594e-10 +#define PI 3.141592654 +#define MAX_EXP 5.834617425e14 +#define MIN_EXP 1.713908431e-15 +#define EXP_THRESHOLD 34.0 +#define Charge_q 1.60219e-19 + + +/* ARGSUSED */ +int +BSIM3v1Stemp(GENmodel *inModel, CKTcircuit *ckt) +{ +BSIM3v1Smodel *model = (BSIM3v1Smodel*) inModel; +BSIM3v1Sinstance *here; +struct bsim3v1sSizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam; +double tmp1, tmp2, Eg, Eg0, ni, T0, T1, T2, T3, Ldrn, Wdrn; +double Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom; +int Size_Not_Found; + + /* loop through all the BSIM3v1S device models */ + for (; model != NULL; model = model->BSIM3v1SnextModel) + { Temp = ckt->CKTtemp; + if (model->BSIM3v1SbulkJctPotential < 0.1) + model->BSIM3v1SbulkJctPotential = 0.1; + if (model->BSIM3v1SsidewallJctPotential < 0.1) + model->BSIM3v1SsidewallJctPotential = 0.1; + if (model->BSIM3v1SGatesidewallJctPotential < 0.1) + model->BSIM3v1SGatesidewallJctPotential = 0.1; + model->pSizeDependParamKnot = NULL; + pLastKnot = NULL; + + Tnom = model->BSIM3v1Stnom; + TRatio = Temp / Tnom; + + model->BSIM3v1Svcrit = CONSTvt0 * log(CONSTvt0 / (CONSTroot2 * 1.0e-14)); + model->BSIM3v1Sfactor1 = sqrt(EPSSI / EPSOX * model->BSIM3v1Stox); + + Vtm0 = KboQ * Tnom; + Eg0 = 1.16 - 7.02e-4 * Tnom * Tnom / (Tnom + 1108.0); + ni = 1.45e10 * (Tnom / 300.15) * sqrt(Tnom / 300.15) + * exp(21.5565981 - Eg0 / (2.0 * Vtm0)); + + model->BSIM3v1Svtm = KboQ * Temp; + Eg = 1.16 - 7.02e-4 * Temp * Temp / (Temp + 1108.0); + if (Temp != Tnom) + { T0 = Eg0 / Vtm0 - Eg / model->BSIM3v1Svtm + model->BSIM3v1SjctTempExponent + * log(Temp / Tnom); + T1 = exp(T0 / model->BSIM3v1SjctEmissionCoeff); + model->BSIM3v1SjctTempSatCurDensity = model->BSIM3v1SjctSatCurDensity + * T1; + model->BSIM3v1SjctSidewallTempSatCurDensity + = model->BSIM3v1SjctSidewallSatCurDensity * T1; + } + else + { model->BSIM3v1SjctTempSatCurDensity = model->BSIM3v1SjctSatCurDensity; + model->BSIM3v1SjctSidewallTempSatCurDensity + = model->BSIM3v1SjctSidewallSatCurDensity; + } + + if (model->BSIM3v1SjctTempSatCurDensity < 0.0) + model->BSIM3v1SjctTempSatCurDensity = 0.0; + if (model->BSIM3v1SjctSidewallTempSatCurDensity < 0.0) + model->BSIM3v1SjctSidewallTempSatCurDensity = 0.0; + + /* loop through all the instances of the model */ + /* MCJ: Length and Width not initialized */ + for (here = model->BSIM3v1Sinstances; here != NULL; + here = here->BSIM3v1SnextInstance) + { + + if (here->BSIM3v1Sowner != ARCHme) + continue; + + pSizeDependParamKnot = model->pSizeDependParamKnot; + Size_Not_Found = 1; + while ((pSizeDependParamKnot != NULL) && Size_Not_Found) + { if ((here->BSIM3v1Sl == pSizeDependParamKnot->Length) + && (here->BSIM3v1Sw == pSizeDependParamKnot->Width)) + { Size_Not_Found = 0; + here->pParam = pSizeDependParamKnot; + } + else + { pLastKnot = pSizeDependParamKnot; + pSizeDependParamKnot = pSizeDependParamKnot->pNext; + } + } + + if (Size_Not_Found) + { pParam = (struct bsim3v1sSizeDependParam *)tmalloc( + sizeof(struct bsim3v1sSizeDependParam)); + if (pLastKnot == NULL) + model->pSizeDependParamKnot = pParam; + else + pLastKnot->pNext = pParam; + pParam->pNext = NULL; + here->pParam = pParam; + + Ldrn = here->BSIM3v1Sl; + Wdrn = here->BSIM3v1Sw; + pParam->Length = Ldrn; + pParam->Width = Wdrn; + + T0 = pow(Ldrn, model->BSIM3v1SLln); + T1 = pow(Wdrn, model->BSIM3v1SLwn); + tmp1 = model->BSIM3v1SLl / T0 + model->BSIM3v1SLw / T1 + + model->BSIM3v1SLwl / (T0 * T1); + pParam->BSIM3v1Sdl = model->BSIM3v1SLint + tmp1; + pParam->BSIM3v1Sdlc = model->BSIM3v1Sdlc + tmp1; + + T2 = pow(Ldrn, model->BSIM3v1SWln); + T3 = pow(Wdrn, model->BSIM3v1SWwn); + tmp2 = model->BSIM3v1SWl / T2 + model->BSIM3v1SWw / T3 + + model->BSIM3v1SWwl / (T2 * T3); + pParam->BSIM3v1Sdw = model->BSIM3v1SWint + tmp2; + pParam->BSIM3v1Sdwc = model->BSIM3v1Sdwc + tmp2; + + pParam->BSIM3v1Sleff = here->BSIM3v1Sl - 2.0 * pParam->BSIM3v1Sdl; + if (pParam->BSIM3v1Sleff <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v1SmodName; + namarray[1] = here->BSIM3v1Sname; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM3v1S: mosfet %s, model %s: Effective channel length <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM3v1Sweff = here->BSIM3v1Sw - 2.0 * pParam->BSIM3v1Sdw; + if (pParam->BSIM3v1Sweff <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v1SmodName; + namarray[1] = here->BSIM3v1Sname; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM3v1S: mosfet %s, model %s: Effective channel width <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM3v1SleffCV = here->BSIM3v1Sl - 2.0 * pParam->BSIM3v1Sdlc; + if (pParam->BSIM3v1SleffCV <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v1SmodName; + namarray[1] = here->BSIM3v1Sname; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM3v1S: mosfet %s, model %s: Effective channel length for C-V <= 0", + namarray); + return(E_BADPARM); + } + + pParam->BSIM3v1SweffCV = here->BSIM3v1Sw - 2.0 * pParam->BSIM3v1Sdwc; + if (pParam->BSIM3v1SweffCV <= 0.0) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v1SmodName; + namarray[1] = here->BSIM3v1Sname; + (*(SPfrontEnd->IFerror))(ERR_FATAL, + "BSIM3v1S: mosfet %s, model %s: Effective channel width for C-V <= 0", + namarray); + return(E_BADPARM); + } + + + if (model->BSIM3v1SbinUnit == 1) + { Inv_L = 1.0e-6 / pParam->BSIM3v1Sleff; + Inv_W = 1.0e-6 / pParam->BSIM3v1Sweff; + Inv_LW = 1.0e-12 / (pParam->BSIM3v1Sleff + * pParam->BSIM3v1Sweff); + } + else + { Inv_L = 1.0 / pParam->BSIM3v1Sleff; + Inv_W = 1.0 / pParam->BSIM3v1Sweff; + Inv_LW = 1.0 / (pParam->BSIM3v1Sleff + * pParam->BSIM3v1Sweff); + } + pParam->BSIM3v1Scdsc = model->BSIM3v1Scdsc + + model->BSIM3v1Slcdsc * Inv_L + + model->BSIM3v1Swcdsc * Inv_W + + model->BSIM3v1Spcdsc * Inv_LW; + pParam->BSIM3v1Scdscb = model->BSIM3v1Scdscb + + model->BSIM3v1Slcdscb * Inv_L + + model->BSIM3v1Swcdscb * Inv_W + + model->BSIM3v1Spcdscb * Inv_LW; + + pParam->BSIM3v1Scdscd = model->BSIM3v1Scdscd + + model->BSIM3v1Slcdscd * Inv_L + + model->BSIM3v1Swcdscd * Inv_W + + model->BSIM3v1Spcdscd * Inv_LW; + + pParam->BSIM3v1Scit = model->BSIM3v1Scit + + model->BSIM3v1Slcit * Inv_L + + model->BSIM3v1Swcit * Inv_W + + model->BSIM3v1Spcit * Inv_LW; + pParam->BSIM3v1Snfactor = model->BSIM3v1Snfactor + + model->BSIM3v1Slnfactor * Inv_L + + model->BSIM3v1Swnfactor * Inv_W + + model->BSIM3v1Spnfactor * Inv_LW; + pParam->BSIM3v1Sxj = model->BSIM3v1Sxj + + model->BSIM3v1Slxj * Inv_L + + model->BSIM3v1Swxj * Inv_W + + model->BSIM3v1Spxj * Inv_LW; + pParam->BSIM3v1Svsat = model->BSIM3v1Svsat + + model->BSIM3v1Slvsat * Inv_L + + model->BSIM3v1Swvsat * Inv_W + + model->BSIM3v1Spvsat * Inv_LW; + pParam->BSIM3v1Sat = model->BSIM3v1Sat + + model->BSIM3v1Slat * Inv_L + + model->BSIM3v1Swat * Inv_W + + model->BSIM3v1Spat * Inv_LW; + pParam->BSIM3v1Sa0 = model->BSIM3v1Sa0 + + model->BSIM3v1Sla0 * Inv_L + + model->BSIM3v1Swa0 * Inv_W + + model->BSIM3v1Spa0 * Inv_LW; + + pParam->BSIM3v1Sags = model->BSIM3v1Sags + + model->BSIM3v1Slags * Inv_L + + model->BSIM3v1Swags * Inv_W + + model->BSIM3v1Spags * Inv_LW; + + pParam->BSIM3v1Sa1 = model->BSIM3v1Sa1 + + model->BSIM3v1Sla1 * Inv_L + + model->BSIM3v1Swa1 * Inv_W + + model->BSIM3v1Spa1 * Inv_LW; + pParam->BSIM3v1Sa2 = model->BSIM3v1Sa2 + + model->BSIM3v1Sla2 * Inv_L + + model->BSIM3v1Swa2 * Inv_W + + model->BSIM3v1Spa2 * Inv_LW; + pParam->BSIM3v1Sketa = model->BSIM3v1Sketa + + model->BSIM3v1Slketa * Inv_L + + model->BSIM3v1Swketa * Inv_W + + model->BSIM3v1Spketa * Inv_LW; + pParam->BSIM3v1Snsub = model->BSIM3v1Snsub + + model->BSIM3v1Slnsub * Inv_L + + model->BSIM3v1Swnsub * Inv_W + + model->BSIM3v1Spnsub * Inv_LW; + pParam->BSIM3v1Snpeak = model->BSIM3v1Snpeak + + model->BSIM3v1Slnpeak * Inv_L + + model->BSIM3v1Swnpeak * Inv_W + + model->BSIM3v1Spnpeak * Inv_LW; + pParam->BSIM3v1Sngate = model->BSIM3v1Sngate + + model->BSIM3v1Slngate * Inv_L + + model->BSIM3v1Swngate * Inv_W + + model->BSIM3v1Spngate * Inv_LW; + pParam->BSIM3v1Sgamma1 = model->BSIM3v1Sgamma1 + + model->BSIM3v1Slgamma1 * Inv_L + + model->BSIM3v1Swgamma1 * Inv_W + + model->BSIM3v1Spgamma1 * Inv_LW; + pParam->BSIM3v1Sgamma2 = model->BSIM3v1Sgamma2 + + model->BSIM3v1Slgamma2 * Inv_L + + model->BSIM3v1Swgamma2 * Inv_W + + model->BSIM3v1Spgamma2 * Inv_LW; + pParam->BSIM3v1Svbx = model->BSIM3v1Svbx + + model->BSIM3v1Slvbx * Inv_L + + model->BSIM3v1Swvbx * Inv_W + + model->BSIM3v1Spvbx * Inv_LW; + pParam->BSIM3v1Svbm = model->BSIM3v1Svbm + + model->BSIM3v1Slvbm * Inv_L + + model->BSIM3v1Swvbm * Inv_W + + model->BSIM3v1Spvbm * Inv_LW; + pParam->BSIM3v1Sxt = model->BSIM3v1Sxt + + model->BSIM3v1Slxt * Inv_L + + model->BSIM3v1Swxt * Inv_W + + model->BSIM3v1Spxt * Inv_LW; + pParam->BSIM3v1Sk1 = model->BSIM3v1Sk1 + + model->BSIM3v1Slk1 * Inv_L + + model->BSIM3v1Swk1 * Inv_W + + model->BSIM3v1Spk1 * Inv_LW; + pParam->BSIM3v1Skt1 = model->BSIM3v1Skt1 + + model->BSIM3v1Slkt1 * Inv_L + + model->BSIM3v1Swkt1 * Inv_W + + model->BSIM3v1Spkt1 * Inv_LW; + pParam->BSIM3v1Skt1l = model->BSIM3v1Skt1l + + model->BSIM3v1Slkt1l * Inv_L + + model->BSIM3v1Swkt1l * Inv_W + + model->BSIM3v1Spkt1l * Inv_LW; + pParam->BSIM3v1Sk2 = model->BSIM3v1Sk2 + + model->BSIM3v1Slk2 * Inv_L + + model->BSIM3v1Swk2 * Inv_W + + model->BSIM3v1Spk2 * Inv_LW; + pParam->BSIM3v1Skt2 = model->BSIM3v1Skt2 + + model->BSIM3v1Slkt2 * Inv_L + + model->BSIM3v1Swkt2 * Inv_W + + model->BSIM3v1Spkt2 * Inv_LW; + pParam->BSIM3v1Sk3 = model->BSIM3v1Sk3 + + model->BSIM3v1Slk3 * Inv_L + + model->BSIM3v1Swk3 * Inv_W + + model->BSIM3v1Spk3 * Inv_LW; + pParam->BSIM3v1Sk3b = model->BSIM3v1Sk3b + + model->BSIM3v1Slk3b * Inv_L + + model->BSIM3v1Swk3b * Inv_W + + model->BSIM3v1Spk3b * Inv_LW; + pParam->BSIM3v1Sw0 = model->BSIM3v1Sw0 + + model->BSIM3v1Slw0 * Inv_L + + model->BSIM3v1Sww0 * Inv_W + + model->BSIM3v1Spw0 * Inv_LW; + pParam->BSIM3v1Snlx = model->BSIM3v1Snlx + + model->BSIM3v1Slnlx * Inv_L + + model->BSIM3v1Swnlx * Inv_W + + model->BSIM3v1Spnlx * Inv_LW; + pParam->BSIM3v1Sdvt0 = model->BSIM3v1Sdvt0 + + model->BSIM3v1Sldvt0 * Inv_L + + model->BSIM3v1Swdvt0 * Inv_W + + model->BSIM3v1Spdvt0 * Inv_LW; + pParam->BSIM3v1Sdvt1 = model->BSIM3v1Sdvt1 + + model->BSIM3v1Sldvt1 * Inv_L + + model->BSIM3v1Swdvt1 * Inv_W + + model->BSIM3v1Spdvt1 * Inv_LW; + pParam->BSIM3v1Sdvt2 = model->BSIM3v1Sdvt2 + + model->BSIM3v1Sldvt2 * Inv_L + + model->BSIM3v1Swdvt2 * Inv_W + + model->BSIM3v1Spdvt2 * Inv_LW; + pParam->BSIM3v1Sdvt0w = model->BSIM3v1Sdvt0w + + model->BSIM3v1Sldvt0w * Inv_L + + model->BSIM3v1Swdvt0w * Inv_W + + model->BSIM3v1Spdvt0w * Inv_LW; + pParam->BSIM3v1Sdvt1w = model->BSIM3v1Sdvt1w + + model->BSIM3v1Sldvt1w * Inv_L + + model->BSIM3v1Swdvt1w * Inv_W + + model->BSIM3v1Spdvt1w * Inv_LW; + pParam->BSIM3v1Sdvt2w = model->BSIM3v1Sdvt2w + + model->BSIM3v1Sldvt2w * Inv_L + + model->BSIM3v1Swdvt2w * Inv_W + + model->BSIM3v1Spdvt2w * Inv_LW; + pParam->BSIM3v1Sdrout = model->BSIM3v1Sdrout + + model->BSIM3v1Sldrout * Inv_L + + model->BSIM3v1Swdrout * Inv_W + + model->BSIM3v1Spdrout * Inv_LW; + pParam->BSIM3v1Sdsub = model->BSIM3v1Sdsub + + model->BSIM3v1Sldsub * Inv_L + + model->BSIM3v1Swdsub * Inv_W + + model->BSIM3v1Spdsub * Inv_LW; + pParam->BSIM3v1Svth0 = model->BSIM3v1Svth0 + + model->BSIM3v1Slvth0 * Inv_L + + model->BSIM3v1Swvth0 * Inv_W + + model->BSIM3v1Spvth0 * Inv_LW; + pParam->BSIM3v1Sua = model->BSIM3v1Sua + + model->BSIM3v1Slua * Inv_L + + model->BSIM3v1Swua * Inv_W + + model->BSIM3v1Spua * Inv_LW; + pParam->BSIM3v1Sua1 = model->BSIM3v1Sua1 + + model->BSIM3v1Slua1 * Inv_L + + model->BSIM3v1Swua1 * Inv_W + + model->BSIM3v1Spua1 * Inv_LW; + pParam->BSIM3v1Sub = model->BSIM3v1Sub + + model->BSIM3v1Slub * Inv_L + + model->BSIM3v1Swub * Inv_W + + model->BSIM3v1Spub * Inv_LW; + pParam->BSIM3v1Sub1 = model->BSIM3v1Sub1 + + model->BSIM3v1Slub1 * Inv_L + + model->BSIM3v1Swub1 * Inv_W + + model->BSIM3v1Spub1 * Inv_LW; + pParam->BSIM3v1Suc = model->BSIM3v1Suc + + model->BSIM3v1Sluc * Inv_L + + model->BSIM3v1Swuc * Inv_W + + model->BSIM3v1Spuc * Inv_LW; + pParam->BSIM3v1Suc1 = model->BSIM3v1Suc1 + + model->BSIM3v1Sluc1 * Inv_L + + model->BSIM3v1Swuc1 * Inv_W + + model->BSIM3v1Spuc1 * Inv_LW; + pParam->BSIM3v1Su0 = model->BSIM3v1Su0 + + model->BSIM3v1Slu0 * Inv_L + + model->BSIM3v1Swu0 * Inv_W + + model->BSIM3v1Spu0 * Inv_LW; + pParam->BSIM3v1Sute = model->BSIM3v1Sute + + model->BSIM3v1Slute * Inv_L + + model->BSIM3v1Swute * Inv_W + + model->BSIM3v1Spute * Inv_LW; + pParam->BSIM3v1Svoff = model->BSIM3v1Svoff + + model->BSIM3v1Slvoff * Inv_L + + model->BSIM3v1Swvoff * Inv_W + + model->BSIM3v1Spvoff * Inv_LW; + pParam->BSIM3v1Sdelta = model->BSIM3v1Sdelta + + model->BSIM3v1Sldelta * Inv_L + + model->BSIM3v1Swdelta * Inv_W + + model->BSIM3v1Spdelta * Inv_LW; + pParam->BSIM3v1Srdsw = model->BSIM3v1Srdsw + + model->BSIM3v1Slrdsw * Inv_L + + model->BSIM3v1Swrdsw * Inv_W + + model->BSIM3v1Sprdsw * Inv_LW; + pParam->BSIM3v1Sprwg = model->BSIM3v1Sprwg + + model->BSIM3v1Slprwg * Inv_L + + model->BSIM3v1Swprwg * Inv_W + + model->BSIM3v1Spprwg * Inv_LW; + pParam->BSIM3v1Sprwb = model->BSIM3v1Sprwb + + model->BSIM3v1Slprwb * Inv_L + + model->BSIM3v1Swprwb * Inv_W + + model->BSIM3v1Spprwb * Inv_LW; + pParam->BSIM3v1Sprt = model->BSIM3v1Sprt + + model->BSIM3v1Slprt * Inv_L + + model->BSIM3v1Swprt * Inv_W + + model->BSIM3v1Spprt * Inv_LW; + pParam->BSIM3v1Seta0 = model->BSIM3v1Seta0 + + model->BSIM3v1Sleta0 * Inv_L + + model->BSIM3v1Sweta0 * Inv_W + + model->BSIM3v1Speta0 * Inv_LW; + pParam->BSIM3v1Setab = model->BSIM3v1Setab + + model->BSIM3v1Sletab * Inv_L + + model->BSIM3v1Swetab * Inv_W + + model->BSIM3v1Spetab * Inv_LW; + pParam->BSIM3v1Spclm = model->BSIM3v1Spclm + + model->BSIM3v1Slpclm * Inv_L + + model->BSIM3v1Swpclm * Inv_W + + model->BSIM3v1Sppclm * Inv_LW; + pParam->BSIM3v1Spdibl1 = model->BSIM3v1Spdibl1 + + model->BSIM3v1Slpdibl1 * Inv_L + + model->BSIM3v1Swpdibl1 * Inv_W + + model->BSIM3v1Sppdibl1 * Inv_LW; + pParam->BSIM3v1Spdibl2 = model->BSIM3v1Spdibl2 + + model->BSIM3v1Slpdibl2 * Inv_L + + model->BSIM3v1Swpdibl2 * Inv_W + + model->BSIM3v1Sppdibl2 * Inv_LW; + pParam->BSIM3v1Spdiblb = model->BSIM3v1Spdiblb + + model->BSIM3v1Slpdiblb * Inv_L + + model->BSIM3v1Swpdiblb * Inv_W + + model->BSIM3v1Sppdiblb * Inv_LW; + pParam->BSIM3v1Spscbe1 = model->BSIM3v1Spscbe1 + + model->BSIM3v1Slpscbe1 * Inv_L + + model->BSIM3v1Swpscbe1 * Inv_W + + model->BSIM3v1Sppscbe1 * Inv_LW; + pParam->BSIM3v1Spscbe2 = model->BSIM3v1Spscbe2 + + model->BSIM3v1Slpscbe2 * Inv_L + + model->BSIM3v1Swpscbe2 * Inv_W + + model->BSIM3v1Sppscbe2 * Inv_LW; + pParam->BSIM3v1Spvag = model->BSIM3v1Spvag + + model->BSIM3v1Slpvag * Inv_L + + model->BSIM3v1Swpvag * Inv_W + + model->BSIM3v1Sppvag * Inv_LW; + pParam->BSIM3v1Swr = model->BSIM3v1Swr + + model->BSIM3v1Slwr * Inv_L + + model->BSIM3v1Swwr * Inv_W + + model->BSIM3v1Spwr * Inv_LW; + pParam->BSIM3v1Sdwg = model->BSIM3v1Sdwg + + model->BSIM3v1Sldwg * Inv_L + + model->BSIM3v1Swdwg * Inv_W + + model->BSIM3v1Spdwg * Inv_LW; + pParam->BSIM3v1Sdwb = model->BSIM3v1Sdwb + + model->BSIM3v1Sldwb * Inv_L + + model->BSIM3v1Swdwb * Inv_W + + model->BSIM3v1Spdwb * Inv_LW; + pParam->BSIM3v1Sb0 = model->BSIM3v1Sb0 + + model->BSIM3v1Slb0 * Inv_L + + model->BSIM3v1Swb0 * Inv_W + + model->BSIM3v1Spb0 * Inv_LW; + pParam->BSIM3v1Sb1 = model->BSIM3v1Sb1 + + model->BSIM3v1Slb1 * Inv_L + + model->BSIM3v1Swb1 * Inv_W + + model->BSIM3v1Spb1 * Inv_LW; + pParam->BSIM3v1Salpha0 = model->BSIM3v1Salpha0 + + model->BSIM3v1Slalpha0 * Inv_L + + model->BSIM3v1Swalpha0 * Inv_W + + model->BSIM3v1Spalpha0 * Inv_LW; + pParam->BSIM3v1Sbeta0 = model->BSIM3v1Sbeta0 + + model->BSIM3v1Slbeta0 * Inv_L + + model->BSIM3v1Swbeta0 * Inv_W + + model->BSIM3v1Spbeta0 * Inv_LW; + /* CV model */ + pParam->BSIM3v1Selm = model->BSIM3v1Selm + + model->BSIM3v1Slelm * Inv_L + + model->BSIM3v1Swelm * Inv_W + + model->BSIM3v1Spelm * Inv_LW; + pParam->BSIM3v1Scgsl = model->BSIM3v1Scgsl + + model->BSIM3v1Slcgsl * Inv_L + + model->BSIM3v1Swcgsl * Inv_W + + model->BSIM3v1Spcgsl * Inv_LW; + pParam->BSIM3v1Scgdl = model->BSIM3v1Scgdl + + model->BSIM3v1Slcgdl * Inv_L + + model->BSIM3v1Swcgdl * Inv_W + + model->BSIM3v1Spcgdl * Inv_LW; + pParam->BSIM3v1Sckappa = model->BSIM3v1Sckappa + + model->BSIM3v1Slckappa * Inv_L + + model->BSIM3v1Swckappa * Inv_W + + model->BSIM3v1Spckappa * Inv_LW; + pParam->BSIM3v1Scf = model->BSIM3v1Scf + + model->BSIM3v1Slcf * Inv_L + + model->BSIM3v1Swcf * Inv_W + + model->BSIM3v1Spcf * Inv_LW; + pParam->BSIM3v1Sclc = model->BSIM3v1Sclc + + model->BSIM3v1Slclc * Inv_L + + model->BSIM3v1Swclc * Inv_W + + model->BSIM3v1Spclc * Inv_LW; + pParam->BSIM3v1Scle = model->BSIM3v1Scle + + model->BSIM3v1Slcle * Inv_L + + model->BSIM3v1Swcle * Inv_W + + model->BSIM3v1Spcle * Inv_LW; + pParam->BSIM3v1Svfbcv = model->BSIM3v1Svfbcv + + model->BSIM3v1Slvfbcv * Inv_L + + model->BSIM3v1Swvfbcv * Inv_W + + model->BSIM3v1Spvfbcv * Inv_LW; + pParam->BSIM3v1SabulkCVfactor = 1.0 + pow((pParam->BSIM3v1Sclc + / pParam->BSIM3v1Sleff), + pParam->BSIM3v1Scle); + + T0 = (TRatio - 1.0); + pParam->BSIM3v1Sua = pParam->BSIM3v1Sua + pParam->BSIM3v1Sua1 * T0; + pParam->BSIM3v1Sub = pParam->BSIM3v1Sub + pParam->BSIM3v1Sub1 * T0; + pParam->BSIM3v1Suc = pParam->BSIM3v1Suc + pParam->BSIM3v1Suc1 * T0; + if (pParam->BSIM3v1Su0 > 1.0) + pParam->BSIM3v1Su0 = pParam->BSIM3v1Su0 / 1.0e4; + + pParam->BSIM3v1Su0temp = pParam->BSIM3v1Su0 + * pow(TRatio, pParam->BSIM3v1Sute); + pParam->BSIM3v1Svsattemp = pParam->BSIM3v1Svsat - pParam->BSIM3v1Sat + * T0; + pParam->BSIM3v1Srds0 = (pParam->BSIM3v1Srdsw + pParam->BSIM3v1Sprt * T0) + / pow(pParam->BSIM3v1Sweff * 1E6, pParam->BSIM3v1Swr); + + if (BSIM3v1ScheckModel(model, here, ckt)) + { IFuid namarray[2]; + namarray[0] = model->BSIM3v1SmodName; + namarray[1] = here->BSIM3v1Sname; + (*(SPfrontEnd->IFerror)) (ERR_FATAL, "Fatal error(s) detected during BSIM3v1SV3 parameter checking for %s in model %s", namarray); + return(E_BADPARM); + } + + pParam->BSIM3v1Scgdo = (model->BSIM3v1Scgdo + pParam->BSIM3v1Scf) + * pParam->BSIM3v1SweffCV; + pParam->BSIM3v1Scgso = (model->BSIM3v1Scgso + pParam->BSIM3v1Scf) + * pParam->BSIM3v1SweffCV; + pParam->BSIM3v1Scgbo = model->BSIM3v1Scgbo * pParam->BSIM3v1SleffCV; + + if (!model->BSIM3v1SnpeakGiven && model->BSIM3v1Sgamma1Given) + { T0 = pParam->BSIM3v1Sgamma1 * model->BSIM3v1Scox; + pParam->BSIM3v1Snpeak = 3.021E22 * T0 * T0; + } + + pParam->BSIM3v1Sphi = 2.0 * Vtm0 + * log(pParam->BSIM3v1Snpeak / ni); + + pParam->BSIM3v1SsqrtPhi = sqrt(pParam->BSIM3v1Sphi); + pParam->BSIM3v1Sphis3 = pParam->BSIM3v1SsqrtPhi * pParam->BSIM3v1Sphi; + + pParam->BSIM3v1SXdep0 = sqrt(2.0 * EPSSI / (Charge_q + * pParam->BSIM3v1Snpeak * 1.0e6)) + * pParam->BSIM3v1SsqrtPhi; + pParam->BSIM3v1SsqrtXdep0 = sqrt(pParam->BSIM3v1SXdep0); + pParam->BSIM3v1Slitl = sqrt(3.0 * pParam->BSIM3v1Sxj + * model->BSIM3v1Stox); + pParam->BSIM3v1Svbi = Vtm0 * log(1.0e20 + * pParam->BSIM3v1Snpeak / (ni * ni)); + pParam->BSIM3v1Scdep0 = sqrt(Charge_q * EPSSI + * pParam->BSIM3v1Snpeak * 1.0e6 / 2.0 + / pParam->BSIM3v1Sphi); + + if (model->BSIM3v1Sk1Given || model->BSIM3v1Sk2Given) + { if (!model->BSIM3v1Sk1Given) + { fprintf(stdout, "Warning: k1 should be specified with k2.\n"); + pParam->BSIM3v1Sk1 = 0.53; + } + if (!model->BSIM3v1Sk2Given) + { fprintf(stdout, "Warning: k2 should be specified with k1.\n"); + pParam->BSIM3v1Sk2 = -0.0186; + } + if (model->BSIM3v1SnsubGiven) + fprintf(stdout, "Warning: nsub is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v1SxtGiven) + fprintf(stdout, "Warning: xt is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v1SvbxGiven) + fprintf(stdout, "Warning: vbx is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v1SvbmGiven) + fprintf(stdout, "Warning: vbm is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v1Sgamma1Given) + fprintf(stdout, "Warning: gamma1 is ignored because k1 or k2 is given.\n"); + if (model->BSIM3v1Sgamma2Given) + fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n"); + } + else + { if (!model->BSIM3v1SvbxGiven) + pParam->BSIM3v1Svbx = pParam->BSIM3v1Sphi - 7.7348e-4 + * pParam->BSIM3v1Snpeak + * pParam->BSIM3v1Sxt * pParam->BSIM3v1Sxt; + if (pParam->BSIM3v1Svbx > 0.0) + pParam->BSIM3v1Svbx = -pParam->BSIM3v1Svbx; + if (pParam->BSIM3v1Svbm > 0.0) + pParam->BSIM3v1Svbm = -pParam->BSIM3v1Svbm; + + if (!model->BSIM3v1Sgamma1Given) + pParam->BSIM3v1Sgamma1 = 5.753e-12 + * sqrt(pParam->BSIM3v1Snpeak) + / model->BSIM3v1Scox; + if (!model->BSIM3v1Sgamma2Given) + pParam->BSIM3v1Sgamma2 = 5.753e-12 + * sqrt(pParam->BSIM3v1Snsub) + / model->BSIM3v1Scox; + + T0 = pParam->BSIM3v1Sgamma1 - pParam->BSIM3v1Sgamma2; + T1 = sqrt(pParam->BSIM3v1Sphi - pParam->BSIM3v1Svbx) + - pParam->BSIM3v1SsqrtPhi; + T2 = sqrt(pParam->BSIM3v1Sphi * (pParam->BSIM3v1Sphi + - pParam->BSIM3v1Svbm)) - pParam->BSIM3v1Sphi; + pParam->BSIM3v1Sk2 = T0 * T1 / (2.0 * T2 + pParam->BSIM3v1Svbm); + pParam->BSIM3v1Sk1 = pParam->BSIM3v1Sgamma2 - 2.0 + * pParam->BSIM3v1Sk2 * sqrt(pParam->BSIM3v1Sphi + - pParam->BSIM3v1Svbm); + } + + if (pParam->BSIM3v1Sk2 < 0.0) + { T0 = 0.5 * pParam->BSIM3v1Sk1 / pParam->BSIM3v1Sk2; + pParam->BSIM3v1Svbsc = 0.9 * (pParam->BSIM3v1Sphi - T0 * T0); + if (pParam->BSIM3v1Svbsc > -3.0) + pParam->BSIM3v1Svbsc = -3.0; + else if (pParam->BSIM3v1Svbsc < -30.0) + pParam->BSIM3v1Svbsc = -30.0; + } + else + { pParam->BSIM3v1Svbsc = -30.0; + } + if (pParam->BSIM3v1Svbsc > pParam->BSIM3v1Svbm) + pParam->BSIM3v1Svbsc = pParam->BSIM3v1Svbm; + + if (model->BSIM3v1Svth0Given) + { pParam->BSIM3v1Svfb = model->BSIM3v1Stype * pParam->BSIM3v1Svth0 + - pParam->BSIM3v1Sphi - pParam->BSIM3v1Sk1 + * pParam->BSIM3v1SsqrtPhi; + } + else + { pParam->BSIM3v1Svfb = -1.0; + pParam->BSIM3v1Svth0 = model->BSIM3v1Stype * (pParam->BSIM3v1Svfb + + pParam->BSIM3v1Sphi + pParam->BSIM3v1Sk1 + * pParam->BSIM3v1SsqrtPhi); + } + T1 = sqrt(EPSSI / EPSOX * model->BSIM3v1Stox + * pParam->BSIM3v1SXdep0); + T0 = exp(-0.5 * pParam->BSIM3v1Sdsub * pParam->BSIM3v1Sleff / T1); + pParam->BSIM3v1Stheta0vb0 = (T0 + 2.0 * T0 * T0); + + T0 = exp(-0.5 * pParam->BSIM3v1Sdrout * pParam->BSIM3v1Sleff / T1); + T2 = (T0 + 2.0 * T0 * T0); + pParam->BSIM3v1SthetaRout = pParam->BSIM3v1Spdibl1 * T2 + + pParam->BSIM3v1Spdibl2; + } + + /* process source/drain series resistance */ + here->BSIM3v1SdrainConductance = model->BSIM3v1SsheetResistance + * here->BSIM3v1SdrainSquares; + if (here->BSIM3v1SdrainConductance > 0.0) + here->BSIM3v1SdrainConductance = 1.0 + / here->BSIM3v1SdrainConductance; + else + here->BSIM3v1SdrainConductance = 0.0; + + here->BSIM3v1SsourceConductance = model->BSIM3v1SsheetResistance + * here->BSIM3v1SsourceSquares; + if (here->BSIM3v1SsourceConductance > 0.0) + here->BSIM3v1SsourceConductance = 1.0 + / here->BSIM3v1SsourceConductance; + else + here->BSIM3v1SsourceConductance = 0.0; + here->BSIM3v1Scgso = pParam->BSIM3v1Scgso; + here->BSIM3v1Scgdo = pParam->BSIM3v1Scgdo; + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim3v1s/b3v1strunc.c b/src/spicelib/devices/bsim3v1s/b3v1strunc.c new file mode 100644 index 000000000..3179b8e43 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/b3v1strunc.c @@ -0,0 +1,49 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan. +Modified by Paolo Nenzi 2002 +File: b3v1strunc.c +**********/ + +#include "ngspice.h" +#include "cktdefs.h" +#include "bsim3v1sdef.h" +#include "sperror.h" +#include "suffix.h" + + +int +BSIM3v1Strunc(GENmodel *inModel, CKTcircuit *ckt, double *timeStep) +{ +BSIM3v1Smodel *model = (BSIM3v1Smodel*)inModel; +BSIM3v1Sinstance *here; + +#ifdef STEPDEBUG + double debugtemp; +#endif /* STEPDEBUG */ + + for (; model != NULL; model = model->BSIM3v1SnextModel) + { for (here = model->BSIM3v1Sinstances; here != NULL; + here = here->BSIM3v1SnextInstance) + { + + if (here->BSIM3v1Sowner != ARCHme) + continue; + +#ifdef STEPDEBUG + debugtemp = *timeStep; +#endif /* STEPDEBUG */ + CKTterr(here->BSIM3v1Sqb,ckt,timeStep); + CKTterr(here->BSIM3v1Sqg,ckt,timeStep); + CKTterr(here->BSIM3v1Sqd,ckt,timeStep); +#ifdef STEPDEBUG + if(debugtemp != *timeStep) + { printf("device %s reduces step from %g to %g\n", + here->BSIM3v1Sname,debugtemp,*timeStep); + } +#endif /* STEPDEBUG */ + + } + } + return(OK); +} diff --git a/src/spicelib/devices/bsim3v1s/bsim3v1sdef.h b/src/spicelib/devices/bsim3v1s/bsim3v1sdef.h new file mode 100644 index 000000000..361a85968 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/bsim3v1sdef.h @@ -0,0 +1,1629 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1995 Min-Chie Jeng and Mansun Chan +Modified by Paolo Nenzi 2002 +File: bsim3v1sdef.h +**********/ + +#ifndef BSIM3v1S +#define BSIM3v1S + +#include "ifsim.h" +#include "gendefs.h" +#include "cktdefs.h" +#include "complex.h" +#include "noisedef.h" + +typedef struct sBSIM3v1Sinstance +{ + struct sBSIM3v1Smodel *BSIM3v1SmodPtr; + struct sBSIM3v1Sinstance *BSIM3v1SnextInstance; + IFuid BSIM3v1Sname; + int BSIM3v1Sowner; /* number of owner process */ + int BSIM3v1Sstates; /* index into state table for this device */ + + int BSIM3v1SdNode; + int BSIM3v1SgNode; + int BSIM3v1SsNode; + int BSIM3v1SbNode; + int BSIM3v1SdNodePrime; + int BSIM3v1SsNodePrime; + int BSIM3v1SqNode; /* MCJ */ + + /* MCJ */ + double BSIM3v1Sueff; + double BSIM3v1Sthetavth; + double BSIM3v1Svon; + double BSIM3v1Svdsat; + double BSIM3v1Scgdo; + double BSIM3v1Scgso; + + double BSIM3v1Sl; + double BSIM3v1Sw; + double BSIM3v1SdrainArea; + double BSIM3v1SsourceArea; + double BSIM3v1SdrainSquares; + double BSIM3v1SsourceSquares; + double BSIM3v1SdrainPerimeter; + double BSIM3v1SsourcePerimeter; + double BSIM3v1SsourceConductance; + double BSIM3v1SdrainConductance; + double BSIM3v1Sm; + + double BSIM3v1SicVBS; + double BSIM3v1SicVDS; + double BSIM3v1SicVGS; + int BSIM3v1Soff; + int BSIM3v1Smode; + int BSIM3v1SnqsMod; + + /* OP point */ + double BSIM3v1Sqinv; + double BSIM3v1Scd; + double BSIM3v1Scbs; + double BSIM3v1Scbd; + double BSIM3v1Scsub; + double BSIM3v1Sgm; + double BSIM3v1Sgds; + double BSIM3v1Sgmbs; + double BSIM3v1Sgbd; + double BSIM3v1Sgbs; + + double BSIM3v1Sgbbs; + double BSIM3v1Sgbgs; + double BSIM3v1Sgbds; + + double BSIM3v1Scggb; + double BSIM3v1Scgdb; + double BSIM3v1Scgsb; + double BSIM3v1Scbgb; + double BSIM3v1Scbdb; + double BSIM3v1Scbsb; + double BSIM3v1Scdgb; + double BSIM3v1Scddb; + double BSIM3v1Scdsb; + double BSIM3v1Scapbd; + double BSIM3v1Scapbs; + + double BSIM3v1Scqgb; + double BSIM3v1Scqdb; + double BSIM3v1Scqsb; + double BSIM3v1Scqbb; + + double BSIM3v1Sgtau; + double BSIM3v1Sgtg; + double BSIM3v1Sgtd; + double BSIM3v1Sgts; + double BSIM3v1Sgtb; + double BSIM3v1Stconst; + + struct bsim3v1sSizeDependParam *pParam; + + unsigned BSIM3v1SlGiven :1; + unsigned BSIM3v1SwGiven :1; + unsigned BSIM3v1SdrainAreaGiven :1; + unsigned BSIM3v1SsourceAreaGiven :1; + unsigned BSIM3v1SdrainSquaresGiven :1; + unsigned BSIM3v1SsourceSquaresGiven :1; + unsigned BSIM3v1SdrainPerimeterGiven :1; + unsigned BSIM3v1SsourcePerimeterGiven :1; + unsigned BSIM3v1SdNodePrimeSet :1; + unsigned BSIM3v1SsNodePrimeSet :1; + unsigned BSIM3v1SicVBSGiven :1; + unsigned BSIM3v1SicVDSGiven :1; + unsigned BSIM3v1SicVGSGiven :1; + unsigned BSIM3v1SnqsModGiven :1; + + double *BSIM3v1SDdPtr; + double *BSIM3v1SGgPtr; + double *BSIM3v1SSsPtr; + double *BSIM3v1SBbPtr; + double *BSIM3v1SDPdpPtr; + double *BSIM3v1SSPspPtr; + double *BSIM3v1SDdpPtr; + double *BSIM3v1SGbPtr; + double *BSIM3v1SGdpPtr; + double *BSIM3v1SGspPtr; + double *BSIM3v1SSspPtr; + double *BSIM3v1SBdpPtr; + double *BSIM3v1SBspPtr; + double *BSIM3v1SDPspPtr; + double *BSIM3v1SDPdPtr; + double *BSIM3v1SBgPtr; + double *BSIM3v1SDPgPtr; + double *BSIM3v1SSPgPtr; + double *BSIM3v1SSPsPtr; + double *BSIM3v1SDPbPtr; + double *BSIM3v1SSPbPtr; + double *BSIM3v1SSPdpPtr; + + double *BSIM3v1SQqPtr; + double *BSIM3v1SQdpPtr; + double *BSIM3v1SQgPtr; + double *BSIM3v1SQspPtr; + double *BSIM3v1SQbPtr; + double *BSIM3v1SDPqPtr; + double *BSIM3v1SGqPtr; + double *BSIM3v1SSPqPtr; + double *BSIM3v1SBqPtr; + +#define BSIM3v1Svbd BSIM3v1Sstates+ 0 +#define BSIM3v1Svbs BSIM3v1Sstates+ 1 +#define BSIM3v1Svgs BSIM3v1Sstates+ 2 +#define BSIM3v1Svds BSIM3v1Sstates+ 3 + +#define BSIM3v1Sqb BSIM3v1Sstates+ 4 +#define BSIM3v1Scqb BSIM3v1Sstates+ 5 +#define BSIM3v1Sqg BSIM3v1Sstates+ 6 +#define BSIM3v1Scqg BSIM3v1Sstates+ 7 +#define BSIM3v1Sqd BSIM3v1Sstates+ 8 +#define BSIM3v1Scqd BSIM3v1Sstates+ 9 + +#define BSIM3v1Sqbs BSIM3v1Sstates+ 10 +#define BSIM3v1Sqbd BSIM3v1Sstates+ 11 + +#define BSIM3v1Sqcheq BSIM3v1Sstates+ 12 +#define BSIM3v1Scqcheq BSIM3v1Sstates+ 13 +#define BSIM3v1Sqcdump BSIM3v1Sstates+ 14 +#define BSIM3v1Scqcdump BSIM3v1Sstates+ 15 + +#define BSIM3v1Stau BSIM3v1Sstates+ 16 +#define BSIM3v1Sqdef BSIM3v1Sstates+ 17 + +#define BSIM3v1SnumStates 18 + + +/* indices to the array of BSIM3v1S NOISE SOURCES */ + +#define BSIM3v1SRDNOIZ 0 +#define BSIM3v1SRSNOIZ 1 +#define BSIM3v1SIDNOIZ 2 +#define BSIM3v1SFLNOIZ 3 +#define BSIM3v1STOTNOIZ 4 + +#define BSIM3v1SNSRCS 5 /* the number of MOSFET(3) noise sources */ + +#ifndef NONOISE + double BSIM3v1SnVar[NSTATVARS][BSIM3v1SNSRCS]; +#else /* NONOISE */ + double **BSIM3v1SnVar; +#endif /* NONOISE */ + +} BSIM3v1Sinstance ; + +struct bsim3v1sSizeDependParam +{ + double Width; + double Length; + + double BSIM3v1Scdsc; + double BSIM3v1Scdscb; + double BSIM3v1Scdscd; + double BSIM3v1Scit; + double BSIM3v1Snfactor; + double BSIM3v1Sxj; + double BSIM3v1Svsat; + double BSIM3v1Sat; + double BSIM3v1Sa0; + double BSIM3v1Sags; + double BSIM3v1Sa1; + double BSIM3v1Sa2; + double BSIM3v1Sketa; + double BSIM3v1Snsub; + double BSIM3v1Snpeak; + double BSIM3v1Sngate; + double BSIM3v1Sgamma1; + double BSIM3v1Sgamma2; + double BSIM3v1Svbx; + double BSIM3v1Svbi; + double BSIM3v1Svbm; + double BSIM3v1Svbsc; + double BSIM3v1Sxt; + double BSIM3v1Sphi; + double BSIM3v1Slitl; + double BSIM3v1Sk1; + double BSIM3v1Skt1; + double BSIM3v1Skt1l; + double BSIM3v1Skt2; + double BSIM3v1Sk2; + double BSIM3v1Sk3; + double BSIM3v1Sk3b; + double BSIM3v1Sw0; + double BSIM3v1Snlx; + double BSIM3v1Sdvt0; + double BSIM3v1Sdvt1; + double BSIM3v1Sdvt2; + double BSIM3v1Sdvt0w; + double BSIM3v1Sdvt1w; + double BSIM3v1Sdvt2w; + double BSIM3v1Sdrout; + double BSIM3v1Sdsub; + double BSIM3v1Svth0; + double BSIM3v1Sua; + double BSIM3v1Sua1; + double BSIM3v1Sub; + double BSIM3v1Sub1; + double BSIM3v1Suc; + double BSIM3v1Suc1; + double BSIM3v1Su0; + double BSIM3v1Sute; + double BSIM3v1Svoff; + double BSIM3v1Svfb; + double BSIM3v1Sdelta; + double BSIM3v1Srdsw; + double BSIM3v1Srds0; + double BSIM3v1Sprwg; + double BSIM3v1Sprwb; + double BSIM3v1Sprt; + double BSIM3v1Seta0; + double BSIM3v1Setab; + double BSIM3v1Spclm; + double BSIM3v1Spdibl1; + double BSIM3v1Spdibl2; + double BSIM3v1Spdiblb; + double BSIM3v1Spscbe1; + double BSIM3v1Spscbe2; + double BSIM3v1Spvag; + double BSIM3v1Swr; + double BSIM3v1Sdwg; + double BSIM3v1Sdwb; + double BSIM3v1Sb0; + double BSIM3v1Sb1; + double BSIM3v1Salpha0; + double BSIM3v1Sbeta0; + + + /* CV model */ + double BSIM3v1Selm; + double BSIM3v1Scgsl; + double BSIM3v1Scgdl; + double BSIM3v1Sckappa; + double BSIM3v1Scf; + double BSIM3v1Sclc; + double BSIM3v1Scle; + double BSIM3v1Svfbcv; + + +/* Pre-calculated constants */ + + double BSIM3v1Sdw; + double BSIM3v1Sdl; + double BSIM3v1Sleff; + double BSIM3v1Sweff; + + double BSIM3v1Sdwc; + double BSIM3v1Sdlc; + double BSIM3v1SleffCV; + double BSIM3v1SweffCV; + double BSIM3v1SabulkCVfactor; + double BSIM3v1Scgso; + double BSIM3v1Scgdo; + double BSIM3v1Scgbo; + + double BSIM3v1Su0temp; + double BSIM3v1Svsattemp; + double BSIM3v1SsqrtPhi; + double BSIM3v1Sphis3; + double BSIM3v1SXdep0; + double BSIM3v1SsqrtXdep0; + double BSIM3v1Stheta0vb0; + double BSIM3v1SthetaRout; + + double BSIM3v1Scof1; + double BSIM3v1Scof2; + double BSIM3v1Scof3; + double BSIM3v1Scof4; + double BSIM3v1Scdep0; + struct bsim3v1sSizeDependParam *pNext; +}; + + +typedef struct sBSIM3v1Smodel +{ + int BSIM3v1SmodType; + struct sBSIM3v1Smodel *BSIM3v1SnextModel; + BSIM3v1Sinstance *BSIM3v1Sinstances; + IFuid BSIM3v1SmodName; + int BSIM3v1Stype; + + int BSIM3v1SmobMod; + int BSIM3v1ScapMod; + int BSIM3v1SnqsMod; + int BSIM3v1SnoiMod; + int BSIM3v1SbinUnit; + int BSIM3v1SparamChk; + double BSIM3v1Sversion; + double BSIM3v1Stox; + double BSIM3v1Scdsc; + double BSIM3v1Scdscb; + double BSIM3v1Scdscd; + double BSIM3v1Scit; + double BSIM3v1Snfactor; + double BSIM3v1Sxj; + double BSIM3v1Svsat; + double BSIM3v1Sat; + double BSIM3v1Sa0; + double BSIM3v1Sags; + double BSIM3v1Sa1; + double BSIM3v1Sa2; + double BSIM3v1Sketa; + double BSIM3v1Snsub; + double BSIM3v1Snpeak; + double BSIM3v1Sngate; + double BSIM3v1Sgamma1; + double BSIM3v1Sgamma2; + double BSIM3v1Svbx; + double BSIM3v1Svbm; + double BSIM3v1Sxt; + double BSIM3v1Sk1; + double BSIM3v1Skt1; + double BSIM3v1Skt1l; + double BSIM3v1Skt2; + double BSIM3v1Sk2; + double BSIM3v1Sk3; + double BSIM3v1Sk3b; + double BSIM3v1Sw0; + double BSIM3v1Snlx; + double BSIM3v1Sdvt0; + double BSIM3v1Sdvt1; + double BSIM3v1Sdvt2; + double BSIM3v1Sdvt0w; + double BSIM3v1Sdvt1w; + double BSIM3v1Sdvt2w; + double BSIM3v1Sdrout; + double BSIM3v1Sdsub; + double BSIM3v1Svth0; + double BSIM3v1Sua; + double BSIM3v1Sua1; + double BSIM3v1Sub; + double BSIM3v1Sub1; + double BSIM3v1Suc; + double BSIM3v1Suc1; + double BSIM3v1Su0; + double BSIM3v1Sute; + double BSIM3v1Svoff; + double BSIM3v1Sdelta; + double BSIM3v1Srdsw; + double BSIM3v1Sprwg; + double BSIM3v1Sprwb; + double BSIM3v1Sprt; + double BSIM3v1Seta0; + double BSIM3v1Setab; + double BSIM3v1Spclm; + double BSIM3v1Spdibl1; + double BSIM3v1Spdibl2; + double BSIM3v1Spdiblb; + double BSIM3v1Spscbe1; + double BSIM3v1Spscbe2; + double BSIM3v1Spvag; + double BSIM3v1Swr; + double BSIM3v1Sdwg; + double BSIM3v1Sdwb; + double BSIM3v1Sb0; + double BSIM3v1Sb1; + double BSIM3v1Salpha0; + double BSIM3v1Sbeta0; +/* serban */ + double BSIM3v1Shdif; + + /* CV model */ + double BSIM3v1Selm; + double BSIM3v1Scgsl; + double BSIM3v1Scgdl; + double BSIM3v1Sckappa; + double BSIM3v1Scf; + double BSIM3v1Svfbcv; + double BSIM3v1Sclc; + double BSIM3v1Scle; + double BSIM3v1Sdwc; + double BSIM3v1Sdlc; + + /* Length Dependence */ + double BSIM3v1Slcdsc; + double BSIM3v1Slcdscb; + double BSIM3v1Slcdscd; + double BSIM3v1Slcit; + double BSIM3v1Slnfactor; + double BSIM3v1Slxj; + double BSIM3v1Slvsat; + double BSIM3v1Slat; + double BSIM3v1Sla0; + double BSIM3v1Slags; + double BSIM3v1Sla1; + double BSIM3v1Sla2; + double BSIM3v1Slketa; + double BSIM3v1Slnsub; + double BSIM3v1Slnpeak; + double BSIM3v1Slngate; + double BSIM3v1Slgamma1; + double BSIM3v1Slgamma2; + double BSIM3v1Slvbx; + double BSIM3v1Slvbm; + double BSIM3v1Slxt; + double BSIM3v1Slk1; + double BSIM3v1Slkt1; + double BSIM3v1Slkt1l; + double BSIM3v1Slkt2; + double BSIM3v1Slk2; + double BSIM3v1Slk3; + double BSIM3v1Slk3b; + double BSIM3v1Slw0; + double BSIM3v1Slnlx; + double BSIM3v1Sldvt0; + double BSIM3v1Sldvt1; + double BSIM3v1Sldvt2; + double BSIM3v1Sldvt0w; + double BSIM3v1Sldvt1w; + double BSIM3v1Sldvt2w; + double BSIM3v1Sldrout; + double BSIM3v1Sldsub; + double BSIM3v1Slvth0; + double BSIM3v1Slua; + double BSIM3v1Slua1; + double BSIM3v1Slub; + double BSIM3v1Slub1; + double BSIM3v1Sluc; + double BSIM3v1Sluc1; + double BSIM3v1Slu0; + double BSIM3v1Slute; + double BSIM3v1Slvoff; + double BSIM3v1Sldelta; + double BSIM3v1Slrdsw; + double BSIM3v1Slprwg; + double BSIM3v1Slprwb; + double BSIM3v1Slprt; + double BSIM3v1Sleta0; + double BSIM3v1Sletab; + double BSIM3v1Slpclm; + double BSIM3v1Slpdibl1; + double BSIM3v1Slpdibl2; + double BSIM3v1Slpdiblb; + double BSIM3v1Slpscbe1; + double BSIM3v1Slpscbe2; + double BSIM3v1Slpvag; + double BSIM3v1Slwr; + double BSIM3v1Sldwg; + double BSIM3v1Sldwb; + double BSIM3v1Slb0; + double BSIM3v1Slb1; + double BSIM3v1Slalpha0; + double BSIM3v1Slbeta0; + + /* CV model */ + double BSIM3v1Slelm; + double BSIM3v1Slcgsl; + double BSIM3v1Slcgdl; + double BSIM3v1Slckappa; + double BSIM3v1Slcf; + double BSIM3v1Slclc; + double BSIM3v1Slcle; + double BSIM3v1Slvfbcv; + + /* Width Dependence */ + double BSIM3v1Swcdsc; + double BSIM3v1Swcdscb; + double BSIM3v1Swcdscd; + double BSIM3v1Swcit; + double BSIM3v1Swnfactor; + double BSIM3v1Swxj; + double BSIM3v1Swvsat; + double BSIM3v1Swat; + double BSIM3v1Swa0; + double BSIM3v1Swags; + double BSIM3v1Swa1; + double BSIM3v1Swa2; + double BSIM3v1Swketa; + double BSIM3v1Swnsub; + double BSIM3v1Swnpeak; + double BSIM3v1Swngate; + double BSIM3v1Swgamma1; + double BSIM3v1Swgamma2; + double BSIM3v1Swvbx; + double BSIM3v1Swvbm; + double BSIM3v1Swxt; + double BSIM3v1Swk1; + double BSIM3v1Swkt1; + double BSIM3v1Swkt1l; + double BSIM3v1Swkt2; + double BSIM3v1Swk2; + double BSIM3v1Swk3; + double BSIM3v1Swk3b; + double BSIM3v1Sww0; + double BSIM3v1Swnlx; + double BSIM3v1Swdvt0; + double BSIM3v1Swdvt1; + double BSIM3v1Swdvt2; + double BSIM3v1Swdvt0w; + double BSIM3v1Swdvt1w; + double BSIM3v1Swdvt2w; + double BSIM3v1Swdrout; + double BSIM3v1Swdsub; + double BSIM3v1Swvth0; + double BSIM3v1Swua; + double BSIM3v1Swua1; + double BSIM3v1Swub; + double BSIM3v1Swub1; + double BSIM3v1Swuc; + double BSIM3v1Swuc1; + double BSIM3v1Swu0; + double BSIM3v1Swute; + double BSIM3v1Swvoff; + double BSIM3v1Swdelta; + double BSIM3v1Swrdsw; + double BSIM3v1Swprwg; + double BSIM3v1Swprwb; + double BSIM3v1Swprt; + double BSIM3v1Sweta0; + double BSIM3v1Swetab; + double BSIM3v1Swpclm; + double BSIM3v1Swpdibl1; + double BSIM3v1Swpdibl2; + double BSIM3v1Swpdiblb; + double BSIM3v1Swpscbe1; + double BSIM3v1Swpscbe2; + double BSIM3v1Swpvag; + double BSIM3v1Swwr; + double BSIM3v1Swdwg; + double BSIM3v1Swdwb; + double BSIM3v1Swb0; + double BSIM3v1Swb1; + double BSIM3v1Swalpha0; + double BSIM3v1Swbeta0; + + /* CV model */ + double BSIM3v1Swelm; + double BSIM3v1Swcgsl; + double BSIM3v1Swcgdl; + double BSIM3v1Swckappa; + double BSIM3v1Swcf; + double BSIM3v1Swclc; + double BSIM3v1Swcle; + double BSIM3v1Swvfbcv; + + /* Cross-term Dependence */ + double BSIM3v1Spcdsc; + double BSIM3v1Spcdscb; + double BSIM3v1Spcdscd; + double BSIM3v1Spcit; + double BSIM3v1Spnfactor; + double BSIM3v1Spxj; + double BSIM3v1Spvsat; + double BSIM3v1Spat; + double BSIM3v1Spa0; + double BSIM3v1Spags; + double BSIM3v1Spa1; + double BSIM3v1Spa2; + double BSIM3v1Spketa; + double BSIM3v1Spnsub; + double BSIM3v1Spnpeak; + double BSIM3v1Spngate; + double BSIM3v1Spgamma1; + double BSIM3v1Spgamma2; + double BSIM3v1Spvbx; + double BSIM3v1Spvbm; + double BSIM3v1Spxt; + double BSIM3v1Spk1; + double BSIM3v1Spkt1; + double BSIM3v1Spkt1l; + double BSIM3v1Spkt2; + double BSIM3v1Spk2; + double BSIM3v1Spk3; + double BSIM3v1Spk3b; + double BSIM3v1Spw0; + double BSIM3v1Spnlx; + double BSIM3v1Spdvt0; + double BSIM3v1Spdvt1; + double BSIM3v1Spdvt2; + double BSIM3v1Spdvt0w; + double BSIM3v1Spdvt1w; + double BSIM3v1Spdvt2w; + double BSIM3v1Spdrout; + double BSIM3v1Spdsub; + double BSIM3v1Spvth0; + double BSIM3v1Spua; + double BSIM3v1Spua1; + double BSIM3v1Spub; + double BSIM3v1Spub1; + double BSIM3v1Spuc; + double BSIM3v1Spuc1; + double BSIM3v1Spu0; + double BSIM3v1Spute; + double BSIM3v1Spvoff; + double BSIM3v1Spdelta; + double BSIM3v1Sprdsw; + double BSIM3v1Spprwg; + double BSIM3v1Spprwb; + double BSIM3v1Spprt; + double BSIM3v1Speta0; + double BSIM3v1Spetab; + double BSIM3v1Sppclm; + double BSIM3v1Sppdibl1; + double BSIM3v1Sppdibl2; + double BSIM3v1Sppdiblb; + double BSIM3v1Sppscbe1; + double BSIM3v1Sppscbe2; + double BSIM3v1Sppvag; + double BSIM3v1Spwr; + double BSIM3v1Spdwg; + double BSIM3v1Spdwb; + double BSIM3v1Spb0; + double BSIM3v1Spb1; + double BSIM3v1Spalpha0; + double BSIM3v1Spbeta0; + + /* CV model */ + double BSIM3v1Spelm; + double BSIM3v1Spcgsl; + double BSIM3v1Spcgdl; + double BSIM3v1Spckappa; + double BSIM3v1Spcf; + double BSIM3v1Spclc; + double BSIM3v1Spcle; + double BSIM3v1Spvfbcv; + + double BSIM3v1Stnom; + double BSIM3v1Scgso; + double BSIM3v1Scgdo; + double BSIM3v1Scgbo; + double BSIM3v1Sxpart; + double BSIM3v1ScFringOut; + double BSIM3v1ScFringMax; + + double BSIM3v1SsheetResistance; + double BSIM3v1SjctSatCurDensity; + double BSIM3v1SjctSidewallSatCurDensity; + double BSIM3v1SbulkJctPotential; + double BSIM3v1SbulkJctBotGradingCoeff; + double BSIM3v1SbulkJctSideGradingCoeff; + double BSIM3v1SbulkJctGateSideGradingCoeff; + double BSIM3v1SsidewallJctPotential; + double BSIM3v1SGatesidewallJctPotential; + double BSIM3v1SunitAreaJctCap; + double BSIM3v1SunitLengthSidewallJctCap; + double BSIM3v1SunitLengthGateSidewallJctCap; + double BSIM3v1SjctEmissionCoeff; + double BSIM3v1SjctTempExponent; + + double BSIM3v1SLint; + double BSIM3v1SLl; + double BSIM3v1SLln; + double BSIM3v1SLw; + double BSIM3v1SLwn; + double BSIM3v1SLwl; + double BSIM3v1SLmin; + double BSIM3v1SLmax; + + double BSIM3v1SWint; + double BSIM3v1SWl; + double BSIM3v1SWln; + double BSIM3v1SWw; + double BSIM3v1SWwn; + double BSIM3v1SWwl; + double BSIM3v1SWmin; + double BSIM3v1SWmax; + + +/* Pre-calculated constants */ + /* MCJ: move to size-dependent param. */ + double BSIM3v1Svtm; + double BSIM3v1Scox; + double BSIM3v1Scof1; + double BSIM3v1Scof2; + double BSIM3v1Scof3; + double BSIM3v1Scof4; + double BSIM3v1Svcrit; + double BSIM3v1Sfactor1; + double BSIM3v1SjctTempSatCurDensity; + double BSIM3v1SjctSidewallTempSatCurDensity; + + double BSIM3v1SoxideTrapDensityA; + double BSIM3v1SoxideTrapDensityB; + double BSIM3v1SoxideTrapDensityC; + double BSIM3v1Sem; + double BSIM3v1Sef; + double BSIM3v1Saf; + double BSIM3v1Skf; + + struct bsim3v1sSizeDependParam *pSizeDependParamKnot; + + /* Flags */ + unsigned BSIM3v1SmobModGiven :1; + unsigned BSIM3v1SbinUnitGiven :1; + unsigned BSIM3v1ScapModGiven :1; + unsigned BSIM3v1SparamChkGiven :1; + unsigned BSIM3v1SnqsModGiven :1; + unsigned BSIM3v1SnoiModGiven :1; + unsigned BSIM3v1StypeGiven :1; + unsigned BSIM3v1StoxGiven :1; + unsigned BSIM3v1SversionGiven :1; + + unsigned BSIM3v1ScdscGiven :1; + unsigned BSIM3v1ScdscbGiven :1; + unsigned BSIM3v1ScdscdGiven :1; + unsigned BSIM3v1ScitGiven :1; + unsigned BSIM3v1SnfactorGiven :1; + unsigned BSIM3v1SxjGiven :1; + unsigned BSIM3v1SvsatGiven :1; + unsigned BSIM3v1SatGiven :1; + unsigned BSIM3v1Sa0Given :1; + unsigned BSIM3v1SagsGiven :1; + unsigned BSIM3v1Sa1Given :1; + unsigned BSIM3v1Sa2Given :1; + unsigned BSIM3v1SketaGiven :1; + unsigned BSIM3v1SnsubGiven :1; + unsigned BSIM3v1SnpeakGiven :1; + unsigned BSIM3v1SngateGiven :1; + unsigned BSIM3v1Sgamma1Given :1; + unsigned BSIM3v1Sgamma2Given :1; + unsigned BSIM3v1SvbxGiven :1; + unsigned BSIM3v1SvbmGiven :1; + unsigned BSIM3v1SxtGiven :1; + unsigned BSIM3v1Sk1Given :1; + unsigned BSIM3v1Skt1Given :1; + unsigned BSIM3v1Skt1lGiven :1; + unsigned BSIM3v1Skt2Given :1; + unsigned BSIM3v1Sk2Given :1; + unsigned BSIM3v1Sk3Given :1; + unsigned BSIM3v1Sk3bGiven :1; + unsigned BSIM3v1Sw0Given :1; + unsigned BSIM3v1SnlxGiven :1; + unsigned BSIM3v1Sdvt0Given :1; + unsigned BSIM3v1Sdvt1Given :1; + unsigned BSIM3v1Sdvt2Given :1; + unsigned BSIM3v1Sdvt0wGiven :1; + unsigned BSIM3v1Sdvt1wGiven :1; + unsigned BSIM3v1Sdvt2wGiven :1; + unsigned BSIM3v1SdroutGiven :1; + unsigned BSIM3v1SdsubGiven :1; + unsigned BSIM3v1Svth0Given :1; + unsigned BSIM3v1SuaGiven :1; + unsigned BSIM3v1Sua1Given :1; + unsigned BSIM3v1SubGiven :1; + unsigned BSIM3v1Sub1Given :1; + unsigned BSIM3v1SucGiven :1; + unsigned BSIM3v1Suc1Given :1; + unsigned BSIM3v1Su0Given :1; + unsigned BSIM3v1SuteGiven :1; + unsigned BSIM3v1SvoffGiven :1; + unsigned BSIM3v1SrdswGiven :1; + unsigned BSIM3v1SprwgGiven :1; + unsigned BSIM3v1SprwbGiven :1; + unsigned BSIM3v1SprtGiven :1; + unsigned BSIM3v1Seta0Given :1; + unsigned BSIM3v1SetabGiven :1; + unsigned BSIM3v1SpclmGiven :1; + unsigned BSIM3v1Spdibl1Given :1; + unsigned BSIM3v1Spdibl2Given :1; + unsigned BSIM3v1SpdiblbGiven :1; + unsigned BSIM3v1Spscbe1Given :1; + unsigned BSIM3v1Spscbe2Given :1; + unsigned BSIM3v1SpvagGiven :1; + unsigned BSIM3v1SdeltaGiven :1; + unsigned BSIM3v1SwrGiven :1; + unsigned BSIM3v1SdwgGiven :1; + unsigned BSIM3v1SdwbGiven :1; + unsigned BSIM3v1Sb0Given :1; + unsigned BSIM3v1Sb1Given :1; + unsigned BSIM3v1Salpha0Given :1; + unsigned BSIM3v1Sbeta0Given :1; + unsigned BSIM3v1ShdifGiven :1; + + /* CV model */ + unsigned BSIM3v1SelmGiven :1; + unsigned BSIM3v1ScgslGiven :1; + unsigned BSIM3v1ScgdlGiven :1; + unsigned BSIM3v1SckappaGiven :1; + unsigned BSIM3v1ScfGiven :1; + unsigned BSIM3v1SvfbcvGiven :1; + unsigned BSIM3v1SclcGiven :1; + unsigned BSIM3v1ScleGiven :1; + unsigned BSIM3v1SdwcGiven :1; + unsigned BSIM3v1SdlcGiven :1; + + + /* Length dependence */ + unsigned BSIM3v1SlcdscGiven :1; + unsigned BSIM3v1SlcdscbGiven :1; + unsigned BSIM3v1SlcdscdGiven :1; + unsigned BSIM3v1SlcitGiven :1; + unsigned BSIM3v1SlnfactorGiven :1; + unsigned BSIM3v1SlxjGiven :1; + unsigned BSIM3v1SlvsatGiven :1; + unsigned BSIM3v1SlatGiven :1; + unsigned BSIM3v1Sla0Given :1; + unsigned BSIM3v1SlagsGiven :1; + unsigned BSIM3v1Sla1Given :1; + unsigned BSIM3v1Sla2Given :1; + unsigned BSIM3v1SlketaGiven :1; + unsigned BSIM3v1SlnsubGiven :1; + unsigned BSIM3v1SlnpeakGiven :1; + unsigned BSIM3v1SlngateGiven :1; + unsigned BSIM3v1Slgamma1Given :1; + unsigned BSIM3v1Slgamma2Given :1; + unsigned BSIM3v1SlvbxGiven :1; + unsigned BSIM3v1SlvbmGiven :1; + unsigned BSIM3v1SlxtGiven :1; + unsigned BSIM3v1Slk1Given :1; + unsigned BSIM3v1Slkt1Given :1; + unsigned BSIM3v1Slkt1lGiven :1; + unsigned BSIM3v1Slkt2Given :1; + unsigned BSIM3v1Slk2Given :1; + unsigned BSIM3v1Slk3Given :1; + unsigned BSIM3v1Slk3bGiven :1; + unsigned BSIM3v1Slw0Given :1; + unsigned BSIM3v1SlnlxGiven :1; + unsigned BSIM3v1Sldvt0Given :1; + unsigned BSIM3v1Sldvt1Given :1; + unsigned BSIM3v1Sldvt2Given :1; + unsigned BSIM3v1Sldvt0wGiven :1; + unsigned BSIM3v1Sldvt1wGiven :1; + unsigned BSIM3v1Sldvt2wGiven :1; + unsigned BSIM3v1SldroutGiven :1; + unsigned BSIM3v1SldsubGiven :1; + unsigned BSIM3v1Slvth0Given :1; + unsigned BSIM3v1SluaGiven :1; + unsigned BSIM3v1Slua1Given :1; + unsigned BSIM3v1SlubGiven :1; + unsigned BSIM3v1Slub1Given :1; + unsigned BSIM3v1SlucGiven :1; + unsigned BSIM3v1Sluc1Given :1; + unsigned BSIM3v1Slu0Given :1; + unsigned BSIM3v1SluteGiven :1; + unsigned BSIM3v1SlvoffGiven :1; + unsigned BSIM3v1SlrdswGiven :1; + unsigned BSIM3v1SlprwgGiven :1; + unsigned BSIM3v1SlprwbGiven :1; + unsigned BSIM3v1SlprtGiven :1; + unsigned BSIM3v1Sleta0Given :1; + unsigned BSIM3v1SletabGiven :1; + unsigned BSIM3v1SlpclmGiven :1; + unsigned BSIM3v1Slpdibl1Given :1; + unsigned BSIM3v1Slpdibl2Given :1; + unsigned BSIM3v1SlpdiblbGiven :1; + unsigned BSIM3v1Slpscbe1Given :1; + unsigned BSIM3v1Slpscbe2Given :1; + unsigned BSIM3v1SlpvagGiven :1; + unsigned BSIM3v1SldeltaGiven :1; + unsigned BSIM3v1SlwrGiven :1; + unsigned BSIM3v1SldwgGiven :1; + unsigned BSIM3v1SldwbGiven :1; + unsigned BSIM3v1Slb0Given :1; + unsigned BSIM3v1Slb1Given :1; + unsigned BSIM3v1Slalpha0Given :1; + unsigned BSIM3v1Slbeta0Given :1; + + /* CV model */ + unsigned BSIM3v1SlelmGiven :1; + unsigned BSIM3v1SlcgslGiven :1; + unsigned BSIM3v1SlcgdlGiven :1; + unsigned BSIM3v1SlckappaGiven :1; + unsigned BSIM3v1SlcfGiven :1; + unsigned BSIM3v1SlclcGiven :1; + unsigned BSIM3v1SlcleGiven :1; + unsigned BSIM3v1SlvfbcvGiven :1; + + /* Width dependence */ + unsigned BSIM3v1SwcdscGiven :1; + unsigned BSIM3v1SwcdscbGiven :1; + unsigned BSIM3v1SwcdscdGiven :1; + unsigned BSIM3v1SwcitGiven :1; + unsigned BSIM3v1SwnfactorGiven :1; + unsigned BSIM3v1SwxjGiven :1; + unsigned BSIM3v1SwvsatGiven :1; + unsigned BSIM3v1SwatGiven :1; + unsigned BSIM3v1Swa0Given :1; + unsigned BSIM3v1SwagsGiven :1; + unsigned BSIM3v1Swa1Given :1; + unsigned BSIM3v1Swa2Given :1; + unsigned BSIM3v1SwketaGiven :1; + unsigned BSIM3v1SwnsubGiven :1; + unsigned BSIM3v1SwnpeakGiven :1; + unsigned BSIM3v1SwngateGiven :1; + unsigned BSIM3v1Swgamma1Given :1; + unsigned BSIM3v1Swgamma2Given :1; + unsigned BSIM3v1SwvbxGiven :1; + unsigned BSIM3v1SwvbmGiven :1; + unsigned BSIM3v1SwxtGiven :1; + unsigned BSIM3v1Swk1Given :1; + unsigned BSIM3v1Swkt1Given :1; + unsigned BSIM3v1Swkt1lGiven :1; + unsigned BSIM3v1Swkt2Given :1; + unsigned BSIM3v1Swk2Given :1; + unsigned BSIM3v1Swk3Given :1; + unsigned BSIM3v1Swk3bGiven :1; + unsigned BSIM3v1Sww0Given :1; + unsigned BSIM3v1SwnlxGiven :1; + unsigned BSIM3v1Swdvt0Given :1; + unsigned BSIM3v1Swdvt1Given :1; + unsigned BSIM3v1Swdvt2Given :1; + unsigned BSIM3v1Swdvt0wGiven :1; + unsigned BSIM3v1Swdvt1wGiven :1; + unsigned BSIM3v1Swdvt2wGiven :1; + unsigned BSIM3v1SwdroutGiven :1; + unsigned BSIM3v1SwdsubGiven :1; + unsigned BSIM3v1Swvth0Given :1; + unsigned BSIM3v1SwuaGiven :1; + unsigned BSIM3v1Swua1Given :1; + unsigned BSIM3v1SwubGiven :1; + unsigned BSIM3v1Swub1Given :1; + unsigned BSIM3v1SwucGiven :1; + unsigned BSIM3v1Swuc1Given :1; + unsigned BSIM3v1Swu0Given :1; + unsigned BSIM3v1SwuteGiven :1; + unsigned BSIM3v1SwvoffGiven :1; + unsigned BSIM3v1SwrdswGiven :1; + unsigned BSIM3v1SwprwgGiven :1; + unsigned BSIM3v1SwprwbGiven :1; + unsigned BSIM3v1SwprtGiven :1; + unsigned BSIM3v1Sweta0Given :1; + unsigned BSIM3v1SwetabGiven :1; + unsigned BSIM3v1SwpclmGiven :1; + unsigned BSIM3v1Swpdibl1Given :1; + unsigned BSIM3v1Swpdibl2Given :1; + unsigned BSIM3v1SwpdiblbGiven :1; + unsigned BSIM3v1Swpscbe1Given :1; + unsigned BSIM3v1Swpscbe2Given :1; + unsigned BSIM3v1SwpvagGiven :1; + unsigned BSIM3v1SwdeltaGiven :1; + unsigned BSIM3v1SwwrGiven :1; + unsigned BSIM3v1SwdwgGiven :1; + unsigned BSIM3v1SwdwbGiven :1; + unsigned BSIM3v1Swb0Given :1; + unsigned BSIM3v1Swb1Given :1; + unsigned BSIM3v1Swalpha0Given :1; + unsigned BSIM3v1Swbeta0Given :1; + + /* CV model */ + unsigned BSIM3v1SwelmGiven :1; + unsigned BSIM3v1SwcgslGiven :1; + unsigned BSIM3v1SwcgdlGiven :1; + unsigned BSIM3v1SwckappaGiven :1; + unsigned BSIM3v1SwcfGiven :1; + unsigned BSIM3v1SwclcGiven :1; + unsigned BSIM3v1SwcleGiven :1; + unsigned BSIM3v1SwvfbcvGiven :1; + + /* Cross-term dependence */ + unsigned BSIM3v1SpcdscGiven :1; + unsigned BSIM3v1SpcdscbGiven :1; + unsigned BSIM3v1SpcdscdGiven :1; + unsigned BSIM3v1SpcitGiven :1; + unsigned BSIM3v1SpnfactorGiven :1; + unsigned BSIM3v1SpxjGiven :1; + unsigned BSIM3v1SpvsatGiven :1; + unsigned BSIM3v1SpatGiven :1; + unsigned BSIM3v1Spa0Given :1; + unsigned BSIM3v1SpagsGiven :1; + unsigned BSIM3v1Spa1Given :1; + unsigned BSIM3v1Spa2Given :1; + unsigned BSIM3v1SpketaGiven :1; + unsigned BSIM3v1SpnsubGiven :1; + unsigned BSIM3v1SpnpeakGiven :1; + unsigned BSIM3v1SpngateGiven :1; + unsigned BSIM3v1Spgamma1Given :1; + unsigned BSIM3v1Spgamma2Given :1; + unsigned BSIM3v1SpvbxGiven :1; + unsigned BSIM3v1SpvbmGiven :1; + unsigned BSIM3v1SpxtGiven :1; + unsigned BSIM3v1Spk1Given :1; + unsigned BSIM3v1Spkt1Given :1; + unsigned BSIM3v1Spkt1lGiven :1; + unsigned BSIM3v1Spkt2Given :1; + unsigned BSIM3v1Spk2Given :1; + unsigned BSIM3v1Spk3Given :1; + unsigned BSIM3v1Spk3bGiven :1; + unsigned BSIM3v1Spw0Given :1; + unsigned BSIM3v1SpnlxGiven :1; + unsigned BSIM3v1Spdvt0Given :1; + unsigned BSIM3v1Spdvt1Given :1; + unsigned BSIM3v1Spdvt2Given :1; + unsigned BSIM3v1Spdvt0wGiven :1; + unsigned BSIM3v1Spdvt1wGiven :1; + unsigned BSIM3v1Spdvt2wGiven :1; + unsigned BSIM3v1SpdroutGiven :1; + unsigned BSIM3v1SpdsubGiven :1; + unsigned BSIM3v1Spvth0Given :1; + unsigned BSIM3v1SpuaGiven :1; + unsigned BSIM3v1Spua1Given :1; + unsigned BSIM3v1SpubGiven :1; + unsigned BSIM3v1Spub1Given :1; + unsigned BSIM3v1SpucGiven :1; + unsigned BSIM3v1Spuc1Given :1; + unsigned BSIM3v1Spu0Given :1; + unsigned BSIM3v1SputeGiven :1; + unsigned BSIM3v1SpvoffGiven :1; + unsigned BSIM3v1SprdswGiven :1; + unsigned BSIM3v1SpprwgGiven :1; + unsigned BSIM3v1SpprwbGiven :1; + unsigned BSIM3v1SpprtGiven :1; + unsigned BSIM3v1Speta0Given :1; + unsigned BSIM3v1SpetabGiven :1; + unsigned BSIM3v1SppclmGiven :1; + unsigned BSIM3v1Sppdibl1Given :1; + unsigned BSIM3v1Sppdibl2Given :1; + unsigned BSIM3v1SppdiblbGiven :1; + unsigned BSIM3v1Sppscbe1Given :1; + unsigned BSIM3v1Sppscbe2Given :1; + unsigned BSIM3v1SppvagGiven :1; + unsigned BSIM3v1SpdeltaGiven :1; + unsigned BSIM3v1SpwrGiven :1; + unsigned BSIM3v1SpdwgGiven :1; + unsigned BSIM3v1SpdwbGiven :1; + unsigned BSIM3v1Spb0Given :1; + unsigned BSIM3v1Spb1Given :1; + unsigned BSIM3v1Spalpha0Given :1; + unsigned BSIM3v1Spbeta0Given :1; + + /* CV model */ + unsigned BSIM3v1SpelmGiven :1; + unsigned BSIM3v1SpcgslGiven :1; + unsigned BSIM3v1SpcgdlGiven :1; + unsigned BSIM3v1SpckappaGiven :1; + unsigned BSIM3v1SpcfGiven :1; + unsigned BSIM3v1SpclcGiven :1; + unsigned BSIM3v1SpcleGiven :1; + unsigned BSIM3v1SpvfbcvGiven :1; + + unsigned BSIM3v1SuseFringeGiven :1; + + unsigned BSIM3v1StnomGiven :1; + unsigned BSIM3v1ScgsoGiven :1; + unsigned BSIM3v1ScgdoGiven :1; + unsigned BSIM3v1ScgboGiven :1; + unsigned BSIM3v1SxpartGiven :1; + unsigned BSIM3v1SsheetResistanceGiven :1; + unsigned BSIM3v1SjctSatCurDensityGiven :1; + unsigned BSIM3v1SjctSidewallSatCurDensityGiven :1; + unsigned BSIM3v1SbulkJctPotentialGiven :1; + unsigned BSIM3v1SbulkJctBotGradingCoeffGiven :1; + unsigned BSIM3v1SsidewallJctPotentialGiven :1; + unsigned BSIM3v1SGatesidewallJctPotentialGiven :1; + unsigned BSIM3v1SbulkJctSideGradingCoeffGiven :1; + unsigned BSIM3v1SunitAreaJctCapGiven :1; + unsigned BSIM3v1SunitLengthSidewallJctCapGiven :1; + unsigned BSIM3v1SbulkJctGateSideGradingCoeffGiven :1; + unsigned BSIM3v1SunitLengthGateSidewallJctCapGiven :1; + unsigned BSIM3v1SjctEmissionCoeffGiven :1; + unsigned BSIM3v1SjctTempExponentGiven :1; + + unsigned BSIM3v1SoxideTrapDensityAGiven :1; + unsigned BSIM3v1SoxideTrapDensityBGiven :1; + unsigned BSIM3v1SoxideTrapDensityCGiven :1; + unsigned BSIM3v1SemGiven :1; + unsigned BSIM3v1SefGiven :1; + unsigned BSIM3v1SafGiven :1; + unsigned BSIM3v1SkfGiven :1; + + unsigned BSIM3v1SLintGiven :1; + unsigned BSIM3v1SLlGiven :1; + unsigned BSIM3v1SLlnGiven :1; + unsigned BSIM3v1SLwGiven :1; + unsigned BSIM3v1SLwnGiven :1; + unsigned BSIM3v1SLwlGiven :1; + unsigned BSIM3v1SLminGiven :1; + unsigned BSIM3v1SLmaxGiven :1; + + unsigned BSIM3v1SWintGiven :1; + unsigned BSIM3v1SWlGiven :1; + unsigned BSIM3v1SWlnGiven :1; + unsigned BSIM3v1SWwGiven :1; + unsigned BSIM3v1SWwnGiven :1; + unsigned BSIM3v1SWwlGiven :1; + unsigned BSIM3v1SWminGiven :1; + unsigned BSIM3v1SWmaxGiven :1; + +} BSIM3v1Smodel; + + +#ifndef NMOS +#define NMOS 1 +#define PMOS -1 +#endif /*NMOS*/ + + +/* device parameters */ +#define BSIM3v1S_W 1 +#define BSIM3v1S_L 2 +#define BSIM3v1S_AS 3 +#define BSIM3v1S_AD 4 +#define BSIM3v1S_PS 5 +#define BSIM3v1S_PD 6 +#define BSIM3v1S_NRS 7 +#define BSIM3v1S_NRD 8 +#define BSIM3v1S_OFF 9 +#define BSIM3v1S_IC_VBS 10 +#define BSIM3v1S_IC_VDS 11 +#define BSIM3v1S_IC_VGS 12 +#define BSIM3v1S_IC 13 +#define BSIM3v1S_NQSMOD 14 +#define BSIM3v1S_M 20 + +/* model parameters */ +#define BSIM3v1S_MOD_CAPMOD 101 +#define BSIM3v1S_MOD_NQSMOD 102 +#define BSIM3v1S_MOD_MOBMOD 103 +#define BSIM3v1S_MOD_NOIMOD 104 + +#define BSIM3v1S_MOD_TOX 105 + +#define BSIM3v1S_MOD_CDSC 106 +#define BSIM3v1S_MOD_CDSCB 107 +#define BSIM3v1S_MOD_CIT 108 +#define BSIM3v1S_MOD_NFACTOR 109 +#define BSIM3v1S_MOD_XJ 110 +#define BSIM3v1S_MOD_VSAT 111 +#define BSIM3v1S_MOD_AT 112 +#define BSIM3v1S_MOD_A0 113 +#define BSIM3v1S_MOD_A1 114 +#define BSIM3v1S_MOD_A2 115 +#define BSIM3v1S_MOD_KETA 116 +#define BSIM3v1S_MOD_NSUB 117 +#define BSIM3v1S_MOD_NPEAK 118 +#define BSIM3v1S_MOD_NGATE 120 +#define BSIM3v1S_MOD_GAMMA1 121 +#define BSIM3v1S_MOD_GAMMA2 122 +#define BSIM3v1S_MOD_VBX 123 +#define BSIM3v1S_MOD_BINUNIT 124 + +#define BSIM3v1S_MOD_VBM 125 + +#define BSIM3v1S_MOD_XT 126 +#define BSIM3v1S_MOD_K1 129 +#define BSIM3v1S_MOD_KT1 130 +#define BSIM3v1S_MOD_KT1L 131 +#define BSIM3v1S_MOD_K2 132 +#define BSIM3v1S_MOD_KT2 133 +#define BSIM3v1S_MOD_K3 134 +#define BSIM3v1S_MOD_K3B 135 +#define BSIM3v1S_MOD_W0 136 +#define BSIM3v1S_MOD_NLX 137 + +#define BSIM3v1S_MOD_DVT0 138 +#define BSIM3v1S_MOD_DVT1 139 +#define BSIM3v1S_MOD_DVT2 140 + +#define BSIM3v1S_MOD_DVT0W 141 +#define BSIM3v1S_MOD_DVT1W 142 +#define BSIM3v1S_MOD_DVT2W 143 + +#define BSIM3v1S_MOD_DROUT 144 +#define BSIM3v1S_MOD_DSUB 145 +#define BSIM3v1S_MOD_VTH0 146 +#define BSIM3v1S_MOD_UA 147 +#define BSIM3v1S_MOD_UA1 148 +#define BSIM3v1S_MOD_UB 149 +#define BSIM3v1S_MOD_UB1 150 +#define BSIM3v1S_MOD_UC 151 +#define BSIM3v1S_MOD_UC1 152 +#define BSIM3v1S_MOD_U0 153 +#define BSIM3v1S_MOD_UTE 154 +#define BSIM3v1S_MOD_VOFF 155 +#define BSIM3v1S_MOD_DELTA 156 +#define BSIM3v1S_MOD_RDSW 157 +#define BSIM3v1S_MOD_PRT 158 +#define BSIM3v1S_MOD_LDD 159 +#define BSIM3v1S_MOD_ETA 160 +#define BSIM3v1S_MOD_ETA0 161 +#define BSIM3v1S_MOD_ETAB 162 +#define BSIM3v1S_MOD_PCLM 163 +#define BSIM3v1S_MOD_PDIBL1 164 +#define BSIM3v1S_MOD_PDIBL2 165 +#define BSIM3v1S_MOD_PSCBE1 166 +#define BSIM3v1S_MOD_PSCBE2 167 +#define BSIM3v1S_MOD_PVAG 168 +#define BSIM3v1S_MOD_WR 169 +#define BSIM3v1S_MOD_DWG 170 +#define BSIM3v1S_MOD_DWB 171 +#define BSIM3v1S_MOD_B0 172 +#define BSIM3v1S_MOD_B1 173 +#define BSIM3v1S_MOD_ALPHA0 174 +#define BSIM3v1S_MOD_BETA0 175 +#define BSIM3v1S_MOD_PDIBLB 178 + +#define BSIM3v1S_MOD_PRWG 179 +#define BSIM3v1S_MOD_PRWB 180 + +#define BSIM3v1S_MOD_CDSCD 181 +#define BSIM3v1S_MOD_AGS 182 + +#define BSIM3v1S_MOD_FRINGE 184 +#define BSIM3v1S_MOD_ELM 185 +#define BSIM3v1S_MOD_CGSL 186 +#define BSIM3v1S_MOD_CGDL 187 +#define BSIM3v1S_MOD_CKAPPA 188 +#define BSIM3v1S_MOD_CF 189 +#define BSIM3v1S_MOD_CLC 190 +#define BSIM3v1S_MOD_CLE 191 +#define BSIM3v1S_MOD_PARAMCHK 192 +#define BSIM3v1S_MOD_VERSION 193 +#define BSIM3v1S_MOD_VFBCV 194 + +#define BSIM3v1S_MOD_HDIF 198 + +/* Length dependence */ +#define BSIM3v1S_MOD_LCDSC 201 +#define BSIM3v1S_MOD_LCDSCB 202 +#define BSIM3v1S_MOD_LCIT 203 +#define BSIM3v1S_MOD_LNFACTOR 204 +#define BSIM3v1S_MOD_LXJ 205 +#define BSIM3v1S_MOD_LVSAT 206 +#define BSIM3v1S_MOD_LAT 207 +#define BSIM3v1S_MOD_LA0 208 +#define BSIM3v1S_MOD_LA1 209 +#define BSIM3v1S_MOD_LA2 210 +#define BSIM3v1S_MOD_LKETA 211 +#define BSIM3v1S_MOD_LNSUB 212 +#define BSIM3v1S_MOD_LNPEAK 213 +#define BSIM3v1S_MOD_LNGATE 215 +#define BSIM3v1S_MOD_LGAMMA1 216 +#define BSIM3v1S_MOD_LGAMMA2 217 +#define BSIM3v1S_MOD_LVBX 218 + +#define BSIM3v1S_MOD_LVBM 220 + +#define BSIM3v1S_MOD_LXT 222 +#define BSIM3v1S_MOD_LK1 225 +#define BSIM3v1S_MOD_LKT1 226 +#define BSIM3v1S_MOD_LKT1L 227 +#define BSIM3v1S_MOD_LK2 228 +#define BSIM3v1S_MOD_LKT2 229 +#define BSIM3v1S_MOD_LK3 230 +#define BSIM3v1S_MOD_LK3B 231 +#define BSIM3v1S_MOD_LW0 232 +#define BSIM3v1S_MOD_LNLX 233 + +#define BSIM3v1S_MOD_LDVT0 234 +#define BSIM3v1S_MOD_LDVT1 235 +#define BSIM3v1S_MOD_LDVT2 236 + +#define BSIM3v1S_MOD_LDVT0W 237 +#define BSIM3v1S_MOD_LDVT1W 238 +#define BSIM3v1S_MOD_LDVT2W 239 + +#define BSIM3v1S_MOD_LDROUT 240 +#define BSIM3v1S_MOD_LDSUB 241 +#define BSIM3v1S_MOD_LVTH0 242 +#define BSIM3v1S_MOD_LUA 243 +#define BSIM3v1S_MOD_LUA1 244 +#define BSIM3v1S_MOD_LUB 245 +#define BSIM3v1S_MOD_LUB1 246 +#define BSIM3v1S_MOD_LUC 247 +#define BSIM3v1S_MOD_LUC1 248 +#define BSIM3v1S_MOD_LU0 249 +#define BSIM3v1S_MOD_LUTE 250 +#define BSIM3v1S_MOD_LVOFF 251 +#define BSIM3v1S_MOD_LDELTA 252 +#define BSIM3v1S_MOD_LRDSW 253 +#define BSIM3v1S_MOD_LPRT 254 +#define BSIM3v1S_MOD_LLDD 255 +#define BSIM3v1S_MOD_LETA 256 +#define BSIM3v1S_MOD_LETA0 257 +#define BSIM3v1S_MOD_LETAB 258 +#define BSIM3v1S_MOD_LPCLM 259 +#define BSIM3v1S_MOD_LPDIBL1 260 +#define BSIM3v1S_MOD_LPDIBL2 261 +#define BSIM3v1S_MOD_LPSCBE1 262 +#define BSIM3v1S_MOD_LPSCBE2 263 +#define BSIM3v1S_MOD_LPVAG 264 +#define BSIM3v1S_MOD_LWR 265 +#define BSIM3v1S_MOD_LDWG 266 +#define BSIM3v1S_MOD_LDWB 267 +#define BSIM3v1S_MOD_LB0 268 +#define BSIM3v1S_MOD_LB1 269 +#define BSIM3v1S_MOD_LALPHA0 270 +#define BSIM3v1S_MOD_LBETA0 271 +#define BSIM3v1S_MOD_LPDIBLB 274 + +#define BSIM3v1S_MOD_LPRWG 275 +#define BSIM3v1S_MOD_LPRWB 276 + +#define BSIM3v1S_MOD_LCDSCD 277 +#define BSIM3v1S_MOD_LAGS 278 + + +#define BSIM3v1S_MOD_LFRINGE 281 +#define BSIM3v1S_MOD_LELM 282 +#define BSIM3v1S_MOD_LCGSL 283 +#define BSIM3v1S_MOD_LCGDL 284 +#define BSIM3v1S_MOD_LCKAPPA 285 +#define BSIM3v1S_MOD_LCF 286 +#define BSIM3v1S_MOD_LCLC 287 +#define BSIM3v1S_MOD_LCLE 288 +#define BSIM3v1S_MOD_LVFBCV 289 + +/* Width dependence */ +#define BSIM3v1S_MOD_WCDSC 301 +#define BSIM3v1S_MOD_WCDSCB 302 +#define BSIM3v1S_MOD_WCIT 303 +#define BSIM3v1S_MOD_WNFACTOR 304 +#define BSIM3v1S_MOD_WXJ 305 +#define BSIM3v1S_MOD_WVSAT 306 +#define BSIM3v1S_MOD_WAT 307 +#define BSIM3v1S_MOD_WA0 308 +#define BSIM3v1S_MOD_WA1 309 +#define BSIM3v1S_MOD_WA2 310 +#define BSIM3v1S_MOD_WKETA 311 +#define BSIM3v1S_MOD_WNSUB 312 +#define BSIM3v1S_MOD_WNPEAK 313 +#define BSIM3v1S_MOD_WNGATE 315 +#define BSIM3v1S_MOD_WGAMMA1 316 +#define BSIM3v1S_MOD_WGAMMA2 317 +#define BSIM3v1S_MOD_WVBX 318 + +#define BSIM3v1S_MOD_WVBM 320 + +#define BSIM3v1S_MOD_WXT 322 +#define BSIM3v1S_MOD_WK1 325 +#define BSIM3v1S_MOD_WKT1 326 +#define BSIM3v1S_MOD_WKT1L 327 +#define BSIM3v1S_MOD_WK2 328 +#define BSIM3v1S_MOD_WKT2 329 +#define BSIM3v1S_MOD_WK3 330 +#define BSIM3v1S_MOD_WK3B 331 +#define BSIM3v1S_MOD_WW0 332 +#define BSIM3v1S_MOD_WNLX 333 + +#define BSIM3v1S_MOD_WDVT0 334 +#define BSIM3v1S_MOD_WDVT1 335 +#define BSIM3v1S_MOD_WDVT2 336 + +#define BSIM3v1S_MOD_WDVT0W 337 +#define BSIM3v1S_MOD_WDVT1W 338 +#define BSIM3v1S_MOD_WDVT2W 339 + +#define BSIM3v1S_MOD_WDROUT 340 +#define BSIM3v1S_MOD_WDSUB 341 +#define BSIM3v1S_MOD_WVTH0 342 +#define BSIM3v1S_MOD_WUA 343 +#define BSIM3v1S_MOD_WUA1 344 +#define BSIM3v1S_MOD_WUB 345 +#define BSIM3v1S_MOD_WUB1 346 +#define BSIM3v1S_MOD_WUC 347 +#define BSIM3v1S_MOD_WUC1 348 +#define BSIM3v1S_MOD_WU0 349 +#define BSIM3v1S_MOD_WUTE 350 +#define BSIM3v1S_MOD_WVOFF 351 +#define BSIM3v1S_MOD_WDELTA 352 +#define BSIM3v1S_MOD_WRDSW 353 +#define BSIM3v1S_MOD_WPRT 354 +#define BSIM3v1S_MOD_WLDD 355 +#define BSIM3v1S_MOD_WETA 356 +#define BSIM3v1S_MOD_WETA0 357 +#define BSIM3v1S_MOD_WETAB 358 +#define BSIM3v1S_MOD_WPCLM 359 +#define BSIM3v1S_MOD_WPDIBL1 360 +#define BSIM3v1S_MOD_WPDIBL2 361 +#define BSIM3v1S_MOD_WPSCBE1 362 +#define BSIM3v1S_MOD_WPSCBE2 363 +#define BSIM3v1S_MOD_WPVAG 364 +#define BSIM3v1S_MOD_WWR 365 +#define BSIM3v1S_MOD_WDWG 366 +#define BSIM3v1S_MOD_WDWB 367 +#define BSIM3v1S_MOD_WB0 368 +#define BSIM3v1S_MOD_WB1 369 +#define BSIM3v1S_MOD_WALPHA0 370 +#define BSIM3v1S_MOD_WBETA0 371 +#define BSIM3v1S_MOD_WPDIBLB 374 + +#define BSIM3v1S_MOD_WPRWG 375 +#define BSIM3v1S_MOD_WPRWB 376 + +#define BSIM3v1S_MOD_WCDSCD 377 +#define BSIM3v1S_MOD_WAGS 378 + + +#define BSIM3v1S_MOD_WFRINGE 381 +#define BSIM3v1S_MOD_WELM 382 +#define BSIM3v1S_MOD_WCGSL 383 +#define BSIM3v1S_MOD_WCGDL 384 +#define BSIM3v1S_MOD_WCKAPPA 385 +#define BSIM3v1S_MOD_WCF 386 +#define BSIM3v1S_MOD_WCLC 387 +#define BSIM3v1S_MOD_WCLE 388 +#define BSIM3v1S_MOD_WVFBCV 389 + +/* Cross-term dependence */ +#define BSIM3v1S_MOD_PCDSC 401 +#define BSIM3v1S_MOD_PCDSCB 402 +#define BSIM3v1S_MOD_PCIT 403 +#define BSIM3v1S_MOD_PNFACTOR 404 +#define BSIM3v1S_MOD_PXJ 405 +#define BSIM3v1S_MOD_PVSAT 406 +#define BSIM3v1S_MOD_PAT 407 +#define BSIM3v1S_MOD_PA0 408 +#define BSIM3v1S_MOD_PA1 409 +#define BSIM3v1S_MOD_PA2 410 +#define BSIM3v1S_MOD_PKETA 411 +#define BSIM3v1S_MOD_PNSUB 412 +#define BSIM3v1S_MOD_PNPEAK 413 +#define BSIM3v1S_MOD_PNGATE 415 +#define BSIM3v1S_MOD_PGAMMA1 416 +#define BSIM3v1S_MOD_PGAMMA2 417 +#define BSIM3v1S_MOD_PVBX 418 + +#define BSIM3v1S_MOD_PVBM 420 + +#define BSIM3v1S_MOD_PXT 422 +#define BSIM3v1S_MOD_PK1 425 +#define BSIM3v1S_MOD_PKT1 426 +#define BSIM3v1S_MOD_PKT1L 427 +#define BSIM3v1S_MOD_PK2 428 +#define BSIM3v1S_MOD_PKT2 429 +#define BSIM3v1S_MOD_PK3 430 +#define BSIM3v1S_MOD_PK3B 431 +#define BSIM3v1S_MOD_PW0 432 +#define BSIM3v1S_MOD_PNLX 433 + +#define BSIM3v1S_MOD_PDVT0 434 +#define BSIM3v1S_MOD_PDVT1 435 +#define BSIM3v1S_MOD_PDVT2 436 + +#define BSIM3v1S_MOD_PDVT0W 437 +#define BSIM3v1S_MOD_PDVT1W 438 +#define BSIM3v1S_MOD_PDVT2W 439 + +#define BSIM3v1S_MOD_PDROUT 440 +#define BSIM3v1S_MOD_PDSUB 441 +#define BSIM3v1S_MOD_PVTH0 442 +#define BSIM3v1S_MOD_PUA 443 +#define BSIM3v1S_MOD_PUA1 444 +#define BSIM3v1S_MOD_PUB 445 +#define BSIM3v1S_MOD_PUB1 446 +#define BSIM3v1S_MOD_PUC 447 +#define BSIM3v1S_MOD_PUC1 448 +#define BSIM3v1S_MOD_PU0 449 +#define BSIM3v1S_MOD_PUTE 450 +#define BSIM3v1S_MOD_PVOFF 451 +#define BSIM3v1S_MOD_PDELTA 452 +#define BSIM3v1S_MOD_PRDSW 453 +#define BSIM3v1S_MOD_PPRT 454 +#define BSIM3v1S_MOD_PLDD 455 +#define BSIM3v1S_MOD_PETA 456 +#define BSIM3v1S_MOD_PETA0 457 +#define BSIM3v1S_MOD_PETAB 458 +#define BSIM3v1S_MOD_PPCLM 459 +#define BSIM3v1S_MOD_PPDIBL1 460 +#define BSIM3v1S_MOD_PPDIBL2 461 +#define BSIM3v1S_MOD_PPSCBE1 462 +#define BSIM3v1S_MOD_PPSCBE2 463 +#define BSIM3v1S_MOD_PPVAG 464 +#define BSIM3v1S_MOD_PWR 465 +#define BSIM3v1S_MOD_PDWG 466 +#define BSIM3v1S_MOD_PDWB 467 +#define BSIM3v1S_MOD_PB0 468 +#define BSIM3v1S_MOD_PB1 469 +#define BSIM3v1S_MOD_PALPHA0 470 +#define BSIM3v1S_MOD_PBETA0 471 +#define BSIM3v1S_MOD_PPDIBLB 474 + +#define BSIM3v1S_MOD_PPRWG 475 +#define BSIM3v1S_MOD_PPRWB 476 + +#define BSIM3v1S_MOD_PCDSCD 477 +#define BSIM3v1S_MOD_PAGS 478 + +#define BSIM3v1S_MOD_PFRINGE 481 +#define BSIM3v1S_MOD_PELM 482 +#define BSIM3v1S_MOD_PCGSL 483 +#define BSIM3v1S_MOD_PCGDL 484 +#define BSIM3v1S_MOD_PCKAPPA 485 +#define BSIM3v1S_MOD_PCF 486 +#define BSIM3v1S_MOD_PCLC 487 +#define BSIM3v1S_MOD_PCLE 488 +#define BSIM3v1S_MOD_PVFBCV 489 + +#define BSIM3v1S_MOD_TNOM 501 +#define BSIM3v1S_MOD_CGSO 502 +#define BSIM3v1S_MOD_CGDO 503 +#define BSIM3v1S_MOD_CGBO 504 +#define BSIM3v1S_MOD_XPART 505 + +#define BSIM3v1S_MOD_RSH 506 +#define BSIM3v1S_MOD_JS 507 +#define BSIM3v1S_MOD_PB 508 +#define BSIM3v1S_MOD_MJ 509 +#define BSIM3v1S_MOD_PBSW 510 +#define BSIM3v1S_MOD_MJSW 511 +#define BSIM3v1S_MOD_CJ 512 +#define BSIM3v1S_MOD_CJSW 513 +#define BSIM3v1S_MOD_NMOS 514 +#define BSIM3v1S_MOD_PMOS 515 + +#define BSIM3v1S_MOD_NOIA 516 +#define BSIM3v1S_MOD_NOIB 517 +#define BSIM3v1S_MOD_NOIC 518 + +#define BSIM3v1S_MOD_LINT 519 +#define BSIM3v1S_MOD_LL 520 +#define BSIM3v1S_MOD_LLN 521 +#define BSIM3v1S_MOD_LW 522 +#define BSIM3v1S_MOD_LWN 523 +#define BSIM3v1S_MOD_LWL 524 +#define BSIM3v1S_MOD_LMIN 525 +#define BSIM3v1S_MOD_LMAX 526 + +#define BSIM3v1S_MOD_WINT 527 +#define BSIM3v1S_MOD_WL 528 +#define BSIM3v1S_MOD_WLN 529 +#define BSIM3v1S_MOD_WW 530 +#define BSIM3v1S_MOD_WWN 531 +#define BSIM3v1S_MOD_WWL 532 +#define BSIM3v1S_MOD_WMIN 533 +#define BSIM3v1S_MOD_WMAX 534 + +#define BSIM3v1S_MOD_DWC 535 +#define BSIM3v1S_MOD_DLC 536 + +#define BSIM3v1S_MOD_EM 537 +#define BSIM3v1S_MOD_EF 538 +#define BSIM3v1S_MOD_AF 539 +#define BSIM3v1S_MOD_KF 540 + +#define BSIM3v1S_MOD_NJ 541 +#define BSIM3v1S_MOD_XTI 542 + +#define BSIM3v1S_MOD_PBSWG 543 +#define BSIM3v1S_MOD_MJSWG 544 +#define BSIM3v1S_MOD_CJSWG 545 +#define BSIM3v1S_MOD_JSW 546 + +/* device questions */ +#define BSIM3v1S_DNODE 601 +#define BSIM3v1S_GNODE 602 +#define BSIM3v1S_SNODE 603 +#define BSIM3v1S_BNODE 604 +#define BSIM3v1S_DNODEPRIME 605 +#define BSIM3v1S_SNODEPRIME 606 +#define BSIM3v1S_VBD 607 +#define BSIM3v1S_VBS 608 +#define BSIM3v1S_VGS 609 +#define BSIM3v1S_VDS 610 +#define BSIM3v1S_CD 611 +#define BSIM3v1S_CBS 612 +#define BSIM3v1S_CBD 613 +#define BSIM3v1S_GM 614 +#define BSIM3v1S_GDS 615 +#define BSIM3v1S_GMBS 616 +#define BSIM3v1S_GBD 617 +#define BSIM3v1S_GBS 618 +#define BSIM3v1S_QB 619 +#define BSIM3v1S_CQB 620 +#define BSIM3v1S_QG 621 +#define BSIM3v1S_CQG 622 +#define BSIM3v1S_QD 623 +#define BSIM3v1S_CQD 624 +#define BSIM3v1S_CGG 625 +#define BSIM3v1S_CGD 626 +#define BSIM3v1S_CGS 627 +#define BSIM3v1S_CBG 628 +#define BSIM3v1S_CAPBD 629 +#define BSIM3v1S_CQBD 630 +#define BSIM3v1S_CAPBS 631 +#define BSIM3v1S_CQBS 632 +#define BSIM3v1S_CDG 633 +#define BSIM3v1S_CDD 634 +#define BSIM3v1S_CDS 635 +#define BSIM3v1S_VON 636 +#define BSIM3v1S_VDSAT 637 +#define BSIM3v1S_QBS 638 +#define BSIM3v1S_QBD 639 +#define BSIM3v1S_SOURCECONDUCT 640 +#define BSIM3v1S_DRAINCONDUCT 641 +#define BSIM3v1S_CBDB 642 +#define BSIM3v1S_CBSB 643 + +#include "bsim3v1sext.h" + +extern void BSIM3v1Sevaluate(double,double,double,BSIM3v1Sinstance*,BSIM3v1Smodel*, + double*,double*,double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, CKTcircuit*); +extern int BSIM3v1Sdebug(BSIM3v1Smodel*, BSIM3v1Sinstance*, CKTcircuit*, int); +extern int BSIM3v1ScheckModel(BSIM3v1Smodel*, BSIM3v1Sinstance*, CKTcircuit*); + + +#endif /*BSIM3v1S*/ + + + + diff --git a/src/spicelib/devices/bsim3v1s/bsim3v1sext.h b/src/spicelib/devices/bsim3v1s/bsim3v1sext.h new file mode 100644 index 000000000..f500290c6 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/bsim3v1sext.h @@ -0,0 +1,30 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1991 JianHui Huang and Min-Chie Jeng. +Modified by Paolo Nenzi 2002 +File: bsim3v1sext.h +**********/ + +extern int BSIM3v1SacLoad(GENmodel *,CKTcircuit*); +extern int BSIM3v1Sask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*); +extern int BSIM3v1SconvTest(GENmodel *,CKTcircuit*); +extern int BSIM3v1Sdelete(GENmodel*,IFuid,GENinstance**); +extern void BSIM3v1Sdestroy(GENmodel**); +extern int BSIM3v1Sgetic(GENmodel*,CKTcircuit*); +extern int BSIM3v1Sload(GENmodel*,CKTcircuit*); +extern int BSIM3v1SmAsk(CKTcircuit*,GENmodel *,int, IFvalue*); +extern int BSIM3v1SmDelete(GENmodel**,IFuid,GENmodel*); +extern int BSIM3v1SmParam(int,IFvalue*,GENmodel*); +extern void BSIM3v1SmosCap(CKTcircuit*, double, double, double, double, + double, double, double, double, double, double, double, + double, double, double, double, double, double, double*, + double*, double*, double*, double*, double*, double*, double*, + double*, double*, double*, double*, double*, double*, double*, + double*); +extern int BSIM3v1Sparam(int,IFvalue*,GENinstance*,IFvalue*); +extern int BSIM3v1SpzLoad(GENmodel*,CKTcircuit*,SPcomplex*); +extern int BSIM3v1Ssetup(SMPmatrix*,GENmodel*,CKTcircuit*,int*); +extern int BSIM3v1Stemp(GENmodel*,CKTcircuit*); +extern int BSIM3v1Strunc(GENmodel*,CKTcircuit*,double*); +extern int BSIM3v1Snoise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*); +extern int BSIM3v1Sunsetup(GENmodel *, CKTcircuit *); diff --git a/src/spicelib/devices/bsim3v1s/bsim3v1sinit.c b/src/spicelib/devices/bsim3v1s/bsim3v1sinit.c new file mode 100644 index 000000000..a13379688 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/bsim3v1sinit.c @@ -0,0 +1,69 @@ +#include + +#include + +#include "bsim3v1sitf.h" +#include "bsim3v1sext.h" +#include "bsim3v1sinit.h" + + +SPICEdev BSIM3v1Sinfo = { + { + "BSIM3v1S", + "Berkeley Short Channel IGFET Model Version-3 (3.1 Serban)", + + &BSIM3v1SnSize, + &BSIM3v1SnSize, + BSIM3v1Snames, + + &BSIM3v1SpTSize, + BSIM3v1SpTable, + + &BSIM3v1SmPTSize, + BSIM3v1SmPTable, + DEV_DEFAULT, + + }, + + DEVparam : BSIM3v1Sparam, + DEVmodParam : BSIM3v1SmParam, + DEVload : BSIM3v1Sload, + DEVsetup : BSIM3v1Ssetup, + DEVunsetup : BSIM3v1Sunsetup, + DEVpzSetup : BSIM3v1Ssetup, + DEVtemperature: BSIM3v1Stemp, + DEVtrunc : BSIM3v1Strunc, + DEVfindBranch : NULL, + DEVacLoad : BSIM3v1SacLoad, + DEVaccept : NULL, + DEVdestroy : BSIM3v1Sdestroy, + DEVmodDelete : BSIM3v1SmDelete, + DEVdelete : BSIM3v1Sdelete, + DEVsetic : BSIM3v1Sgetic, + DEVask : BSIM3v1Sask, + DEVmodAsk : BSIM3v1SmAsk, + DEVpzLoad : BSIM3v1SpzLoad, + DEVconvTest : BSIM3v1SconvTest, + DEVsenSetup : NULL, + DEVsenLoad : NULL, + DEVsenUpdate : NULL, + DEVsenAcLoad : NULL, + DEVsenPrint : NULL, + DEVsenTrunc : NULL, + DEVdisto : NULL, + DEVnoise : BSIM3v1Snoise, +#ifdef CIDER + DEVdump : NULL, + DEVacct : NULL, +#endif + DEVinstSize : &BSIM3v1SiSize, + DEVmodSize : &BSIM3v1SmSize + +}; + + +SPICEdev * +get_bsim3v1s_info(void) +{ + return &BSIM3v1Sinfo; +} diff --git a/src/spicelib/devices/bsim3v1s/bsim3v1sinit.h b/src/spicelib/devices/bsim3v1s/bsim3v1sinit.h new file mode 100644 index 000000000..b9de61fd7 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/bsim3v1sinit.h @@ -0,0 +1,13 @@ +#ifndef _BSIM3v1SINIT_H +#define _BSIM3v1SINIT_H + +extern IFparm BSIM3v1SpTable[ ]; +extern IFparm BSIM3v1SmPTable[ ]; +extern char *BSIM3v1Snames[ ]; +extern int BSIM3v1SpTSize; +extern int BSIM3v1SmPTSize; +extern int BSIM3v1SnSize; +extern int BSIM3v1SiSize; +extern int BSIM3v1SmSize; + +#endif diff --git a/src/spicelib/devices/bsim3v1s/bsim3v1sitf.h b/src/spicelib/devices/bsim3v1s/bsim3v1sitf.h new file mode 100644 index 000000000..9c4795380 --- /dev/null +++ b/src/spicelib/devices/bsim3v1s/bsim3v1sitf.h @@ -0,0 +1,12 @@ +/********** +Copyright 1990 Regents of the University of California. All rights reserved. +Author: 1991 JianHui Huang and Min-Chie Jeng. +Modified by Paolo Nenzi 2002 +File: bsim3v1sitf.h +**********/ +#ifndef DEV_BSIM3v1S +#define DEV_BSIM3v1S + +SPICEdev *get_bsim3v1s_info(void); + +#endif