diff --git a/examples/vdmos/IXTH80N20L-IXTH48P20P-quasisat.cir b/examples/vdmos/IXTH80N20L-IXTH48P20P-quasisat.cir index 5426c7c77..3f529ea81 100644 --- a/examples/vdmos/IXTH80N20L-IXTH48P20P-quasisat.cir +++ b/examples/vdmos/IXTH80N20L-IXTH48P20P-quasisat.cir @@ -4,13 +4,13 @@ VDMOS Test of quasi saturation IXTH80N20L IXTH48P20P * The Quasi-saturation is added for demonstration only, it is not aligned with the data sheets * and is for sure exaggerated, at least for the IXTH80N20L -mn1 d1 g1 s1 s1 IXTH80N20L +mn1 d1 g1 s1 IXTH80N20L vd1 d1 0 1 vg1 g1 0 1 vs1 s1 0 0 -mp2 d2 g2 s2 s2 IXTH48P20P +mp2 d2 g2 s2 IXTH48P20P vd2 d2 0 1 vg2 g2 0 1 @@ -63,3 +63,5 @@ plot dc3.vs2#branch vs2#branch + TT=260e-9 + vq=100 + rq=0.5 $ will be reset by altermod to original 0 + +.end \ No newline at end of file diff --git a/examples/vdmos/IXTP6N100D2-cap.cir b/examples/vdmos/IXTP6N100D2-cap.cir index 8c5b85c77..de49a542b 100644 --- a/examples/vdmos/IXTP6N100D2-cap.cir +++ b/examples/vdmos/IXTP6N100D2-cap.cir @@ -1,13 +1,12 @@ Test of VDMOS gate-source and gate-drain capacitance -m1 d g s s IXTP6N100D2 +m1 d g s IXTP6N100D2 -.MODEL IXTP6N100D2 VDMOS(KP=2.9 RS=0.1 RD=1.3 RG=1 VTO=-2.7 LAMBDA=0.03 CGDMAX=3000p CGDMIN=2p CGS=2915p a=1 TT=1371n IS=2.13E-08 N=1.564 RB=0.0038 m=0.548 Vj=0.1 Cjo=3200pF ksubthres=.1) +.MODEL IXTP6N100D2 VDMOS(KP=2.9 RS=0.1 RD=1.3 RG=1 VTO=-2.7 LAMBDA=0.03 CGDMAX=3000p CGDMIN=2p CGS=2915p a=1 TT=1371n IS=2.13E-08 N=1.564 RB=0.0038 m=0.548 Vj=0.1 Cjo=3200pF ksubthres=0.1) vd d 0 dc 5 vg g 0 pwl (0 -3 1 3) vs s 0 0 -vb b 0 0 .control save all @m1[cgd] @m1[cgs] diff --git a/examples/vdmos/IXTP6N100D2-n-weak-inv.cir b/examples/vdmos/IXTP6N100D2-n-weak-inv.cir index 945ddb593..5f2e6f8f6 100644 --- a/examples/vdmos/IXTP6N100D2-n-weak-inv.cir +++ b/examples/vdmos/IXTP6N100D2-n-weak-inv.cir @@ -1,9 +1,7 @@ VDMOS output -m1 d g s s IXTP6N100D2 -m2 d g s2 s2 IXTP6N100D2_2 - -*.model dmod d is=10n rs=0.05 +m1 d g s IXTP6N100D2 +m2 d g s2 IXTP6N100D2_2 * LTSPICE model parameters *.MODEL IXTP6N100D2 VDMOS(KP=2.9 RS=0.1 RD=1.3 RG=1 VTO=-2.7 LAMBDA=0.03 CGDMAX=3000p CGDMIN=2p CGS=2915p TT=1371n a=1 IS=2.13E-08 N=1.564 RB=0.0038 m=0.548 *Vj=0.1 Cjo=3200pF ksubthres=0.1) diff --git a/examples/vdmos/SUM75N06-09L-vdmos.txt b/examples/vdmos/SUM75N06-09L-vdmos.txt deleted file mode 100644 index 4f7bb77b2..000000000 --- a/examples/vdmos/SUM75N06-09L-vdmos.txt +++ /dev/null @@ -1 +0,0 @@ -.model SUM75N06-09L VDMOS(Rg=1.5 Rd=0m Rs=25m Vto=2.0 Kp=75 Cgdmax=1.2n Cgdmin=150p Cgs=2n Cjo=1.2n Is=1p Rb=0) diff --git a/examples/vdmos/VDMOS-DIO-AC.cir b/examples/vdmos/VDMOS-DIO-AC.cir index 5a993077d..682d1c12c 100644 --- a/examples/vdmos/VDMOS-DIO-AC.cir +++ b/examples/vdmos/VDMOS-DIO-AC.cir @@ -6,8 +6,8 @@ D1 ad kd dio Va ad 0 DC 0.5 AC 1 $ DC -20 Vk kd 0 0 -m1 d g s s IXTP6N100D2 -.MODEL IXTP6N100D2 VDMOS(KP=2.9 RS=0.1 RD=1.3 RG=1 VTO=-2.7 LAMBDA=0.03 CGDMAX=3000p CGDMIN=2p CGS=2915p a=1 TT=1371n IS=2.13E-08 N=1.564 RB=0.0038 m=0.548 Vj=0.1 Cjo=3200pF ksubthres=.1 subslope=43m subshift=-25m) +m1 d g s IXTP6N100D2 +.MODEL IXTP6N100D2 VDMOS(KP=2.9 RS=0.1 RD=1.3 RG=1 VTO=-2.7 LAMBDA=0.03 CGDMAX=3000p CGDMIN=2p CGS=2915p a=1 TT=1371n IS=2.13E-08 N=1.564 RB=0.0038 m=0.548 Vj=0.1 Cjo=3200pF ksubthres=0.1 subslope=43m subshift=-25m) Vd d 0 DC -0.5 AC 1 $ DC 20 Vg g 0 -5 $ transistor is off diff --git a/examples/vdmos/VDMOS-DIO.cir b/examples/vdmos/VDMOS-DIO.cir index cbf9a72fa..9b9d4e173 100644 --- a/examples/vdmos/VDMOS-DIO.cir +++ b/examples/vdmos/VDMOS-DIO.cir @@ -6,8 +6,8 @@ D1 ad kd dio Va ad 0 dc 0 pwl(0 -2 2.5 0.5) Vk kd 0 0 -m1 d g s s IXTP6N100D2 -.MODEL IXTP6N100D2 VDMOS(KP=2.9 RS=0.1 RD=1.3 RG=1 VTO=-2.7 LAMBDA=0.03 CGDMAX=3000p CGDMIN=2p CGS=2915p a=1 TT=1371n IS=2.13E-08 N=1.564 RB=0.0038 m=0.548 Vj=0.1 Cjo=3200pF ksubthres=.1) +m1 d g s IXTP6N100D2 +.MODEL IXTP6N100D2 VDMOS(KP=2.9 RS=0.1 RD=1.3 RG=1 VTO=-2.7 LAMBDA=0.03 CGDMAX=3000p CGDMIN=2p CGS=2915p a=1 TT=1371n IS=2.13E-08 N=1.564 RB=0.0038 m=0.548 Vj=0.1 Cjo=3200pF ksubthres=0.1) Vd d 0 dc 0 pwl(0 2 2.5 -0.5) Vg g 0 -5 $ transistor is off diff --git a/examples/vdmos/inv_vdmos.cir b/examples/vdmos/inv_vdmos.cir index 33f853be1..1fa247c82 100644 --- a/examples/vdmos/inv_vdmos.cir +++ b/examples/vdmos/inv_vdmos.cir @@ -3,8 +3,8 @@ vdd 1 0 5 .subckt inv out in vdd vss -mp1 out in vdd vdd p1 -mn1 out in vss vss n1 +mp1 out in vdd p1 +mn1 out in vss n1 .ends xinv 3 2 1 0 inv @@ -14,16 +14,11 @@ Vin 2 0 Pulse (0 5 10n 10n 10n 140n 300n) .tran 1n 1u .control - run - * current and output in a single plot plot v(2) v(3) - .endc -*.model N1 vdmos $ nmos level=1 -*.model P1 vdmos $ pmos level=1 .model N1 vdmos cgdmin=0.2p cgdmax=1p a=2 cgs=0.5p rg=5k rb=1e9 cjo=0.1p .model P1 vdmos cgdmin=0.2p cgdmax=1p a=2 cgs=0.5p rg=5k rb=1e9 cjo=0.1p pchan .end diff --git a/examples/vdmos/inv_vdmos_dc.cir b/examples/vdmos/inv_vdmos_dc.cir index bf6bb777d..d81d8f544 100644 --- a/examples/vdmos/inv_vdmos_dc.cir +++ b/examples/vdmos/inv_vdmos_dc.cir @@ -4,8 +4,8 @@ vdd 1 0 5 vss 4 0 0 .subckt inv out in vdd vss -mp1 out in vdd vdd p1 -mn1 out in vss vss n1 +mp1 out in vdd p1 +mn1 out in vss n1 .ends xinv 3 2 1 4 inv @@ -15,16 +15,11 @@ Vin 2 0 0 .dc Vin 0 5 0.05 .control - run - * current and output in a single plot plot v(2) v(3) vss#branch - .endc -*.model N1 vdmosn $ nmos level=1 -*.model P1 vdmosp $ pmos level=1 .model N1 vdmos cgdmin=0.2p cgdmax=1p a=2 cgs=0.5p rg=5k .model P1 vdmos cgdmin=0.2p cgdmax=1p a=2 cgs=0.5p rg=5k pchan .end diff --git a/examples/vdmos/lt-ng-mos-models-2012-2018.lib b/examples/vdmos/lt-ng-mos-models-2012-2018.lib deleted file mode 100644 index dc39087e4..000000000 --- a/examples/vdmos/lt-ng-mos-models-2012-2018.lib +++ /dev/null @@ -1,15 +0,0 @@ -* Copyright (c) 2000-2012 Linear Technology Corporation. All rights reserved. -* Modified by Holger Vogt 2018 -* original model parameter sets downloaded on May 25th 2018 from -* http://ltwiki.org/index.php?title=Standard.mos -* Models parameter sets are modified by adding the parameter ksubthres. -* Weak inversion characteristics are aligned by comparing LTSPICE and ngspice simulations, ksubthres is selected to offer best fit. -* Only the modified models are shown below: -* -.model SPA11N60C3 VDMOS(Rg=.86 Vto=4.08 subthres=10m ksubthres=27m Mtriode=.8 Rd=275m Rs=60m Rb=22m Kp=40 A=2.2 Cgdmax=2.7n Cgdmin=10p Cgs=1.5n Cjo=.7n Is=20p mfg=Infineon Vds=650 Ron=340m Qg=45n) -.MODEL IXTP6N100D2 VDMOS(KP=2.9 RS=0.1 RD=1.3 RG=1 VTO=-2.7 LAMBDA=0.03 CGDMAX=3000p CGDMIN=2p CGS=2915p TT=1371n a=1 IS=2.13E-08 N=1.564 RB=0.0038 m=0.548 Vj=0.1 Cjo=3200pF subthres=2.5m ksubthres=39m) -.MODEL IXTH20N50D VDMOS KP=1.9 RS=1m RD=.222 VTO=-1.5 RDS=20E6 Lambda=4m subthres=8m ksubthres=85m CJO=4.9n M=1.5 a=1 CGDMAX=900p CGDMIN=80p CGS=6200p VJ=2.6 RG=10m IS=1.37u N=2 -.model FDB3682 VDMOS(Rg=3 Rd=26.8m Vto=4 subthres=.1 ksubthres=96m mtriode=1.8 Kp=18 Cgdmax=400p Cgdmin=20p A=.5 Cgs=1.25n Cjo=1n M=.6 Is=1.8p Rb=14.2m mfg=Fairchild Vds=100 Ron=32m Qg=18.5n) -.model Si7489DP VDMOS(Rg=3 Rd=31.2m Rs=1m Vto=-2.4 subthres=.03 ksubthres=39m mtriode=2.2 Kp=35 lambda=0.1 Cgdmax=6n Cgdmin=10p A=1 Cgs=4n cjo=200p M=.3 VJ=.9 Is=3.6p Rb=5.5m mfg=Siliconix Vds=-100 Ron=3.3m Qg=106n pchan) -.model HUFA76645 VDMOS(Rg=3 Rd=9.4m Rs=.8m Vto=2 subthres=.01 ksubthres=27.3m mtriode=1 Kp=128 Cgdmax=8n Cgdmin=10p A=.6 Cgs=3n cjo=3.5n M=.55 VJ=.9 Is=3.6p Rb=2.24m mfg=Fairchild Vds=100 Ron=15m Qg=34n) -.model Si7102DN VDMOS(mtriode=2.3 Rg=1.4 vto=.843 subthres=180m ksubthres=31m Rd=1.1m Rs=1.75m Rb=5m Kp=350 Lambda=10m Cgdmin=800p Cgdmax=4.6n A=3 Cgs=3.4n Cjo=1.3n M=0.5 VJ=0.7 Is=2n N=1.05 TT=0 mfg=Vishay Vds=12 Ron=3.8m Qg=41n) diff --git a/examples/vdmos/ro_11_vdmos.cir b/examples/vdmos/ro_11_vdmos.cir index 5bce69b43..322567f13 100644 --- a/examples/vdmos/ro_11_vdmos.cir +++ b/examples/vdmos/ro_11_vdmos.cir @@ -2,10 +2,9 @@ *********** MOS1 or VDMOS ************************************ vdd 1 0 5.0 - .subckt inv out in vdd vss -mp1 out in vdd vdd p1 l=2u w=20u -mn1 out in vss vss n1 l=2u w=10u +mp1 out in vdd p1 l=2u w=20u +mn1 out in vss n1 l=2u w=10u c1 out vss 0.2p .ends @@ -19,7 +18,6 @@ xinv7 9 8 1 0 inv xinv8 10 9 1 0 inv xinv9 2 10 1 0 inv - .model N1 vdmos cgdmin=0.05p cgdmax=0.2p a=1.2 cgs=0.15p rg=10 kp=2e-5 rb=1e7 cjo=1n subslope=0.2 .model P1 vdmos cgdmin=0.05p cgdmax=0.2p a=1.2 cgs=0.15p rg=10 kp=2e-5 rb=1e7 cjo=1n pchan subslope=0.2 @@ -31,7 +29,6 @@ run rusage * current and output in a single plot plot v(6) 1000*(-I(vdd)) ylimit -1 6 - .endc .end diff --git a/examples/vdmos/sum75n06-9L_PS.lib b/examples/vdmos/sum75n06-9L_PS.lib deleted file mode 100644 index 8fcb7b69a..000000000 --- a/examples/vdmos/sum75n06-9L_PS.lib +++ /dev/null @@ -1,32 +0,0 @@ -*August 6, 2007 -*Doc. ID: 76715, S-71542, Rev. B -*File Name: SUM75N06-09L_PS.txt and SUM75N06-09L_PS.lib -*This document is intended as a SPICE modeling guideline and does not -*constitute a commercial product data sheet. Designers should refer to the -*appropriate data sheet of the same number for guaranteed specification -*limits. -.SUBCKT SUM75N06-09L 4 1 2 -M1 3 1 2 2 NMOS W=4276188u L=0.25u -M2 2 1 2 4 PMOS W=4276188u L=0.40u -R1 4 3 RTEMP 42E-4 -CGS 1 2 2000E-12 -DBD 2 4 DBD -******************************************************************* -.MODEL NMOS NMOS ( LEVEL = 3 TOX = 7E-8 -+ RS = 25E-4 RD = 0 NSUB = 1.73E17 -+ KP = 1E-5 UO = 650 -+ VMAX = 0 XJ = 5E-7 KAPPA = 1E-4 -+ ETA = 1E-4 TPG = 1 -+ IS = 0 LD = 0 -+ CGSO = 0 CGDO = 0 CGBO = 0 -+ NFS = 0.8E12 DELTA = 0.1) -******************************************************************* -.MODEL PMOS PMOS ( LEVEL = 3 TOX = 7E-8 -+NSUB = 3.8E16 TPG = -1) -******************************************************************* -.MODEL DBD D (CJO=1200E-12 VJ=0.38 M=0.35 -+RS=0.1 FC=0.5 IS=1E-12 TT=5E-8 N=1 BV=60.2) -******************************************************************* -.MODEL RTEMP RES (TC1=8.2E-3 TC2=5.5E-6) -******************************************************************* -.ENDS diff --git a/examples/vdmos/vdmos-out.cir b/examples/vdmos/vdmos-out.cir index bea95b078..e0433db1c 100644 --- a/examples/vdmos/vdmos-out.cir +++ b/examples/vdmos/vdmos-out.cir @@ -1,17 +1,12 @@ VDMOS output -m1 d g s s n1 +m1 d g s n1 *.model n1 vdmos rb=0.05 is=10n kp=2 bv=12 rd=0.1 .model N1 vdmos vto=1 cgdmin=0.05p cgdmax=0.2p a=1.2 cgs=0.15p rg=10 kp=2e-4 rb=1e4 is=1e-9 bv=12 cjo=1p subslope=0.1 -*d1 s d dmod -*.model dmod d is=10n rs=0.05 vd d 0 1 vg g 0 1 vs s 0 0 -vb b 0 0 - -*.dc vd -2 15 0.05 vg 0 5 1 .control dc vd -2 15 0.05 vg 0 5 1 diff --git a/examples/vdmos/vdmos-out_ir.cir b/examples/vdmos/vdmos-out_ir.cir index f3395b49b..f3e141c10 100644 --- a/examples/vdmos/vdmos-out_ir.cir +++ b/examples/vdmos/vdmos-out_ir.cir @@ -1,16 +1,12 @@ VDMOS output -m1 d g s s IRFZ48Z +m1 d g s IRFZ48Z -.model IRFZ48Z VDMOS ( Rg = 1.77 Vto=4 Rd=1.85m Rs=0.0m Rb=3.75m Kp=25 Cgdmax=2.1n Cgdmin=0.05n Cgs=1.8n Cjo=0.55n Is=2.5p tt=20n mfg=International_Rectifier Vds=55 Ron=8.6m Qg=43n) - -*d1 s d dmod -*.model dmod d is=10n rs=0.05 +.model IRFZ48Z VDMOS (Rg = 1.77 Vto=4 Rd=1.85m Rs=0.0m Rb=3.75m Kp=25 Cgdmax=2.1n Cgdmin=0.05n Cgs=1.8n Cjo=0.55n Is=2.5p tt=20n mfg=International_Rectifier Vds=55 Ron=8.6m Qg=43n) vd d 0 1 vg g 0 1 vs s 0 0 -vb b 0 0 .dc vd -1 15 0.05 vg 3 7 1 diff --git a/examples/vdmos/vdmos-out_ir_mtr.cir b/examples/vdmos/vdmos-out_ir_mtr.cir index ec6ac0a8b..8d9928b5f 100644 --- a/examples/vdmos/vdmos-out_ir_mtr.cir +++ b/examples/vdmos/vdmos-out_ir_mtr.cir @@ -1,11 +1,11 @@ VDMOS output -*m1 d g s b IRFZ48Z -m1 d g s s SQ7002K +*m1 d g s IRFZ48Z +m1 d g s SQ7002K -m2 d g s2 s2 SQ7002K_2 +m2 d g SQ7002K_2 -.model IRFZ48Z VDMOS ( Rg = 1.77 Vto=4 Rd=1.85m Rs=0.0m Rb=3.75m Kp=25 Cgdmax=2.1n Cgdmin=0.05n Cgs=1.8n Cjo=0.55n Is=2.5p tt=20n mfg=International_Rectifier Vds=55 Ron=8.6m Qg=43n) +.model IRFZ48Z VDMOS (Rg = 1.77 Vto=4 Rd=1.85m Rs=0.0m Rb=3.75m Kp=25 Cgdmax=2.1n Cgdmin=0.05n Cgs=1.8n Cjo=0.55n Is=2.5p tt=20n mfg=International_Rectifier Vds=55 Ron=8.6m Qg=43n) .MODEL SQ7002K VDMOS(KP=0.46 RS=0.8751 RG=150 VTO=1.8 rds=50Meg LAMBDA=60m CGDMAX=20p CGDMIN=2p CGS=17p TT=500n a=0.47 IS=3.25n N=1.744 RB=0.118608 m=0.348 Vj=0.23 Cjo=14pF mtriode=1 Vds=60 Ron=1 Qg=0.9n mfg=VISHAY) @@ -14,7 +14,6 @@ m2 d g s2 s2 SQ7002K_2 vd d 0 1 vg g 0 1 vs s 0 0 -vs2 s2 0 0 .dc vd -1 7 0.05 vg 3 7 1 @@ -23,5 +22,4 @@ run plot vs#branch vs2#branch .endc - .end diff --git a/examples/vdmos/vdmos_model_test.cir b/examples/vdmos/vdmos_model_test.cir deleted file mode 100644 index afe874d34..000000000 --- a/examples/vdmos/vdmos_model_test.cir +++ /dev/null @@ -1,10 +0,0 @@ -vdmos model test - -mn1 d s g b IRFZ48Z - -.model IRFZ48Z VDMOS ( Rg = 1.77 Vto=4 Rd=1.85m Rs=0.0m Rb=3.75m Kp=25 Cgdmax=2.1n Cgdmin=0.05n Cgs=1.8n Cjo=0.55n Is=2.5p tt=20n mfg=International_Rectifier Vds=55 Ron=8.6m Qg=43n) - -mn2 d2 s2 g2 b2 SUM110P04_05 -.MODEL SUM110P04_05 VDMOS(KP=80 RS=0.002 RD=0.001 RG=3.0 VTO=-3.3 LAMBDA=0.05 CGDMAX=7n CGDMIN=800p CGS=9n TT=100n a=0.55 IS=1.5E-08 N=1.35 RB=0.001 m=0.774 Vj=1.59 Cjo=3nF PCHAN) - -.end \ No newline at end of file diff --git a/examples/vdmos/vdmosp-out-mtr.cir b/examples/vdmos/vdmosp-out-mtr.cir index 2edbc25c0..a8c1e3424 100644 --- a/examples/vdmos/vdmosp-out-mtr.cir +++ b/examples/vdmos/vdmosp-out-mtr.cir @@ -1,16 +1,13 @@ VDMOS p channel output -m1 d g s s IRF7233 +m1 d g s IRF7233 .model IRF7233 VDMOS(pchan Rg=3 Rd=8m Rs=6m Vto=-1 Kp=70 Cgdmax=2n Cgdmin=.25n Cgs=3.3n Cjo=.98n Is=98p Rb=10m mfg=International_Rectifier Vds=-12 Ron=20m Qg=49n) -*d1 d s dmod -*.model dmod d is=10n rs=0.1 - -m2 d g s2 s2 IRF7233_2 +m2 d g s2 IRF7233_2 .model IRF7233_2 VDMOS(pchan mtriode=2 Rg=3 Rd=8m Rs=6m Vto=-1 Kp=70 Cgdmax=2n Cgdmin=.25n Cgs=3.3n Cjo=.98n Is=98p Rb=10m mfg=International_Rectifier Vds=-12 Ron=20m Qg=49n) -m3 d g s3 s3 IRF7233_3 -.model IRF7233_3 VDMOS(pchan mtriode=2 Rg=3 Rd=8m Rs=6m Vto=-1 Kp=70 Cgdmax=2n Cgdmin=.25n Cgs=3.3n Cjo=.98n Is=98p Rb=10m mfg=International_Rectifier Vds=-12 Ron=20m Qg=49n ksubthres=.1) +m3 d g s3 IRF7233_3 +.model IRF7233_3 VDMOS(pchan mtriode=2 Rg=3 Rd=8m Rs=6m Vto=-1 Kp=70 Cgdmax=2n Cgdmin=.25n Cgs=3.3n Cjo=.98n Is=98p Rb=10m mfg=International_Rectifier Vds=-12 Ron=20m Qg=49n ksubthres=0.1) vd d 0 -5 vg g 0 -5 @@ -18,9 +15,6 @@ vs s 0 0 vs2 s2 0 0 vs3 s3 0 0 - -.dc vd -12 1 0.05 vg 0 -5 -1 - .control dc vd -12 1 0.05 vg 0 -5 -1 plot vs#branch vs2#branch vs3#branch diff --git a/examples/vdmos/vdmosp-out.cir b/examples/vdmos/vdmosp-out.cir index ef0c85608..799ba04ae 100644 --- a/examples/vdmos/vdmosp-out.cir +++ b/examples/vdmos/vdmosp-out.cir @@ -1,14 +1,11 @@ VDMOS p channel output -m1 d g s s p1 +m1 d g s p1 .model p1 vdmos pchan vto=-1.2 is=10n kp=2 bv=-12 rb=1k -*d1 d s dmod -*.model dmod d is=10n rs=0.1 vd d 0 -5 vg g 0 -5 vs s 0 0 -vb b 0 0 .dc vd -15 1 0.1 vg 0 -5 -1