/*.......1.........2.........3.........4.........5.........6.........7.........8
================================================================================
Copyright 1991
Georgia Tech Research Corporation, Atlanta, Ga. 30332
All Rights Reserved

AUTHORS                      

    30 Sept 1991     Jeffrey P. Murray


SUMMARY

    This file contains the interface specification file for the 
    digital d_ram code model.

===============================================================================*/
 
NAME_TABLE:


C_Function_Name:       cm_d_ram
Spice_Model_Name:      d_ram
Description:           "digital random-access memory"


PORT_TABLE:

Port_Name:           data_in                data_out
Description:         "data input line(s)"   "data output line(s)"    
Direction:           in                     out
Default_Type:        d                      d
Allowed_Types:       [d]                    [d]
Vector:               yes                    yes
Vector_Bounds:        [1 -]                  [1 -]
Null_Allowed:        no                     no


PORT_TABLE:

Port_Name:           address                    write_en
Description:         "address input line(s)"    "write enable"
Direction:           in                         in
Default_Type:        d                          d
Allowed_Types:       [d]                        [d]
Vector:               yes                        no
Vector_Bounds:        [1 -]                      -
Null_Allowed:        no                         no


PORT_TABLE:

Port_Name:           select              
Description:         "chip select line(s)" 
Direction:           in           
Default_Type:        d                  
Allowed_Types:       [d]                
Vector:               yes                 
Vector_Bounds:        [1 16]                  
Null_Allowed:        no                


PARAMETER_TABLE:

Parameter_Name:     select_value           	            
Description:        "decimal active value for select line comparison"     
Data_Type:          int              
Default_Value:      1              
Limits:             [0 32767]         
Vector:              no                  
Vector_Bounds:       -                   
Null_Allowed:       yes               


PARAMETER_TABLE:

Parameter_Name:     ic
Description:        "initial bit state @ DC"
Data_Type:          int
Default_Value:      2
Limits:             [0 2]      
Vector:              no
Vector_Bounds:       -
Null_Allowed:       yes


PARAMETER_TABLE:

Parameter_Name:     read_delay         	
Description:        "read delay from address/select/write_en active"
Data_Type:          real                  
Default_Value:      100.0e-9               
Limits:             [1e-12 -]                 
Vector:              no                 
Vector_Bounds:       -                  
Null_Allowed:       yes                  


PARAMETER_TABLE:

Parameter_Name:     data_load                   address_load
Description:        "data_in load value (F)"    "address line load value (F)"
Data_Type:          real                        real      
Default_Value:      1.0e-12                     1.0e-12   
Limits:             -                           -          
Vector:              no                          no   
Vector_Bounds:       -                           -  
Null_Allowed:       yes                         yes       


PARAMETER_TABLE:

Parameter_Name:     select_load             enable_load
Description:        "select load value (F)" "enable line load value (F)"
Data_Type:          real                    real      
Default_Value:      1.0e-12                 1.0e-12   
Limits:             -                       -          
Vector:              no                      no   
Vector_Bounds:       -                       -  
Null_Allowed:       yes                     yes       


