This modified BSIM3V32 code is accelerated using SIMD vector processing.
It is part of the 'simd' branch on the ngspice git repository, based on ngspice version 32+.

Compilation instructions for using the acceleration:
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../configure --enable-modsimd CFLAGS="-O3 -march=native"
make

It is important to set the -march flag, otherwise the compiled code will be much slower.
For target without vector processing, do not use --enable-modsimd.

Usage:
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The new optimized model will be used automatically if you have any BSIM3V32 devices in your simulated circuit.
For other devices models, there will be no speed-up at all.

Notes:
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Compiling for architectures other than x86_64 with AVX2 was not tested.
It should be possible if the target architecture supports vector processing for double precision floating point numbers with vector length of 4 or more.
Autoconf will detect if x84 AVX intrinsics is available. If not available, the code will fall back to a construct using omp simd compiler directives, which is slightly less efficient compared to the intrinsics.

Compiling for vector length of 8 was not tested.
It should be possible if the target architecture supports it.
Change NSIMD value from 4 to 8 in bsim3v32def.h.

Anamosic Ballenegger Design, July 2020
www.anamosic.com
