From fc1f50937cf66eef6a4c8fd2850b50770cafc78a Mon Sep 17 00:00:00 2001 From: gatecat Date: Sat, 21 Feb 2026 19:33:18 +0100 Subject: [PATCH] xilinx: Enable MMCM related pips Signed-off-by: gatecat --- himbaechel/uarch/xilinx/gen/filters.py | 2 -- 1 file changed, 2 deletions(-) diff --git a/himbaechel/uarch/xilinx/gen/filters.py b/himbaechel/uarch/xilinx/gen/filters.py index 20b48ab7..01fd91e4 100644 --- a/himbaechel/uarch/xilinx/gen/filters.py +++ b/himbaechel/uarch/xilinx/gen/filters.py @@ -83,8 +83,6 @@ def include_pip(tile_type, p): return False if tile_type.startswith("HCLK_CMT") and "FREQ_REF" in p.dst_wire().name(): return False - if tile_type.startswith("CMT_TOP_L_LOWER"): - return False if tile_type.startswith("CLK_HROW_TOP"): if "CK_BUFG_CASCO" in p.dst_wire().name() and "CK_BUFG_CASCIN" in p.src_wire().name(): return False