diff --git a/nexus/constids.inc b/nexus/constids.inc
index 19f34523..87224179 100644
--- a/nexus/constids.inc
+++ b/nexus/constids.inc
@@ -548,6 +548,11 @@ X(SELFORCE)
 X(DCSOUT)
 X(DCSMODE)
 
+X(MULTIBOOT)
+X(CONFIG_MULTIBOOT_CORE)
+X(CIBAUTOREBOOT)
+X(MSPIADDR)
+
 X(BEL_TYPE)
 X(BEL_Z)
 X(CEOUTMUX)
diff --git a/nexus/fasm.cc b/nexus/fasm.cc
index a725e7b1..9e0fd2ee 100644
--- a/nexus/fasm.cc
+++ b/nexus/fasm.cc
@@ -530,6 +530,16 @@ struct NexusFasmWriter
         write_cell_muxes(cell);
         pop(2);
     }
+    // Write config for an CONFIG_MULTIBOOT_CORE cell
+    void write_multiboot(const CellInfo *cell)
+    {
+        BelId bel = cell->bel;
+        push_bel(bel);
+        write_enum(cell, "SOURCESEL", "DIS");
+        write_int_vector(stringf("MSPIADDR[31:0]"),
+                         ctx->parse_lattice_param_from_cell(cell, id_MSPIADDR, 32, 0).intval, 32);
+        pop();
+    }
     // Write config for DCC
     void write_dcc(const CellInfo *cell)
     {
@@ -1095,6 +1105,8 @@ struct NexusFasmWriter
                 write_dcc(ci);
             else if (ci->type == id_DCS)
                 write_dcs(ci);
+            else if (ci->type == id_CONFIG_MULTIBOOT_CORE)
+                write_multiboot(ci);
             blank();
         }
         // Handle DCC route-throughs
diff --git a/nexus/pack.cc b/nexus/pack.cc
index 75ceb309..7e1e6f7f 100644
--- a/nexus/pack.cc
+++ b/nexus/pack.cc
@@ -1081,14 +1081,30 @@ struct NexusPacker
                 {id_PDPSC16K, id_PDPSC16K_MODE}, {id_SP16K, id_SP16K_MODE},       {id_FIFO16K, id_FIFO16K_MODE},
                 {id_SP512K, id_SP512K_MODE},     {id_DPSC512K, id_DPSC512K_MODE}, {id_PDPSC512K, id_PDPSC512K_MODE},
                 {id_PLL, id_PLL_CORE},           {id_DPHY, id_DPHY_CORE},
+                {id_MULTIBOOT, id_CONFIG_MULTIBOOT_CORE},
         };
 
+        // extra prefix needed for this primitive for some reason
+        for (auto &cell : ctx->cells) {
+            CellInfo *ci = cell.second.get();
+            if (ci->type != id_MULTIBOOT)
+                continue;
+            std::vector<IdString> pin_names;
+            for (const auto &port : ci->ports) {
+                pin_names.push_back(port.first);
+            }
+            for (auto pin_name : pin_names) {
+                ci->renamePort(pin_name, ctx->idf("CIB%s", pin_name.c_str(ctx)));
+            }
+        }
+
         for (auto &cell : ctx->cells) {
             CellInfo *ci = cell.second.get();
             if (!prim_map.count(ci->type))
                 continue;
             prim_to_core(ci, prim_map.at(ci->type));
         }
+
     }
 
     void add_bus_xform(XFormRule &rule, const std::string &o, const std::string &n, int width, int old_offset = 0,
diff --git a/nexus/pins.cc b/nexus/pins.cc
index 03bddd72..97652c8e 100644
--- a/nexus/pins.cc
+++ b/nexus/pins.cc
@@ -240,7 +240,12 @@ static const dict<IdString, Arch::CellPinsData> base_cell_pin_data = {
                  {id_TXDATA0, PINSTYLE_CIB},
                  {id_TXDATA1, PINSTYLE_CIB},
                  {id_TSDATA0, PINSTYLE_CIB},
-         }}};
+         }},
+        {id_CONFIG_MULTIBOOT_CORE,
+         {
+                 {{}, PINSTYLE_CIB},
+        }},
+};
 } // namespace
 
 void Arch::init_cell_pin_data() { cell_pins_db = base_cell_pin_data; }