From c6eca2405b09878a70569a683d957b8dd86973f3 Mon Sep 17 00:00:00 2001 From: gatecat Date: Wed, 12 Aug 2026 11:20:17 +0200 Subject: [PATCH] gatemate: Also use clock router for RAM clocks Signed-off-by: gatecat --- himbaechel/uarch/gatemate/route_clock.cc | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/himbaechel/uarch/gatemate/route_clock.cc b/himbaechel/uarch/gatemate/route_clock.cc index 4ff79402..c6bceb6a 100644 --- a/himbaechel/uarch/gatemate/route_clock.cc +++ b/himbaechel/uarch/gatemate/route_clock.cc @@ -56,6 +56,11 @@ void GateMateImpl::route_clock() return (ctx->getBelBucketForCellType(port.cell->type) == id_CPE_FF) && port.port.in(id_CLK_INT); }; + auto feeds_ram_or_iosel_clk_port = [&](PortRef &port) { + return (ctx->getBelBucketForCellType(port.cell->type).in(id_RAM_HALF, id_IOSEL)) && + port.port.in(id_CLOCK1, id_CLOCK2, id_CLOCK3, id_CLOCK4); + }; + auto feeds_ddr_port = [&](NetInfo *net, PortRef &port) { return this->ddr_nets.find(net->name) != this->ddr_nets.end() && port.port == id_D0_10; }; @@ -120,7 +125,7 @@ void GateMateImpl::route_clock() auto sink_wires = dict{}; auto sink_wires_to_do = pool{}; for (auto &usr : clk_net->users) { - if (!feeds_clk_port(usr) && !feeds_ddr_port(clk_net, usr)) + if (!feeds_clk_port(usr) && !feeds_ddr_port(clk_net, usr) && !feeds_ram_or_iosel_clk_port(usr)) continue; auto sink_wire = ctx->getNetinfoSinkWire(clk_net, usr, 0);