From c5650c652f98c173f3abf6e8a001898c5ba6ac0d Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Fri, 15 Aug 2025 14:46:42 +0200 Subject: [PATCH] clockToQ --- himbaechel/uarch/gatemate/delay.cc | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/himbaechel/uarch/gatemate/delay.cc b/himbaechel/uarch/gatemate/delay.cc index 66ba363c..f541b57d 100644 --- a/himbaechel/uarch/gatemate/delay.cc +++ b/himbaechel/uarch/gatemate/delay.cc @@ -249,6 +249,15 @@ TimingClockingInfo GateMateImpl::getPortClockingInfo(const CellInfo *cell, IdStr info.clock_port = id_CLK; if (port.in(id_DIN, id_EN, id_SR)) get_setuphold_from_tmg_db(id_timing_del_Setup_D_L, id_timing_del_Hold_D_L, info.setup, info.hold); + if (port.in(id_DOUT)) { + bool is_upper = (cell->bel != BelId()) && (ctx->getBelLocation(cell->bel).z == CPE_LT_U_Z); + get_delay_from_tmg_db(id_timing__SEQ_CLK_FF1_Q, info.clockToQ); + DelayQuad delay = DelayQuad{0}; + get_delay_from_tmg_db(is_upper ? id_timing_Q2_OUT2 : id_timing_Q1_OUT1, delay); + info.clockToQ += delay; + get_delay_from_tmg_db(id_timing_del_CPE_CP_Q, delay); + info.clockToQ += delay; + } } return info;