diff --git a/himbaechel/uarch/gatemate/pack.cc b/himbaechel/uarch/gatemate/pack.cc index bba5cd92..6faee950 100644 --- a/himbaechel/uarch/gatemate/pack.cc +++ b/himbaechel/uarch/gatemate/pack.cc @@ -389,7 +389,7 @@ void GateMateImpl::pack() packer.pack_constants(); packer.cleanup(); packer.pack_io(); - packer.insert_pll_bufg(); + packer.insert_clocking(); packer.sort_bufg(); packer.pack_pll(); packer.pack_bufg(); diff --git a/himbaechel/uarch/gatemate/pack.h b/himbaechel/uarch/gatemate/pack.h index 8736aa6e..b423a17e 100644 --- a/himbaechel/uarch/gatemate/pack.h +++ b/himbaechel/uarch/gatemate/pack.h @@ -54,7 +54,7 @@ struct GateMatePacker void pack_addf(); void pack_bufg(); void sort_bufg(); - void insert_pll_bufg(); + void insert_clocking(); void pack_pll(); void pack_misc(); void pack_mult(); @@ -73,7 +73,6 @@ struct GateMatePacker void rename_param(CellInfo *cell, IdString name, IdString new_name, int width); void dff_to_cpe(CellInfo *dff); void dff_update_params(); - void insert_bufg(CellInfo *cell, IdString port); void disconnect_if_gnd(CellInfo *cell, IdString input); void pll_out(CellInfo *cell, IdString origPort, Loc fixed); diff --git a/himbaechel/uarch/gatemate/pack_clocking.cc b/himbaechel/uarch/gatemate/pack_clocking.cc index 0fb285dc..1639c835 100644 --- a/himbaechel/uarch/gatemate/pack_clocking.cc +++ b/himbaechel/uarch/gatemate/pack_clocking.cc @@ -263,24 +263,7 @@ void GateMatePacker::pll_out(CellInfo *cell, IdString origPort, Loc fixed) } } -void GateMatePacker::insert_bufg(CellInfo *cell, IdString port) -{ - NetInfo *clk = cell->getPort(port); - if (clk) { - if (!(clk->users.entries() == 1 && (*clk->users.begin()).cell->type == id_CC_BUFG)) { - CellInfo *bufg = - create_cell_ptr(id_CC_BUFG, ctx->idf("%s$BUFG_%s", cell->name.c_str(ctx), port.c_str(ctx))); - cell->movePortTo(port, bufg, id_O); - cell->addOutput(port); - NetInfo *net = ctx->createNet(ctx->idf("%s", bufg->name.c_str(ctx))); - cell->connectPort(port, net); - bufg->connectPort(id_I, net); - log_info(" Added BUFG for cell '%s' signal %s\n", cell->name.c_str(ctx), port.c_str(ctx)); - } - } -} - -void GateMatePacker::insert_pll_bufg() +void GateMatePacker::insert_clocking() { log_info("Insert clocking cells..\n"); for (int i = 0; i < uarch->dies; i++) { @@ -293,20 +276,6 @@ void GateMatePacker::insert_pll_bufg() BelId glbout_bel = ctx->getBelByLocation(fixed_loc); ctx->bindBel(glbout_bel, glbout.back(), PlaceStrength::STRENGTH_FIXED); } - log_info("Insert BUFGs for PLLs..\n"); - std::vector cells; - for (auto &cell : ctx->cells) { - CellInfo &ci = *cell.second; - if (!ci.type.in(id_CC_PLL, id_CC_PLL_ADV)) - continue; - cells.push_back(&ci); - } - for (auto &cell : cells) { - insert_bufg(cell, id_CLK0); - insert_bufg(cell, id_CLK90); - insert_bufg(cell, id_CLK180); - insert_bufg(cell, id_CLK270); - } } void GateMatePacker::remove_clocking()