diff --git a/common/kernel/context.h b/common/kernel/context.h index 473d9b21..763414a1 100644 --- a/common/kernel/context.h +++ b/common/kernel/context.h @@ -54,8 +54,6 @@ struct Context : Arch, DeterministicRNG // provided by router1.cc bool checkRoutedDesign() const; - bool getActualRouteDelay(WireId src_wire, WireId dst_wire, delay_t *delay = nullptr, - dict *route = nullptr, bool useEstimate = true); // -------------------------------------------------------------- // Dispatch to the Arch API or pseudo-cell API accordingly diff --git a/common/route/router1.cc b/common/route/router1.cc index 90a77fb9..27f9497c 100644 --- a/common/route/router1.cc +++ b/common/route/router1.cc @@ -1485,11 +1485,4 @@ bool Context::checkRoutedDesign() const return true; } -bool Context::getActualRouteDelay(WireId src_wire, WireId dst_wire, delay_t *delay, dict *route, - bool useEstimate) -{ - // FIXME - return false; -} - NEXTPNR_NAMESPACE_END diff --git a/ice40/delay.cc b/ice40/delay.cc index a00cc259..ca2436a3 100644 --- a/ice40/delay.cc +++ b/ice40/delay.cc @@ -23,81 +23,6 @@ NEXTPNR_NAMESPACE_BEGIN -#define NUM_FUZZ_ROUTES 100000 - -void ice40DelayFuzzerMain(Context *ctx) -{ - std::vector srcWires, dstWires; - - for (int i = 0; i < int(ctx->chip_info->wire_data.size()); i++) { - WireId wire; - wire.index = i; - - switch (ctx->chip_info->wire_data[i].type) { - case WireInfoPOD::WIRE_TYPE_LUTFF_OUT: - srcWires.push_back(wire); - break; - - case WireInfoPOD::WIRE_TYPE_LUTFF_IN_LUT: - dstWires.push_back(wire); - break; - - default: - break; - } - } - - ctx->shuffle(srcWires); - ctx->shuffle(dstWires); - - int index = 0; - int cnt = 0; - - while (cnt < NUM_FUZZ_ROUTES) { - if (index >= int(srcWires.size()) || index >= int(dstWires.size())) { - index = 0; - ctx->shuffle(srcWires); - ctx->shuffle(dstWires); - } - - WireId src = srcWires[index]; - WireId dst = dstWires[index++]; - dict route; - -#if NUM_FUZZ_ROUTES <= 1000 - if (!ctx->getActualRouteDelay(src, dst, nullptr, &route, false)) - continue; -#else - if (!ctx->getActualRouteDelay(src, dst, nullptr, &route, true)) - continue; -#endif - - WireId cursor = dst; - delay_t delay = 0; - - while (1) { - delay += ctx->getWireDelay(cursor).maxDelay(); - - printf("%s %d %d %s %s %d %d\n", cursor == dst ? "dst" : "src", - int(ctx->chip_info->wire_data[cursor.index].x), int(ctx->chip_info->wire_data[cursor.index].y), - ctx->getWireType(cursor).c_str(ctx), ctx->nameOfWire(cursor), int(delay), - int(ctx->estimateDelay(cursor, dst))); - - if (cursor == src) - break; - - PipId pip = route.at(cursor); - delay += ctx->getPipDelay(pip).maxDelay(); - cursor = ctx->getPipSrcWire(pip); - } - - cnt++; - - if (cnt % 100 == 0) - fprintf(stderr, "Fuzzed %d arcs.\n", cnt); - } -} - namespace { struct model_params_t diff --git a/ice40/main.cc b/ice40/main.cc index 82526b8c..7afaa1fb 100644 --- a/ice40/main.cc +++ b/ice40/main.cc @@ -81,7 +81,6 @@ po::options_description Ice40CommandHandler::getArchOptions() specific.add_options()("no-promote-globals", "disable all global promotion"); specific.add_options()("no-promote-ce", "disable promotion of 'ce' globals"); specific.add_options()("opt-timing", "run post-placement timing optimisation pass (experimental)"); - specific.add_options()("tmfuzz", "run path delay estimate fuzzer"); specific.add_options()("pcf-allow-unconstrained", "don't require PCF to constrain all IO"); return specific; @@ -117,9 +116,6 @@ void Ice40CommandHandler::customBitstream(Context *ctx) void Ice40CommandHandler::setupArchContext(Context *ctx) { - if (vm.count("tmfuzz")) - ice40DelayFuzzerMain(ctx); - if (vm.count("read")) { std::string filename = vm["read"].as(); auto f = open_ifstream_and_log_error(filename, "ASC file");