diff --git a/himbaechel/uarch/gatemate/pack.cc b/himbaechel/uarch/gatemate/pack.cc
index 90981b4d..62038726 100644
--- a/himbaechel/uarch/gatemate/pack.cc
+++ b/himbaechel/uarch/gatemate/pack.cc
@@ -44,7 +44,7 @@ void GateMatePacker::disconnect_if_gnd(CellInfo *cell, IdString input)
     NetInfo *net = cell->getPort(input);
     if (!net)
         return;
-    if (net->name.in(ctx->id("$PACKER_GND"))) {
+    if (net == net_PACKER_GND) {
         cell->disconnectPort(input);
     }
 }
@@ -154,7 +154,7 @@ void GateMatePacker::optimize_lut()
             val = val << 2 | val;
         switch (val) {
         case LUT_ZERO: // constant 0
-            move_connections(o_net, gnd_net);
+            move_connections(o_net, net_PACKER_GND);
             count_cell(ci);
             break;
         case LUT_D0: // propagate
@@ -166,7 +166,7 @@ void GateMatePacker::optimize_lut()
             count_cell(ci);
             break;
         case LUT_ONE: // constant 1
-            move_connections(o_net, vcc_net);
+            move_connections(o_net, net_PACKER_VCC);
             count_cell(ci);
             break;
         default:
@@ -188,29 +188,29 @@ void GateMatePacker::optimize_mx()
             continue;
         }
         if (ci.type == id_CC_MX2) {
-            if (ci.getPort(id_S0) == gnd_net) {
+            if (ci.getPort(id_S0) == net_PACKER_GND) {
                 move_connections(y_net, ci.getPort(id_D0));
                 count_cell(ci);
                 continue;
-            } else if (ci.getPort(id_S0) == vcc_net) {
+            } else if (ci.getPort(id_S0) == net_PACKER_VCC) {
                 move_connections(y_net, ci.getPort(id_D1));
                 count_cell(ci);
                 continue;
             }
         } else {
-            if ((ci.getPort(id_S1) == gnd_net) && (ci.getPort(id_S0) == gnd_net)) {
+            if ((ci.getPort(id_S1) == net_PACKER_GND) && (ci.getPort(id_S0) == net_PACKER_GND)) {
                 move_connections(y_net, ci.getPort(id_D0));
                 count_cell(ci);
                 continue;
-            } else if ((ci.getPort(id_S1) == gnd_net) && (ci.getPort(id_S0) == vcc_net)) {
+            } else if ((ci.getPort(id_S1) == net_PACKER_GND) && (ci.getPort(id_S0) == net_PACKER_VCC)) {
                 move_connections(y_net, ci.getPort(id_D1));
                 count_cell(ci);
                 continue;
-            } else if ((ci.getPort(id_S1) == vcc_net) && (ci.getPort(id_S0) == gnd_net)) {
+            } else if ((ci.getPort(id_S1) == net_PACKER_VCC) && (ci.getPort(id_S0) == net_PACKER_GND)) {
                 move_connections(y_net, ci.getPort(id_D2));
                 count_cell(ci);
                 continue;
-            } else if ((ci.getPort(id_S1) == vcc_net) && (ci.getPort(id_S0) == vcc_net)) {
+            } else if ((ci.getPort(id_S1) == net_PACKER_VCC) && (ci.getPort(id_S0) == net_PACKER_VCC)) {
                 move_connections(y_net, ci.getPort(id_D3));
                 count_cell(ci);
                 continue;
@@ -242,12 +242,12 @@ void GateMatePacker::optimize_ff()
         bool ff_init_value = ff_init & 1;
 
         if (cpe_res == 0) { // RES is always ON
-            move_connections(q_net, gnd_net);
+            move_connections(q_net, net_PACKER_GND);
             count_cell(ci);
             continue;
         }
         if (cpe_set == 0) { // SET is always ON
-            move_connections(q_net, vcc_net);
+            move_connections(q_net, net_PACKER_VCC);
             count_cell(ci);
             continue;
         }
@@ -256,7 +256,8 @@ void GateMatePacker::optimize_ff()
             if ((cpe_en == 0 || cpe_clk == 0) && ci.getPort(id_SR) == nullptr) {
                 // Only when there is no SR signal
                 // EN always OFF (never loads) or CLK never triggers
-                move_connections(q_net, ff_has_init ? (ff_init_value ? vcc_net : gnd_net) : gnd_net);
+                move_connections(q_net,
+                                 ff_has_init ? (ff_init_value ? net_PACKER_VCC : net_PACKER_GND) : net_PACKER_GND);
                 count_cell(ci);
                 continue;
             }
diff --git a/himbaechel/uarch/gatemate/pack.h b/himbaechel/uarch/gatemate/pack.h
index 403eaa3c..53cbb005 100644
--- a/himbaechel/uarch/gatemate/pack.h
+++ b/himbaechel/uarch/gatemate/pack.h
@@ -112,8 +112,8 @@ struct GateMatePacker
     GateMateImpl *uarch;
 
     HimbaechelHelpers h;
-    NetInfo *vcc_net;
-    NetInfo *gnd_net;
+    NetInfo *net_PACKER_VCC;
+    NetInfo *net_PACKER_GND;
     int count;
     std::map<IdString, int> count_per_type;
 };
diff --git a/himbaechel/uarch/gatemate/pack_bram.cc b/himbaechel/uarch/gatemate/pack_bram.cc
index da4a3781..adf05ad4 100644
--- a/himbaechel/uarch/gatemate/pack_bram.cc
+++ b/himbaechel/uarch/gatemate/pack_bram.cc
@@ -31,10 +31,10 @@ uint8_t GateMatePacker::ram_ctrl_signal(CellInfo *cell, IdString port, bool alt)
 {
     NetInfo *net = cell->getPort(port);
     if (net) {
-        if (net->name == ctx->id("$PACKER_GND")) {
+        if (net == net_PACKER_GND) {
             cell->disconnectPort(port);
             return 0b00000011;
-        } else if (net->name == ctx->id("$PACKER_VCC")) {
+        } else if (net == net_PACKER_VCC) {
             cell->disconnectPort(port);
             return 0b00010011;
         } else {
diff --git a/himbaechel/uarch/gatemate/pack_clocking.cc b/himbaechel/uarch/gatemate/pack_clocking.cc
index 4b68cd97..41f510e0 100644
--- a/himbaechel/uarch/gatemate/pack_clocking.cc
+++ b/himbaechel/uarch/gatemate/pack_clocking.cc
@@ -572,11 +572,11 @@ void GateMatePacker::pack_pll()
                     out_clk_max = out_clk;
             }
             NetInfo *select_net = ci.getPort(id_USR_SEL_A_B);
-            if (select_net == nullptr || select_net->name == ctx->id("$PACKER_GND")) {
+            if (select_net == nullptr || select_net == net_PACKER_GND) {
                 ci.params[ctx->id("SET_SEL")] = Property(0b0, 1);
                 ci.params[ctx->id("USR_SET")] = Property(0b0, 1);
                 ci.disconnectPort(id_USR_SEL_A_B);
-            } else if (select_net->name == ctx->id("$PACKER_VCC")) {
+            } else if (select_net == net_PACKER_VCC) {
                 ci.params[ctx->id("SET_SEL")] = Property(0b1, 1);
                 ci.params[ctx->id("USR_SET")] = Property(0b0, 1);
                 ci.disconnectPort(id_USR_SEL_A_B);
diff --git a/himbaechel/uarch/gatemate/pack_cpe.cc b/himbaechel/uarch/gatemate/pack_cpe.cc
index 37a92756..bef45d38 100644
--- a/himbaechel/uarch/gatemate/pack_cpe.cc
+++ b/himbaechel/uarch/gatemate/pack_cpe.cc
@@ -37,10 +37,10 @@ void GateMatePacker::dff_to_cpe(CellInfo *dff)
         NetInfo *g_net = dff->getPort(id_G);
         invert = bool_or_default(dff->params, id_G_INV, 0);
         if (g_net) {
-            if (g_net->name == ctx->id("$PACKER_GND")) {
+            if (g_net == net_PACKER_GND) {
                 dff->params[id_C_CPE_CLK] = Property(invert ? 0b11 : 0b00, 2);
                 dff->disconnectPort(id_G);
-            } else if (g_net->name == ctx->id("$PACKER_VCC")) {
+            } else if (g_net == net_PACKER_VCC) {
                 dff->params[id_C_CPE_CLK] = Property(invert ? 0b00 : 0b11, 2);
                 dff->disconnectPort(id_G);
             } else {
@@ -58,10 +58,10 @@ void GateMatePacker::dff_to_cpe(CellInfo *dff)
         NetInfo *en_net = dff->getPort(id_EN);
         bool invert = bool_or_default(dff->params, id_EN_INV, 0);
         if (en_net) {
-            if (en_net->name == ctx->id("$PACKER_GND")) {
+            if (en_net == net_PACKER_GND) {
                 dff->params[id_C_CPE_EN] = Property(invert ? 0b11 : 0b00, 2);
                 dff->disconnectPort(id_EN);
-            } else if (en_net->name == ctx->id("$PACKER_VCC")) {
+            } else if (en_net == net_PACKER_VCC) {
                 dff->params[id_C_CPE_EN] = Property(invert ? 0b00 : 0b11, 2);
                 dff->disconnectPort(id_EN);
             } else {
@@ -75,10 +75,10 @@ void GateMatePacker::dff_to_cpe(CellInfo *dff)
         NetInfo *clk_net = dff->getPort(id_CLK);
         invert = bool_or_default(dff->params, id_CLK_INV, 0);
         if (clk_net) {
-            if (clk_net->name == ctx->id("$PACKER_GND")) {
+            if (clk_net == net_PACKER_GND) {
                 dff->params[id_C_CPE_CLK] = Property(invert ? 0b11 : 0b00, 2);
                 dff->disconnectPort(id_CLK);
-            } else if (clk_net->name == ctx->id("$PACKER_VCC")) {
+            } else if (clk_net == net_PACKER_VCC) {
                 dff->params[id_C_CPE_CLK] = Property(invert ? 0b00 : 0b11, 2);
                 dff->disconnectPort(id_CLK);
             } else {
@@ -94,8 +94,8 @@ void GateMatePacker::dff_to_cpe(CellInfo *dff)
     invert = bool_or_default(dff->params, id_SR_INV, 0);
     bool sr_val = bool_or_default(dff->params, id_SR_VAL, 0);
     if (sr_net) {
-        if (sr_net->name.in(ctx->id("$PACKER_GND"), ctx->id("$PACKER_VCC"))) {
-            bool sr_signal = sr_net->name == ctx->id("$PACKER_VCC");
+        if (sr_net == net_PACKER_VCC || sr_net == net_PACKER_GND) {
+            bool sr_signal = sr_net == net_PACKER_VCC;
             if (sr_signal ^ invert) {
                 if (sr_val) {
                     dff->params[id_C_CPE_RES] = Property(0b11, 2);
@@ -266,9 +266,10 @@ void GateMatePacker::pack_cpe()
         for (int i = 0; i < 4; i++) {
             NetInfo *net = ci.getPort(ctx->idf("D%d", i));
             if (net) {
-                if (net->name.in(ctx->id("$PACKER_GND"), ctx->id("$PACKER_VCC"))) {
-                    if (net->name == ctx->id("$PACKER_VCC"))
-                        invert |= 1 << i;
+                if (net == net_PACKER_GND) {
+                    ci.disconnectPort(ctx->idf("D%d", i));
+                } else if (net == net_PACKER_VCC) {
+                    invert |= 1 << i;
                     ci.disconnectPort(ctx->idf("D%d", i));
                 } else {
                     select |= 1 << i;
@@ -330,10 +331,10 @@ void GateMatePacker::pack_cpe()
         ci.constr_children.push_back(lt);
         ci.renamePort(id_Q, id_DOUT);
         NetInfo *d_net = ci.getPort(id_D);
-        if (d_net->name == ctx->id("$PACKER_GND")) {
+        if (d_net == net_PACKER_GND) {
             lt->params[id_INIT_L00] = Property(LUT_ZERO, 4);
             ci.disconnectPort(id_D);
-        } else if (d_net->name == ctx->id("$PACKER_VCC")) {
+        } else if (d_net == net_PACKER_VCC) {
             lt->params[id_INIT_L00] = Property(LUT_ONE, 4);
             ci.disconnectPort(id_D);
         } else {
@@ -455,10 +456,10 @@ void GateMatePacker::pack_addf()
     auto merge_input = [&](CellInfo *cell, CellInfo *target, IdString port, IdString config, IdString in1,
                            IdString in2) {
         NetInfo *net = cell->getPort(port);
-        if (net->name == ctx->id("$PACKER_GND")) {
+        if (net == net_PACKER_GND) {
             target->params[config] = Property(LUT_ZERO, 4);
             cell->disconnectPort(port);
-        } else if (net->name == ctx->id("$PACKER_VCC")) {
+        } else if (net == net_PACKER_VCC) {
             target->params[config] = Property(LUT_ONE, 4);
             cell->disconnectPort(port);
         } else {
@@ -547,10 +548,10 @@ void GateMatePacker::pack_addf()
         ci_cplines->connectPort(id_OUT1, ci_out_conn);
 
         NetInfo *ci_net = root->getPort(id_CI);
-        if (ci_net->name == ctx->id("$PACKER_GND")) {
+        if (ci_net == net_PACKER_GND) {
             ci_lower->params[id_INIT_L00] = Property(LUT_ZERO, 4);
             root->disconnectPort(id_CI);
-        } else if (ci_net->name == ctx->id("$PACKER_VCC")) {
+        } else if (ci_net == net_PACKER_VCC) {
             ci_lower->params[id_INIT_L00] = Property(LUT_ONE, 4);
             root->disconnectPort(id_CI);
         } else {
@@ -682,8 +683,8 @@ void GateMatePacker::pack_constants()
     const dict<IdString, Property> gnd_params = {{id_INIT_L10, Property(LUT_ZERO, 4)}};
 
     h.replace_constants(CellTypePort(id_CPE_L2T4, id_OUT), CellTypePort(id_CPE_L2T4, id_OUT), vcc_params, gnd_params);
-    vcc_net = ctx->nets.at(ctx->id("$PACKER_VCC")).get();
-    gnd_net = ctx->nets.at(ctx->id("$PACKER_GND")).get();
+    net_PACKER_VCC = ctx->nets.at(ctx->id("$PACKER_VCC")).get();
+    net_PACKER_GND = ctx->nets.at(ctx->id("$PACKER_GND")).get();
 }
 
 void GateMatePacker::remove_constants()
@@ -779,10 +780,10 @@ std::pair<CellInfo *, CellInfo *> GateMatePacker::move_ram_o(CellInfo *cell, IdS
             BelId b = ctx->getBelByLocation(Loc(cpe_loc.x, cpe_loc.y, cpe_loc.z - 4));
             ctx->bindBel(b, cpe_half, PlaceStrength::STRENGTH_FIXED);
         }
-        if (net->name == ctx->id("$PACKER_GND")) {
+        if (net == net_PACKER_GND) {
             cpe_half->params[id_INIT_L00] = Property(LUT_ZERO, 4);
             cell->disconnectPort(origPort);
-        } else if (net->name == ctx->id("$PACKER_VCC")) {
+        } else if (net == net_PACKER_VCC) {
             cpe_half->params[id_INIT_L00] = Property(LUT_ONE, 4);
             cell->disconnectPort(origPort);
         } else {
@@ -834,10 +835,10 @@ std::pair<CellInfo *, CellInfo *> GateMatePacker::move_ram_io(CellInfo *cell, Id
     }
 
     if (o_net) {
-        if (o_net->name == ctx->id("$PACKER_GND")) {
+        if (o_net == net_PACKER_GND) {
             cpe_half->params[id_INIT_L00] = Property(LUT_ZERO, 4);
             cell->disconnectPort(oPort);
-        } else if (o_net->name == ctx->id("$PACKER_VCC")) {
+        } else if (o_net == net_PACKER_VCC) {
             cpe_half->params[id_INIT_L00] = Property(LUT_ONE, 4);
             cell->disconnectPort(oPort);
         } else {
diff --git a/himbaechel/uarch/gatemate/pack_io.cc b/himbaechel/uarch/gatemate/pack_io.cc
index 745e1252..1f1556b6 100644
--- a/himbaechel/uarch/gatemate/pack_io.cc
+++ b/himbaechel/uarch/gatemate/pack_io.cc
@@ -318,6 +318,7 @@ void GateMatePacker::pack_io()
 
 void GateMatePacker::pack_io_sel()
 {
+    log_info("Packing IO SELs..\n");
     std::vector<CellInfo *> cells;
     for (auto &cell : ctx->cells) {
         CellInfo &ci = *cell.second;
@@ -332,9 +333,9 @@ void GateMatePacker::pack_io_sel()
     auto set_out_clk = [&](CellInfo *cell, CellInfo *target) -> bool {
         NetInfo *clk_net = cell->getPort(id_CLK);
         if (clk_net) {
-            if (clk_net->name == ctx->id("$PACKER_GND")) {
+            if (clk_net == net_PACKER_GND) {
                 cell->disconnectPort(id_CLK);
-            } else if (clk_net->name == ctx->id("$PACKER_VCC")) {
+            } else if (clk_net == net_PACKER_VCC) {
                 cell->disconnectPort(id_CLK);
             } else {
                 if (!global_signals.count(clk_net)) {
@@ -353,9 +354,9 @@ void GateMatePacker::pack_io_sel()
     auto set_in_clk = [&](CellInfo *cell, CellInfo *target) {
         NetInfo *clk_net = cell->getPort(id_CLK);
         if (clk_net) {
-            if (clk_net->name == ctx->id("$PACKER_GND")) {
+            if (clk_net == net_PACKER_GND) {
                 cell->disconnectPort(id_CLK);
-            } else if (clk_net->name == ctx->id("$PACKER_VCC")) {
+            } else if (clk_net == net_PACKER_VCC) {
                 cell->disconnectPort(id_CLK);
             } else {
                 if (!global_signals.count(clk_net)) {
@@ -440,9 +441,11 @@ void GateMatePacker::pack_io_sel()
         NetInfo *do_net = ci.getPort(id_A);
         bool use_custom_clock = false;
         if (do_net) {
-            if (do_net->name.in(ctx->id("$PACKER_GND"), ctx->id("$PACKER_VCC"))) {
-                ci.params[id_OUT23_14_SEL] =
-                        Property(do_net->name == ctx->id("$PACKER_VCC") ? Property::State::S1 : Property::State::S0);
+            if (do_net == net_PACKER_GND) {
+                ci.params[id_OUT23_14_SEL] = Property(Property::State::S0);
+                ci.disconnectPort(id_A);
+            } else if (do_net == net_PACKER_VCC) {
+                ci.params[id_OUT23_14_SEL] = Property(Property::State::S1);
                 ci.disconnectPort(id_A);
             } else {
                 ci.params[id_OUT_SIGNAL] = Property(Property::State::S1);
@@ -534,11 +537,11 @@ bool GateMatePacker::is_gpio_valid_dff(CellInfo *dff)
     NetInfo *en_net = dff->getPort(id_EN);
     bool invert = bool_or_default(dff->params, id_EN_INV, 0);
     if (en_net) {
-        if (en_net->name == ctx->id("$PACKER_GND")) {
+        if (en_net == net_PACKER_GND) {
             if (!invert)
                 return false;
             dff->disconnectPort(id_EN);
-        } else if (en_net->name == ctx->id("$PACKER_VCC")) {
+        } else if (en_net == net_PACKER_VCC) {
             if (invert)
                 return false;
             dff->disconnectPort(id_EN);
@@ -551,8 +554,8 @@ bool GateMatePacker::is_gpio_valid_dff(CellInfo *dff)
     NetInfo *sr_net = dff->getPort(id_SR);
     invert = bool_or_default(dff->params, id_SR_INV, 0);
     if (sr_net) {
-        if (sr_net->name.in(ctx->id("$PACKER_GND"), ctx->id("$PACKER_VCC"))) {
-            bool sr_signal = sr_net->name == ctx->id("$PACKER_VCC");
+        if ((sr_net == net_PACKER_GND) || (sr_net == net_PACKER_VCC)) {
+            bool sr_signal = sr_net == net_PACKER_VCC;
             if (sr_signal ^ invert)
                 log_error("Currently unsupported DFF configuration for '%s'\n.", dff->name.c_str(ctx));
             dff->disconnectPort(id_SR);
@@ -566,9 +569,9 @@ bool GateMatePacker::is_gpio_valid_dff(CellInfo *dff)
     // Sanity check for CLK signal, that it must exist
     NetInfo *clk_net = dff->getPort(id_CLK);
     if (clk_net) {
-        if (clk_net->name == ctx->id("$PACKER_GND")) {
+        if (clk_net == net_PACKER_GND) {
             return false;
-        } else if (clk_net->name == ctx->id("$PACKER_VCC")) {
+        } else if (clk_net == net_PACKER_VCC) {
             return false;
         }
     } else {