From 52254dca35b9087ec1d1f5985db5dce1fbad8a11 Mon Sep 17 00:00:00 2001
From: YRabbit <rabbit@yrabbit.cyou>
Date: Wed, 27 Aug 2025 15:21:38 +1000
Subject: [PATCH] Gowin. Add ROM16 primitive. (#1542)

The LUTRAM mode is added to all supported chips at once.

This is essentially an alias for LUT4, so the packaging is also moved
before searching for LUT-DFF pairs for possible optimization.

In addition to being the only LUTRAM mode in the GW5A series, the
addition of ROM16 eliminates the need to manually rename the primitive
and its pins when working with files generated by Gowin IDE - a similar
situation occurred with INV, which is essentially LUT1.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
---
 himbaechel/uarch/gowin/constids.inc |  1 +
 himbaechel/uarch/gowin/gowin.h      |  5 ++++-
 himbaechel/uarch/gowin/pack.cc      | 25 ++++++++++++++++++++-----
 3 files changed, 25 insertions(+), 6 deletions(-)

diff --git a/himbaechel/uarch/gowin/constids.inc b/himbaechel/uarch/gowin/constids.inc
index 1ec0f4d0..1beee880 100644
--- a/himbaechel/uarch/gowin/constids.inc
+++ b/himbaechel/uarch/gowin/constids.inc
@@ -893,6 +893,7 @@ X(DFFNC)
 X(DFFNCE)
 
 // Shadow RAM
+X(ROM16)
 X(RAM16)
 X(RAMW)
 X(RAM16SDP4)
diff --git a/himbaechel/uarch/gowin/gowin.h b/himbaechel/uarch/gowin/gowin.h
index 95bd05ca..1a79243c 100644
--- a/himbaechel/uarch/gowin/gowin.h
+++ b/himbaechel/uarch/gowin/gowin.h
@@ -55,7 +55,10 @@ inline bool type_is_iologici(IdString cell_type)
 inline bool is_iologici(const CellInfo *cell) { return type_is_iologici(cell->type); }
 
 // Return true if a cell is a SSRAM
-inline bool type_is_ssram(IdString cell_type) { return cell_type.in(id_RAM16SDP1, id_RAM16SDP2, id_RAM16SDP4); }
+inline bool type_is_ssram(IdString cell_type)
+{
+    return cell_type.in(id_RAM16SDP1, id_RAM16SDP2, id_RAM16SDP4, id_ROM16);
+}
 inline bool is_ssram(const CellInfo *cell) { return type_is_ssram(cell->type); }
 
 // Return true if a cell is a BSRAM
diff --git a/himbaechel/uarch/gowin/pack.cc b/himbaechel/uarch/gowin/pack.cc
index 8acfa57a..a052a7b1 100644
--- a/himbaechel/uarch/gowin/pack.cc
+++ b/himbaechel/uarch/gowin/pack.cc
@@ -2118,11 +2118,12 @@ struct GowinPacker
         return lut_ci;
     }
 
-    void pack_ram16sdp4(void)
+    void pack_ssram(void)
     {
         std::vector<std::unique_ptr<CellInfo>> new_cells;
+        std::vector<IdString> cells_to_remove;
 
-        log_info("Pack RAMs...\n");
+        log_info("Pack SSRAMs...\n");
         for (auto &cell : ctx->cells) {
             auto ci = cell.second.get();
             if (ci->cluster != ClusterId()) {
@@ -2130,6 +2131,17 @@ struct GowinPacker
             }
 
             if (is_ssram(ci)) {
+                if (ci->type == id_ROM16) {
+                    new_cells.push_back(ssram_make_lut(ctx, ci, 0));
+                    CellInfo *lut_ci = new_cells.back().get();
+                    // inputs
+                    ci->movePortBusTo(id_AD, 0, true, lut_ci, id_I, 0, false, 4);
+                    // output
+                    ci->movePortTo(id_DO, lut_ci, id_F);
+
+                    cells_to_remove.push_back(ci->name);
+                    continue;
+                }
                 // make cluster root
                 ci->cluster = ci->name;
                 ci->constr_abs_z = true;
@@ -2179,6 +2191,9 @@ struct GowinPacker
         for (auto &ncell : new_cells) {
             ctx->cells[ncell->name] = std::move(ncell);
         }
+        for (auto cell : cells_to_remove) {
+            ctx->cells.erase(cell);
+        }
     }
 
     // ===================================
@@ -4326,15 +4341,15 @@ struct GowinPacker
         pack_alus();
         ctx->check();
 
+        pack_ssram();
+        ctx->check();
+
         constrain_lutffs();
         ctx->check();
 
         pack_pll();
         ctx->check();
 
-        pack_ram16sdp4();
-        ctx->check();
-
         pack_bsram();
         ctx->check();