From 4161856d496c6d53a7b396086e06d6a5c027a098 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 28 Nov 2018 22:34:22 -0800 Subject: [PATCH] Add support for MMCME2_ADV --- xc7/arch.cc | 7 ++++--- xc7/constids.inc | 1 + xc7/xdl.cc | 39 +++++++++++++++++++++++++++++++++------ 3 files changed, 38 insertions(+), 9 deletions(-) diff --git a/xc7/arch.cc b/xc7/arch.cc index d64f5aca..adf38207 100644 --- a/xc7/arch.cc +++ b/xc7/arch.cc @@ -483,10 +483,9 @@ WireId Arch::getBelPinWire(BelId bel, IdString pin) const throw; } } - } else if (bel_type == id_PS7) { + } else if (bel_type == id_PS7 || bel_type == id_MMCME2_ADV) { // e.g. Convert DDRARB[0] -> DDRARB0 - boost::erase_all(pin_name, "["); - boost::erase_all(pin_name, "]"); + pin_name.erase(std::remove_if(pin_name.begin(), pin_name.end(), boost::is_any_of("[]")), pin_name.end()); } auto site_index = torc_info->bel_to_site_index[bel.index]; @@ -1042,6 +1041,8 @@ TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, in } else if (cell->type == id_PS7) { // TODO return TMG_IGNORE; + } else if (cell->type == id_MMCME2_ADV) { + return TMG_IGNORE; } log_error("no timing info for port '%s' of cell type '%s'\n", port.c_str(this), cell->type.c_str(this)); } diff --git a/xc7/constids.inc b/xc7/constids.inc index bf0e7114..0bc012b3 100644 --- a/xc7/constids.inc +++ b/xc7/constids.inc @@ -459,3 +459,4 @@ X(BUFGCTRL) X(SLICE_LUT6) X(IOB33) X(PS7) +X(MMCME2_ADV) diff --git a/xc7/xdl.cc b/xc7/xdl.cc index 32546490..e6878ba1 100644 --- a/xc7/xdl.cc +++ b/xc7/xdl.cc @@ -68,7 +68,7 @@ void write_xdl(const Context *ctx, std::ostream &out) const char *type; if (cell.second->type == id_SLICE_LUT6) type = "SLICEL"; - else if (cell.second->type == id_IOB33 || cell.second->type == id_BUFGCTRL || cell.second->type == id_PS7) + else if (cell.second->type == id_IOB33 || cell.second->type == id_BUFGCTRL || cell.second->type == id_PS7 || cell.second->type == id_MMCME2_ADV) type = cell.second->type.c_str(ctx); else log_error("Unsupported cell type '%s'.\n", cell.second->type.c_str(ctx)); @@ -198,14 +198,35 @@ void write_xdl(const Context *ctx, std::ostream &out) } else if (cell.second->type == id_BUFGCTRL) { auto it = cell.second->params.find(ctx->id("PRESELECT_I0")); instPtr->setConfig("PRESELECT_I0", "", it != cell.second->params.end() ? it->second : "FALSE"); - instPtr->setConfig("CE0INV", "", "CE0"); instPtr->setConfig("S0INV", "", "S0"); - instPtr->setConfig("IGNORE0INV", "", "IGNORE0"); - instPtr->setConfig("CE1INV", "", "CE1"); - instPtr->setConfig("S1INV", "", "S1"); - instPtr->setConfig("IGNORE1INV", "", "IGNORE1"); + //instPtr->setConfig("IGNORE0INV", "", "IGNORE0"); + //instPtr->setConfig("CE1INV", "", "CE1"); + //instPtr->setConfig("S1INV", "", "S1"); + //instPtr->setConfig("IGNORE1INV", "", "IGNORE1"); } else if (cell.second->type == id_PS7) { + } else if (cell.second->type == id_MMCME2_ADV) { + for (const auto& i : cell.second->params) { + instPtr->setConfig(i.first.str(ctx), "", i.second); + } + if (!cell.second->params.count(ctx->id("CLKIN2_PERIOD"))) + instPtr->setConfig("CLKIN2_PERIOD", "", "0"); + for (const auto& i : { "CLKOUT1_DIVIDE", "CLKOUT2_DIVIDE", "CLKOUT3_DIVIDE", "CLKOUT4_DIVIDE", "CLKOUT5_DIVIDE", "CLKOUT6_DIVIDE" }) { + if (!cell.second->params.count(ctx->id(i))) + instPtr->setConfig(i, "", "1"); + } + for (const auto& i : { "CLKOUT1_PHASE", "CLKOUT2_PHASE", "CLKOUT3_PHASE", "CLKOUT4_PHASE", "CLKOUT5_PHASE", "CLKOUT6_PHASE" }) { + if (!cell.second->params.count(ctx->id(i))) + instPtr->setConfig(i, "", "0.0"); + } + for (const auto& i : { "CLKOUT1_DUTY_CYCLE", "CLKOUT2_DUTY_CYCLE", "CLKOUT3_DUTY_CYCLE", "CLKOUT4_DUTY_CYCLE", "CLKOUT5_DUTY_CYCLE", "CLKOUT6_DUTY_CYCLE" }) { + if (!cell.second->params.count(ctx->id(i))) + instPtr->setConfig(i, "", "0.5"); + } + if (!cell.second->params.count(ctx->id("REF_JITTER2"))) + instPtr->setConfig("REF_JITTER2", "", "0.01"); + if (!cell.second->params.count(ctx->id("SS_MOD_PERIOD"))) + instPtr->setConfig("SS_MOD_PERIOD", "", "10000"); } else log_error("Unsupported cell type '%s'.\n", cell.second->type.c_str(ctx)); } @@ -224,6 +245,8 @@ void write_xdl(const Context *ctx, std::ostream &out) const auto lut = bel_to_lut(driver.cell->bel); pin_name[0] = lut[0]; } + // e.g. Convert DDRARB[0] -> DDRARB0 + pin_name.erase(std::remove_if(pin_name.begin(), pin_name.end(), boost::is_any_of("[]")), pin_name.end()); auto pinPtr = Factory::newInstancePinPtr(instPtr, pin_name); netPtr->addSource(pinPtr); @@ -237,6 +260,10 @@ void write_xdl(const Context *ctx, std::ostream &out) const auto lut = bel_to_lut(user.cell->bel); pin_name[0] = lut[0]; } + else { + // e.g. Convert DDRARB[0] -> DDRARB0 + pin_name.erase(std::remove_if(pin_name.begin(), pin_name.end(), boost::is_any_of("[]")), pin_name.end()); + } pinPtr = Factory::newInstancePinPtr(instPtr, pin_name); netPtr->addSink(pinPtr); }