From 1f4d3fdc914d0b060deeda07fc8fdaa1468876c0 Mon Sep 17 00:00:00 2001 From: gatecat Date: Sat, 21 Feb 2026 19:49:45 +0100 Subject: [PATCH] Add a workaround for DCI for now Signed-off-by: gatecat --- himbaechel/uarch/xilinx/fasm.cc | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/himbaechel/uarch/xilinx/fasm.cc b/himbaechel/uarch/xilinx/fasm.cc index f3526a6c..e709e94c 100644 --- a/himbaechel/uarch/xilinx/fasm.cc +++ b/himbaechel/uarch/xilinx/fasm.cc @@ -742,6 +742,8 @@ struct FasmBackend dict ioconfig_by_hclk; + bool warned_dci = false; + void write_io_config(CellInfo *pad) { NetInfo *pad_net = pad->getPort(id_PAD); @@ -760,6 +762,13 @@ struct FasmBackend std::string tile = uarch->tile_name(pad->bel.tile); push(tile); + if (boost::ends_with(iostandard, "_T_DCI")) { + if (!warned_dci) + log_warning("DCI is not supported, will be removed.\n"); + warned_dci = true; + iostandard.erase(iostandard.size() - 6, iostandard.size()); + } + bool is_riob18 = boost::starts_with(tile, "RIOB18_"); bool is_sing = boost::contains(tile, "_SING_"); bool is_top_sing = pad->bel.tile < uarch->hclk_for_iob(pad->bel); @@ -780,6 +789,7 @@ struct FasmBackend iostandard.erase(0, 5); bool is_sstl = iostandard == "SSTL12" || iostandard == "SSTL135" || iostandard == "SSTL15"; + int hclk = uarch->hclk_for_iob(pad->bel); if (only_diff)