diff --git a/himbaechel/uarch/gatemate/bitstream.cc b/himbaechel/uarch/gatemate/bitstream.cc
index 45420b9c..813a69ae 100644
--- a/himbaechel/uarch/gatemate/bitstream.cc
+++ b/himbaechel/uarch/gatemate/bitstream.cc
@@ -153,13 +153,6 @@ struct BitstreamBackend
     void export_connection(ChipConfig &cc, PipId pip)
     {
         const auto &extra_data = *uarch->pip_extra_data(pip);
-        if (extra_data.type == PipExtra::PIP_EXTRA_MUX) {
-            IdString name = IdString(extra_data.name);
-            if (name==ctx->id("PASS")) {
-                auto n = ctx->getPipName(pip);
-                printf("PASS %s %s -> %s\n", n[0].c_str(ctx), n[2].c_str(ctx), n[1].c_str(ctx));
-            }
-        }
         if (extra_data.type == PipExtra::PIP_EXTRA_MUX && (extra_data.flags & MUX_VISIBLE)) {
             IdString name = IdString(extra_data.name);
             CfgLoc loc = get_config_loc(pip.tile);
diff --git a/himbaechel/uarch/gatemate/extra_data.h b/himbaechel/uarch/gatemate/extra_data.h
index 72401530..fae4bf5b 100644
--- a/himbaechel/uarch/gatemate/extra_data.h
+++ b/himbaechel/uarch/gatemate/extra_data.h
@@ -127,6 +127,25 @@ enum ClusterPlacement
     PLACE_DB_CONSTR = 32,
 };
 
+enum PipMask
+{
+    IS_MULT = 1 << 0,
+    IS_ADDF = 1 << 1,
+    IS_COMP = 1 << 2,
+    C_SELX  = 1 << 3,
+    C_SELY1 = 1 << 4,
+    C_SELY2 = 1 << 5,
+    C_SEL_C = 1 << 6,
+    C_SEL_P = 1 << 7,
+    C_Y12   = 1 << 8,
+    C_CX_I  = 1 << 9,
+    C_CY1_I = 1 << 10,
+    C_CY2_I = 1 << 11,
+    C_PX_I  = 1 << 12,
+    C_PY1_I = 1 << 13,
+    C_PY2_I = 1 << 14,
+};
+
 struct PllCfgRecord
 {
     double weight;
diff --git a/himbaechel/uarch/gatemate/gatemate.cc b/himbaechel/uarch/gatemate/gatemate.cc
index 8ff8113f..6cd7d7e8 100644
--- a/himbaechel/uarch/gatemate/gatemate.cc
+++ b/himbaechel/uarch/gatemate/gatemate.cc
@@ -308,7 +308,8 @@ void GateMateImpl::postPlace()
     repack();
     ctx->assignArchInfo();
     used_cpes.resize(ctx->getGridDimX() * ctx->getGridDimY());
-    passtrough.resize(ctx->getGridDimX() * ctx->getGridDimY());
+    pip_data = std::vector<uint32_t>(ctx->getGridDimX() * ctx->getGridDimY());
+    //pip_mask = std::vector<uint32_t>(ctx->getGridDimX() * ctx->getGridDimY());
     for (auto &cell : ctx->cells) {
         // We need to skip CPE_MULT since using CP outputs is mandatory
         // even if output is actually not connected
@@ -318,17 +319,32 @@ void GateMateImpl::postPlace()
             marked_used = true;
         if (marked_used)
             used_cpes[cell.second.get()->bel.tile] = true;
-        int cy2_i = int_or_default(cell.second->params, id_C_CY2_I, 0);
-        if (cell.second.get()->type == id_CPE_MULT || cy2_i == 1)
-            passtrough[cell.second.get()->bel.tile] = true;
+        
+        uint32_t mask = 0;
+        if (cell.second.get()->type == id_CPE_MULT) mask |= PipMask::IS_MULT;
+        if (cell.second.get()->type == id_CPE_ADDF) mask |= PipMask::IS_ADDF;
+        if (cell.second.get()->type == id_CPE_ADDF2) mask |= PipMask::IS_ADDF;
+        if (cell.second.get()->type == id_CPE_COMP) mask |= PipMask::IS_COMP;
+        if (int_or_default(cell.second->params, id_C_SELX, 0)) mask |= PipMask::C_SELX;
+        if (int_or_default(cell.second->params, id_C_SELY1, 0)) mask |= PipMask::C_SELY1;
+        if (int_or_default(cell.second->params, id_C_SELY2, 0)) mask |= PipMask::C_SELY2;
+        if (int_or_default(cell.second->params, id_C_SEL_C, 0)) mask |= PipMask::C_SEL_C;
+        if (int_or_default(cell.second->params, id_C_SEL_P, 0)) mask |= PipMask::C_SEL_P;
+        if (int_or_default(cell.second->params, id_C_Y12, 0)) mask |= PipMask::C_Y12;
+        if (int_or_default(cell.second->params, id_C_CX_I, 0)) mask |= PipMask::C_CX_I;
+        if (int_or_default(cell.second->params, id_C_CY1_I, 0)) mask |= PipMask::C_CY1_I;
+        if (int_or_default(cell.second->params, id_C_CY2_I, 0)) mask |= PipMask::C_CY2_I;
+        if (int_or_default(cell.second->params, id_C_PX_I, 0)) mask |= PipMask::C_PX_I;
+        if (int_or_default(cell.second->params, id_C_PY1_I, 0)) mask |= PipMask::C_PY1_I;
+        if (int_or_default(cell.second->params, id_C_PY2_I, 0)) mask |= PipMask::C_PY2_I;
+        pip_data[cell.second.get()->bel.tile] = mask;
     }
 }
 bool GateMateImpl::checkPipAvail(PipId pip) const
 {
     const auto &extra_data = *pip_extra_data(pip);
-    if (extra_data.type == PipExtra::PIP_EXTRA_MUX && (extra_data.flags & MUX_PASSTROUGH)) {
-        //printf("pip: %s\n",ctx->getPipName(pip)[1].c_str(ctx));
-        if (passtrough[pip.tile])
+    if (extra_data.type == PipExtra::PIP_EXTRA_MUX && (extra_data.mask != 0)) {
+        if ((pip_data[pip.tile] & extra_data.mask) != extra_data.data)
             return false;
     }
     if (extra_data.type != PipExtra::PIP_EXTRA_MUX || (extra_data.flags & MUX_ROUTING) == 0)
diff --git a/himbaechel/uarch/gatemate/gatemate.h b/himbaechel/uarch/gatemate/gatemate.h
index 9d60fa99..5e85ba9d 100644
--- a/himbaechel/uarch/gatemate/gatemate.h
+++ b/himbaechel/uarch/gatemate/gatemate.h
@@ -96,7 +96,8 @@ struct GateMateImpl : HimbaechelAPI
     pool<IdString> multiplier_a_passthru_uppers;
     pool<IdString> multiplier_zero_drivers;
     std::vector<bool> used_cpes;
-    std::vector<bool> passtrough;
+    std::vector<uint32_t> pip_data;
+    std::vector<uint32_t> pip_mask;
     int fpga_mode;
     int timing_mode;
     std::map<const NetInfo *, int> global_signals;