marked as unneeded, so I simply removed the code rather than
debug the issue, which was that buses got the delimeters erased
for checking but never put back again. Also: Modified the verilog
reading code so that if an empty set "()" is given for a pin, then
the initial proxy, which is a single net with the name prefix
"_noconnect_", can be promoted to a bus if further processing
reveals it to be a bus and not a single-bit signal.
netgen. More work will be done later. Also: Removed the
derived file lvs_manager.py from the repository, and modified
the Makefile to remove it as part of "make clean".
Tim Edwards