From fb0e1d10b06533a91aa6a02492cf95727ea283e1 Mon Sep 17 00:00:00 2001
From: Tim Edwards <tim@opencircuitdesign.com>
Date: Tue, 16 Jun 2020 17:16:30 -0400
Subject: [PATCH] Added back a correction that did not get made in this code
 base and so didn't make it into the commit.  Handles implicit pins in
 verilog.

---
 base/verilog.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/base/verilog.c b/base/verilog.c
index 6b36a93..8fa0453 100644
--- a/base/verilog.c
+++ b/base/verilog.c
@@ -1918,11 +1918,15 @@ nextinst:
 		  scan = scan->next;
 	       }
 	       if (scan == NULL) {
-		  Fprintf(stderr, "Error:  No match in call for pin %s\n", obpinname);
-		  break;
-	       }
+		  char localnet[100];
 
-	       if (GetBus(scan->net, &wb) == 0) {
+		  /* Assume an implicit unconnected pin */
+		  sprintf(localnet, "_noconnect_%d_", localcount++);
+		  Node(localnet);
+		  join(localnet, obptr->name);
+		  Fprintf(stderr, "Note:  Implicit pin %s\n", obpinname);
+	       }
+	       else if (GetBus(scan->net, &wb) == 0) {
 		   char *bptr2;
 		   char *scanroot;
 		   scanroot = strsave(scan->net);