From cfbf37286215ff5ea8ce2d6a74903a65ff8f5eea Mon Sep 17 00:00:00 2001
From: Fischer Moseley <42497969+fischermoseley@users.noreply.github.com>
Date: Sun, 22 Sep 2024 18:45:06 -0700
Subject: [PATCH] uart: remove flaky nexys4ddr baudrate mismatch test case

---
 test/test_uart_baud_mismatch.py | 1 -
 1 file changed, 1 deletion(-)

diff --git a/test/test_uart_baud_mismatch.py b/test/test_uart_baud_mismatch.py
index a625c72..40a6ec3 100644
--- a/test/test_uart_baud_mismatch.py
+++ b/test/test_uart_baud_mismatch.py
@@ -103,7 +103,6 @@ def test_baudrate_mismatch_xilinx_passes(baudrate, percent_slowdown, stall_inter
 
 
 nexys4ddr_fail_cases = [
-    (3e6, 1, 1024),  # Light clock mismatch, no mitigation
     (3e6, 2, 1024),  # Heavy clock mismatch, no mitigation
     (3e6, 2, 16),  # Heavy clock mismatch, light mitigation
 ]