diff --git a/.gitignore b/.gitignore index 77156ab..29854a6 100644 --- a/.gitignore +++ b/.gitignore @@ -11,25 +11,11 @@ __pycache__/ build/ dist/ +# Autogenerated Manta source +manta.v + # Miscellaneous file types -*.v -*.sv *.vcd -*.out *.csv *.xml .coverage* - -# Vivado files -*.log -*.jou -*.rpt -*.bin -*.bit -*.out -.Xil/ - -# Yosys/IceStorm files -*.asc -*.bin -*.json diff --git a/examples/common/.gitignore b/examples/common/.gitignore deleted file mode 100644 index 8365015..0000000 --- a/examples/common/.gitignore +++ /dev/null @@ -1 +0,0 @@ -!divider.sv diff --git a/examples/verilog/icestick/uart_io_core/.gitignore b/examples/verilog/icestick/uart_io_core/.gitignore deleted file mode 100644 index 1e11c14..0000000 --- a/examples/verilog/icestick/uart_io_core/.gitignore +++ /dev/null @@ -1 +0,0 @@ -!top_level.sv diff --git a/examples/verilog/icestick/uart_logic_analyzer/.gitignore b/examples/verilog/icestick/uart_logic_analyzer/.gitignore deleted file mode 100644 index 1e11c14..0000000 --- a/examples/verilog/icestick/uart_logic_analyzer/.gitignore +++ /dev/null @@ -1 +0,0 @@ -!top_level.sv diff --git a/examples/verilog/nexys4_ddr/ether_logic_analyzer_io_core/.gitignore b/examples/verilog/nexys4_ddr/ether_logic_analyzer_io_core/.gitignore deleted file mode 100644 index 0245c4b..0000000 --- a/examples/verilog/nexys4_ddr/ether_logic_analyzer_io_core/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -!top_level.sv -!divider.sv diff --git a/examples/verilog/nexys4_ddr/uart_host_to_fpga_mem/.gitignore b/examples/verilog/nexys4_ddr/uart_host_to_fpga_mem/.gitignore deleted file mode 100644 index 1e11c14..0000000 --- a/examples/verilog/nexys4_ddr/uart_host_to_fpga_mem/.gitignore +++ /dev/null @@ -1 +0,0 @@ -!top_level.sv diff --git a/examples/verilog/nexys4_ddr/uart_io_core/.gitignore b/examples/verilog/nexys4_ddr/uart_io_core/.gitignore deleted file mode 100644 index 1e11c14..0000000 --- a/examples/verilog/nexys4_ddr/uart_io_core/.gitignore +++ /dev/null @@ -1 +0,0 @@ -!top_level.sv diff --git a/examples/verilog/nexys4_ddr/uart_logic_analyzer/.gitignore b/examples/verilog/nexys4_ddr/uart_logic_analyzer/.gitignore deleted file mode 100644 index 1e11c14..0000000 --- a/examples/verilog/nexys4_ddr/uart_logic_analyzer/.gitignore +++ /dev/null @@ -1 +0,0 @@ -!top_level.sv