diff --git a/Makefile b/Makefile
index feb06d4..0e41b55 100644
--- a/Makefile
+++ b/Makefile
@@ -96,7 +96,6 @@ formal:
 # Build Examples
 nexys_a7: nexys_a7_io_core_ether nexys_a7_io_core_uart nexys_a7_ps2_logic_analyzer nexys_a7_video_sprite_ether nexys_a7_video_sprite_uart
 
-
 nexys_a7_io_core_ether:
 	cd examples/nexys_a7/io_core_ether/;\
 	manta gen manta.yaml src/manta.v;		\
diff --git a/src/manta/uart_iface/uart_rx.v b/src/manta/uart_iface/uart_rx.v
index de3ef34..16ff62a 100644
--- a/src/manta/uart_iface/uart_rx.v
+++ b/src/manta/uart_iface/uart_rx.v
@@ -58,13 +58,7 @@ module uart_rx (
                 end
             end
         end
-
-
-
-
-
-
     end
-
 endmodule
+
 `default_nettype wire
\ No newline at end of file
diff --git a/src/manta/uart_iface/rx_uart.v b/test/functional_sim/uart_tb/rx_uart.v
similarity index 100%
rename from src/manta/uart_iface/rx_uart.v
rename to test/functional_sim/uart_tb/rx_uart.v
diff --git a/src/manta/uart_iface/tx_uart.v b/test/functional_sim/uart_tb/tx_uart.v
similarity index 100%
rename from src/manta/uart_iface/tx_uart.v
rename to test/functional_sim/uart_tb/tx_uart.v
diff --git a/test/functional_sim/uart_tb.sv b/test/functional_sim/uart_tb/uart_tb.sv
similarity index 100%
rename from test/functional_sim/uart_tb.sv
rename to test/functional_sim/uart_tb/uart_tb.sv
diff --git a/test/functional_sim/uart_tx_tb.sv b/test/functional_sim/uart_tb/uart_tx_tb.sv
similarity index 100%
rename from test/functional_sim/uart_tx_tb.sv
rename to test/functional_sim/uart_tb/uart_tx_tb.sv