124 lines
4.6 KiB
Plaintext
124 lines
4.6 KiB
Plaintext
LEF extensions to Magic-7.2
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1) Ports
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A new method exists for declaring a cell to be a subcircuit.
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This involves the creation of ports, which are a special kind
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of label. The existence of any port in a cell marks that cell
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as a subcircuit, which causes it to be treated differently
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during the process of extraction and netlist generation:
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a) Subcircuits are extracted as usual, except for the presence
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of the "port" keyword for each port in the .ext file.
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b) Exttosim (ext2sim) operates as usual, because the netlist is
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not hierarchical.
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c) Exttospice (ext2spice) will generate an "X" record for each
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instance of the subcircuit cell, rather than flattening the
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cell. To simulate in SPICE, a ".subckt" record for the cell
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must be added to the SPICE deck. This behavior can be
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subverted in the Tcl-based magic by using "exttospice subcircuits
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off", in which case all subcircuits will be flattened.
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d) The "extresis" command will ignore the contents of subcircuits.
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On the other hand, after doing "extresis geometry", subsequent
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use of "extresis" will generate a ".fh" file containing the
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detailed three-dimensional geometry of the cell in the format
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of nodes and segments used by the FastHenry field equation
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solver. This is unrelated to the LEF module.
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A new command "port" turns labels into ports. The syntax of
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the command is:
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port [option], where [option] is one of:
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class [type] get [set] port class type
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use [type] get [set] port use type
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index [number] get [set] port number
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connections [dir...] get [set] port connection directions
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make [index] [dir...] turn a label into a port
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remove turn a port back into a label
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help print this help information
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<index> [<directions>]
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To use the port command, a label must first exist, and the cursor box
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must overlap the label, and only that label.
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The index indicates the order of the port in the argument list of the
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subcircuit definition and calls. The ordering of ports must match
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the order of arguments to any .subckt record used in a SPICE simulation
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of the cell.
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The directions given to "connections" must be one or more of "n", "s",
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"e", and "w" (with no spaces in between; e.g., "port connections nsew").
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They indicate the edge of the port to which connections may be made to
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the cell. This is unused by LEF, which uses more detailed information
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about metal routing and obstructions inside the cell to determine how
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to attach to a pin. In the abbreviated command usage "port <index>",
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a default direction will be determined by the position of the text on
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the label.
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Class and use types correspond to LEF classes and uses for pins.
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Valid class types are:
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default
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input
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output
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tristate
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bidirectional, inout
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feedthrough, feedthru
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Valid use types are:
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default
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analog
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signal, digital
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power
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ground
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clock
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2) Properties
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While the "port" command and method specifies information about pins,
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LEF also supports information about the cell itself. The "property"
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command is a general-purpose interface for attaching key-value pairs
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to a cell, which are saved in the output and may be parsed by any
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function. Keys relevant to the LEF module begin with the text "LEF".
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LEF-related keys are:
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LEFclass corresponding to LEF "CLASS"
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LEFsource corresponding to LEF "SOURCE"
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LEFsymmetry corresponding to LEF "SYMMETRY"
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The string value attached to each key is written to the LEF output
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verbatim, thus any value may be used that is acceptable LEF syntax.
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The property command has the following syntax:
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property [<key> [<value>]]
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With no arguments, "property" returns all the key-value pairs defined
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for the current edit cell. Given the key argument only, it returns
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the value attached to the indicated key. Given both arguments, it
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assigns the string value to the indicated key. A value which is an
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empty string ("") will cause the key to become undefined. Values
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which consist of more than one word must be enclosed in quotes.
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Example: property LEFsymmetry "X Y"
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3) LEF file generation
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A LEF-definition file with extension ".lef" may be written for each
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cell. This file contains detailed information required for placing
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and routing the cell, including all information regarding pins,
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ports, and obstructions on the metallization layers. The syntax of
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the LEF command is:
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lef write [<cell>]
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to write a .lef file for a single cell. If <cell> is not specified,
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then the output will be for the current edit cell. All cells in a
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design my be written using the syntax:
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lef writeall
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