request #325 from Daryl Miles. Made a few simple style changes
to conform to (what is vaguely defined as) the overall programming
style for magic (passed down from John Ousterhout).
causing the SI suffix not to be the expected one. Adjusted the
bounds where each SI suffix is used to keep output in the range of
0.1 to 100, although the boundary is very subjective. Made a
correction to the extresist code to scan through all device records
for a tile type. However, (1) there are cases being missed, and (2)
this should not be necessary since all device types should be able
to be known exactly from the contents of the .sim file. Needs more
work.
natural sort instead of ASCII-based sorting, so that ports that
are numbered arrays will be indexed properly by count. Also:
Modified the "extresist" handling of substrate to draw the default
substrate type over the entire cell area (less areas of nwell or
other conflicting type). This allows extresist to extract the
entire substrate as a resistive network. The result is ugly and
may warrant some aggressive network simplification, but it should
at least be realistic.
isolate the terminal areas of a device (e.g., source and drain)
and calculate their area and perimeter individually for the
device (in addition to the traditional method of calculating
area and perimeter of each resistance class for the entire node).
Also: Reworked the SPICE syntax output to generate SI values
in the range 1-1000 with the appropriate suffix (e.g., "20u")
instead of defaulting to "u" for lengths and "p" for areas.
This prevents it from producing weird units like "150000u" when
a process definition already includes a scalefactor.
Reworked the "extresist" code to use the device terminal area
and perimeter. This fixes an error in which "extresist" would
lose these values and "ext2spice" with option "extresist on"
would generate a new netlist output with zero terminal areas
and perimeters.
this appears to work correctly but does not yet handle the implicit
substrate (space as substrate) or "virtually" isolated substrate regions
(which need to be removed for full parasitic extraction).
support of devices with terminals on different plances, such as
capacitors, diodes, and bipolar transistors. Output now appears
to give meaningful results for flattened layouts, although
numerous issues remain for hierarchical layouts.
simple FET device in extresist. Also: Extended the bloat-all CIF operator
again, allowing the trigger layer for the bloat operation to include both
CIF layers and magic layers (previously only magic layers were supported).
This extension is possible due to the previous extension allowing the
trigger layer and bloating layers to be on separate planes. This operator
extension is useful for tagging geometry that is in the proximity of, but
not overlapping, geometry on another plane.
to be more robust and not depend on the ordering of the devices in
the techfile. The extraction method now keeps a mask of which
properties of the device (source/drain types, substrate type,
identifier type) have been found, and will look only for device
records that match what is known about the device. Added a device
identifier record which is the last record before parameters if the
record begins with "+". This allows marker layers to be placed
over a device such that it will extract with a different type.
This helps reduce the complexity of the techfile and allows
certain specialized devices like RF or ESD to be identified without
a separate layer type for the device.
Tim Edwards