diff --git a/extract/ExtCouple.c b/extract/ExtCouple.c index 53217cb2..b88f71cc 100644 --- a/extract/ExtCouple.c +++ b/extract/ExtCouple.c @@ -3099,7 +3099,7 @@ extSideCommon(rinside, rfar, tpnear, tpfar, bdir, overlap, sep, extCoupleList) cap = extGetCapValue(he); for (e = extCoupleList; e; e = e->ec_next) if (TTMaskHasType(&e->ec_near, near) && TTMaskHasType(&e->ec_far, far)) { - swcap = 0.5 * (e->ec_cap * overlap) / (sep + e->ec_offset); + swcap = (e->ec_cap * overlap) / (sep + e->ec_offset); cap += swcap; if (CAP_DEBUG) extAdjustCouple(he, swcap, "sidewall"); diff --git a/extract/ExtTech.c b/extract/ExtTech.c index 112087e6..656020ed 100644 --- a/extract/ExtTech.c +++ b/extract/ExtTech.c @@ -1559,7 +1559,11 @@ ExtTechSimpleSidewallCap(argc, argv) DBTechNoisyNameMask(argv[1], &types1); TTMaskSetMask(allExtractTypes, &types1); plane = DBTechNoisyNamePlane(argv[2]); - capVal = aToCap(argv[3]); + + /* Correct for magic's double counting of edges by halving the capacitance + * per unit length. + */ + capVal = 0.5 * aToCap(argv[3]); if (argc == 5) { @@ -3294,13 +3298,10 @@ ExtTechLine(sectionName, argc, argv) /* NOTE: Originally, the sidewall capacitance coefficient was * supposed to be the value that is appropriate to compute - * half the total sidewall on each edge. The addition of "offset" - * requires that the coefficient (and offset) should be values - * yielding the total sidewall between two edges. Because each - * edge is computed separately, the total capacitance is halved - * when doing the calculation (see ExtCouple.c). Sidewall values - * are correct for the open PDKs and presumably incorrect for the - * original SCMOS tech files. + * half the total sidewall on each edge. This has now been + * moved here to the tech file parser. Sidewall values are + * correct for the existing open PDKs and presumably incorrect + * for the original SCMOS tech files. */ DBTechNoisyNameMask(argv[2], &types2); @@ -3311,7 +3312,10 @@ ExtTechLine(sectionName, argc, argv) TTMaskSetMask(allExtractTypes, &far); if (TTMaskHasType(&types1, TT_SPACE)) TechError("Can't have space on inside of edge [ignored]\n"); - capVal = aToCap(argv[5]); + /* Correct for magic's double counting of edges by halving the + * value of capacitance per unit length. + */ + capVal = 0.5 * aToCap(argv[5]); if (argc == 7) { sscanf(argv[6], "%lg", &doffset); diff --git a/scmos/extract_template/scmosExt14b-sub.tech.in b/scmos/extract_template/scmosExt14b-sub.tech.in index 400fc3a6..4856308b 100644 --- a/scmos/extract_template/scmosExt14b-sub.tech.in +++ b/scmos/extract_template/scmosExt14b-sub.tech.in @@ -61,7 +61,7 @@ style lambda_irsim=0.30 sideOverlap(PolyCap, ~PolyCap, M2Cap, 2.7, M1Cap) sideOverlap(PolyCap, ~PolyCap, M3Cap, 1.8, M1CapCommaM2Cap) - sidewall PolyCap ~PolyCap ~PolyCap PolyCap 7.2 + sidewall PolyCap ~PolyCap ~PolyCap PolyCap 14.4 /* ------------------------------------------------- */ @@ -78,7 +78,7 @@ style lambda_irsim=0.30 sideOverlap(M1Cap, ~M1Cap, M2Cap, 8.7, ) sideOverlap(M1Cap, ~M1Cap, M3Cap, 4.8, M2Cap) - sidewall M1Cap ~M1Cap ~M1Cap M1Cap 19.2 + sidewall M1Cap ~M1Cap ~M1Cap M1Cap 38.4 /* ------------------------------------------------- */ @@ -96,7 +96,7 @@ style lambda_irsim=0.30 sideOverlap(M2Cap, ~M2Cap, M1Cap, 15, ) sideOverlap(M2Cap, ~M2Cap, M3Cap, 10.8, ) - sidewall M2Cap ~M2Cap ~M2Cap M2Cap 21.6 + sidewall M2Cap ~M2Cap ~M2Cap M2Cap 43.2 /* ------------------------------------------------- */ @@ -115,7 +115,7 @@ style lambda_irsim=0.30 sideOverlap(M3Cap, ~M3Cap, M1Cap, 15.3, M2Cap) sideOverlap(M3Cap, ~M3Cap, M2Cap, 19.2, ) - sidewall M3Cap ~M3Cap ~M3Cap M3Cap 34.3 + sidewall M3Cap ~M3Cap ~M3Cap M3Cap 68.6 /* ------------------------------------------------- */ /* Unchanged yet for .35um*/ diff --git a/scmos/extract_template/scmosExt14b-tm.tech.in b/scmos/extract_template/scmosExt14b-tm.tech.in index 8937cdeb..ae8d9cbd 100644 --- a/scmos/extract_template/scmosExt14b-tm.tech.in +++ b/scmos/extract_template/scmosExt14b-tm.tech.in @@ -61,7 +61,7 @@ style lambda_irsim=0.35 sideOverlap(PolyCap, ~PolyCap, M2Cap, 3.2, M1Cap) sideOverlap(PolyCap, ~PolyCap, M3Cap, 2.1, M1CapCommaM2Cap) - sidewall PolyCap ~PolyCap ~PolyCap PolyCap 8.4 + sidewall PolyCap ~PolyCap ~PolyCap PolyCap 16.8 /* ------------------------------------------------- */ @@ -78,7 +78,7 @@ style lambda_irsim=0.35 sideOverlap(M1Cap, ~M1Cap, M2Cap, 10.2, ) sideOverlap(M1Cap, ~M1Cap, M3Cap, 5.6, M2Cap) - sidewall M1Cap ~M1Cap ~M1Cap M1Cap 22.4 + sidewall M1Cap ~M1Cap ~M1Cap M1Cap 44.8 /* ------------------------------------------------- */ @@ -96,7 +96,7 @@ style lambda_irsim=0.35 sideOverlap(M2Cap, ~M2Cap, M1Cap, 17.5, ) sideOverlap(M2Cap, ~M2Cap, M3Cap, 12.6, ) - sidewall M2Cap ~M2Cap ~M2Cap M2Cap 25.2 + sidewall M2Cap ~M2Cap ~M2Cap M2Cap 50.4 /* ------------------------------------------------- */ @@ -115,7 +115,7 @@ style lambda_irsim=0.35 sideOverlap(M3Cap, ~M3Cap, M1Cap, 17.9, M2Cap) sideOverlap(M3Cap, ~M3Cap, M2Cap, 22.4, ) - sidewall M3Cap ~M3Cap ~M3Cap M3Cap 40 + sidewall M3Cap ~M3Cap ~M3Cap M3Cap 80 /* ------------------------------------------------- */ /* Unchanged yet for .35um*/ diff --git a/scmos/extract_template/scmosExt26b-sub.tech.in b/scmos/extract_template/scmosExt26b-sub.tech.in index a636b162..f246f132 100644 --- a/scmos/extract_template/scmosExt26b-sub.tech.in +++ b/scmos/extract_template/scmosExt26b-sub.tech.in @@ -52,7 +52,7 @@ style lambda_irsim=0.4 sideOverlap(PolyCap, ~PolyCap, M2Cap, 5, M1Cap) sideOverlap(PolyCap, ~PolyCap, M3Cap, 3, M1CapCommaM2Cap) - sidewall PolyCap ~PolyCap ~PolyCap PolyCap 9 + sidewall PolyCap ~PolyCap ~PolyCap PolyCap 18 /* ------------------------------------------------- */ @@ -69,7 +69,7 @@ style lambda_irsim=0.4 sideOverlap(M1Cap, ~M1Cap, M2Cap, 10, ) sideOverlap(M1Cap, ~M1Cap, M3Cap, 6, M2Cap) - sidewall M1Cap ~M1Cap ~M1Cap M1Cap 22 + sidewall M1Cap ~M1Cap ~M1Cap M1Cap 44 /* ------------------------------------------------- */ @@ -87,7 +87,7 @@ style lambda_irsim=0.4 sideOverlap(M2Cap, ~M2Cap, M1Cap, 18, ) sideOverlap(M2Cap, ~M2Cap, M3Cap, 8, ) - sidewall M2Cap ~M2Cap ~M2Cap M2Cap 26 + sidewall M2Cap ~M2Cap ~M2Cap M2Cap 52 /* ------------------------------------------------- */ @@ -106,7 +106,7 @@ style lambda_irsim=0.4 sideOverlap(M3Cap, ~M3Cap, M1Cap, 16, M2Cap) sideOverlap(M3Cap, ~M3Cap, M2Cap, 20, ) - sidewall M3Cap ~M3Cap ~M3Cap M3Cap 40 + sidewall M3Cap ~M3Cap ~M3Cap M3Cap 80 /* ------------------------------------------------- */ diff --git a/scmos/extract_template/scmosExt26b.tech.in b/scmos/extract_template/scmosExt26b.tech.in index 3d7ebe59..a38a6c80 100644 --- a/scmos/extract_template/scmosExt26b.tech.in +++ b/scmos/extract_template/scmosExt26b.tech.in @@ -57,7 +57,7 @@ style lambda_irsim=0.5 sideOverlap(PolyCap, ~PolyCap, M2Cap, 6, M1Cap) sideOverlap(PolyCap, ~PolyCap, M3Cap, 4, M1CapCommaM2Cap) - sidewall PolyCap ~PolyCap ~PolyCap PolyCap 11 + sidewall PolyCap ~PolyCap ~PolyCap PolyCap 22 /* ------------------------------------------------- */ @@ -74,7 +74,7 @@ style lambda_irsim=0.5 sideOverlap(M1Cap, ~M1Cap, M2Cap, 12, ) sideOverlap(M1Cap, ~M1Cap, M3Cap, 7, M2Cap) - sidewall M1Cap ~M1Cap ~M1Cap M1Cap 27 + sidewall M1Cap ~M1Cap ~M1Cap M1Cap 54 /* ------------------------------------------------- */ @@ -92,7 +92,7 @@ style lambda_irsim=0.5 sideOverlap(M2Cap, ~M2Cap, M1Cap, 23, ) sideOverlap(M2Cap, ~M2Cap, M3Cap, 10, ) - sidewall M2Cap ~M2Cap ~M2Cap M2Cap 33 + sidewall M2Cap ~M2Cap ~M2Cap M2Cap 66 /* ------------------------------------------------- */ @@ -111,7 +111,7 @@ style lambda_irsim=0.5 sideOverlap(M3Cap, ~M3Cap, M1Cap, 20, M2Cap) sideOverlap(M3Cap, ~M3Cap, M2Cap, 25, ) - sidewall M3Cap ~M3Cap ~M3Cap M3Cap 50 + sidewall M3Cap ~M3Cap ~M3Cap M3Cap 100 /* ------------------------------------------------- */ diff --git a/scmos/extract_template/scmosExt34.tech.in b/scmos/extract_template/scmosExt34.tech.in index c0dca915..a319c3ec 100644 --- a/scmos/extract_template/scmosExt34.tech.in +++ b/scmos/extract_template/scmosExt34.tech.in @@ -47,7 +47,7 @@ style lambda_irsim=0.6(hp) sideOverlap(PolyCap, ~PolyCap, M1Cap, 34, ) sideOverlap(PolyCap, ~PolyCap, M2Cap, 27, M1Cap) - sidewall PolyCap ~PolyCap ~PolyCap PolyCap 15 + sidewall PolyCap ~PolyCap ~PolyCap PolyCap 30 /* ------------------------------------------------- */ /* ------------ metal1 capacitances ---------------- */ @@ -62,7 +62,7 @@ style lambda_irsim=0.6(hp) sideOverlap(M1Cap, ~M1Cap, PolyCap, 33, ) sideOverlap(M1Cap, ~M1Cap, M2Cap, 28, ) - sidewall M1Cap ~M1Cap ~M1Cap M1Cap 27 + sidewall M1Cap ~M1Cap ~M1Cap M1Cap 54 /* ------------------------------------------------- */ @@ -79,7 +79,7 @@ style lambda_irsim=0.6(hp) sideOverlap(M2Cap, ~M2Cap, PolyCap, 22, M1Cap) sideOverlap(M2Cap, ~M2Cap, M1Cap, 28, ) - sidewall M2Cap ~M2Cap ~M2Cap M2Cap 33 + sidewall M2Cap ~M2Cap ~M2Cap M2Cap 66 /* ------------------------------------------------- */ diff --git a/scmos/scmos.tech.in b/scmos/scmos.tech.in index cfce72e7..5f599326 100644 --- a/scmos/scmos.tech.in +++ b/scmos/scmos.tech.in @@ -2515,10 +2515,10 @@ style SCN08(HP26G) /* Cross-couple capacitance */ /* Perimeter parasitic capacitance (in attofarads per lambda) [ 1 lambda = 0.4 micron ---> multiplication factor 0.4 ] */ - sidewall allP ~(allP) ~(allP) allP 11 - sidewall allMetal1 ~(allMetal1) ~(allMetal1) allMetal1 24 - sidewall allMetal2 ~(allMetal2) ~(allMetal2) allMetal2 27 - sidewall allMetal3 ~(allMetal3) ~(allMetal3) allMetal3 39 + sidewall allP ~(allP) ~(allP) allP 22 + sidewall allMetal1 ~(allMetal1) ~(allMetal1) allMetal1 48 + sidewall allMetal2 ~(allMetal2) ~(allMetal2) allMetal2 54 + sidewall allMetal3 ~(allMetal3) ~(allMetal3) allMetal3 78 /* Active devices: N-well process */ fet pfet pdiff,pdc 2 pfet Vdd! nwell 0 0 @@ -2620,10 +2620,10 @@ style SCN06(HP14B) /* Cross-couple capacitance */ /* Perimeter parasitic capacitance (in attofarads per lambda) [ 1 lambda = 0.3 micron ---> multiplication factor 0.3 ] */ - sidewall allP ~(allP) ~(allP) allP 9 - sidewall allMetal1 ~(allMetal1) ~(allMetal1) allMetal1 19 - sidewall allMetal2 ~(allMetal2) ~(allMetal2) allMetal2 21 - sidewall allMetal3 ~(allMetal3) ~(allMetal3) allMetal3 31 + sidewall allP ~(allP) ~(allP) allP 18 + sidewall allMetal1 ~(allMetal1) ~(allMetal1) allMetal1 38 + sidewall allMetal2 ~(allMetal2) ~(allMetal2) allMetal2 42 + sidewall allMetal3 ~(allMetal3) ~(allMetal3) allMetal3 62 /* Active devices: N-well process */ fet pfet pdiff,pdc 2 pfet Vdd! nwell 0 0