#%lvsdb-klayout

# Layout
layout(
 top(INVERTER_WITH_DIODES)
 unit(0.001)

 # Layer section
 # This section lists the mask layers (drawing or derived) and their connections.

 # Mask layers
 layer(l3 'NWELL (1/0)')
 layer(l4 'POLY (5/0)')
 layer(l8 'CONTACT (6/0)')
 layer(l11 'METAL1 (7/0)')
 layer(l12 'METAL1_LABEL (7/1)')
 layer(l13 'VIA1 (8/0)')
 layer(l14 'METAL2 (9/0)')
 layer(l15 'METAL2_LABEL (9/1)')
 layer(l7)
 layer(l1)
 layer(l9)
 layer(l5)
 layer(l10)

 # Mask layer connectivity
 connect(l3 l3 l9)
 connect(l4 l4 l8)
 connect(l8 l4 l8 l11 l1 l9 l5 l10)
 connect(l11 l8 l11 l12 l13)
 connect(l12 l11 l12)
 connect(l13 l11 l13 l14)
 connect(l14 l13 l14 l15)
 connect(l15 l14 l15)
 connect(l7 l7)
 connect(l1 l8 l1)
 connect(l9 l3 l8 l9)
 connect(l5 l8 l5)
 connect(l10 l8 l10)

 # Global nets and connectivity
 global(l7 SUBSTRATE)
 global(l10 SUBSTRATE)

 # Device class section
 class(PMOS MOS4)
 class(NMOS MOS4)

 # Device abstracts section
 # Device abstracts list the pin shapes of the devices.
 device(D$PMOS PMOS
  terminal(S
   rect(l1 (-575 -750) (450 1500))
  )
  terminal(G
   rect(l4 (-125 -750) (250 1500))
  )
  terminal(D
   rect(l1 (125 -750) (450 1500))
  )
  terminal(B
   rect(l3 (-125 -750) (250 1500))
  )
 )
 device(D$NMOS NMOS
  terminal(S
   rect(l5 (-575 -450) (450 900))
  )
  terminal(G
   rect(l4 (-125 -450) (250 900))
  )
  terminal(D
   rect(l5 (125 -450) (450 900))
  )
  terminal(B
   rect(l7 (-125 -450) (250 900))
  )
 )

 # Circuit section
 # Circuits are the hierarchical building blocks of the netlist.
 circuit(INVERTER_WITH_DIODES

  # Circuit boundary
  rect((0 0) (3000 6150))

  # Nets with their geometries
  net(1 name(IN)
   rect(l4 (900 50) (250 1050))
   rect(l4 (-250 0) (250 3100))
   rect(l4 (-250 0) (250 1650))
   rect(l4 (-800 -3100) (550 400))
   rect(l8 (-450 -300) (200 200))
   rect(l11 (-300 -300) (400 400))
   rect(l12 (-201 -201) (2 2))
  )
  net(2 name(VDD)
   rect(l3 (0 2950) (3000 3200))
   rect(l8 (-2450 -1800) (200 200))
   rect(l8 (-200 300) (200 200))
   rect(l8 (-200 300) (200 200))
   rect(l8 (1400 -800) (200 200))
   rect(l8 (-200 300) (200 200))
   rect(l11 (-1850 -1200) (300 1600))
   rect(l11 (1300 -1200) (300 1200))
   rect(l13 (-1850 -800) (200 200))
   rect(l13 (-200 300) (200 200))
   rect(l13 (1400 -700) (200 200))
   rect(l13 (-200 300) (200 200))
   rect(l14 (-2350 -850) (3000 1000))
   rect(l15 (-151 -851) (2 2))
   rect(l1 (-2401 -851) (450 1500))
   rect(l9 (1050 -1200) (600 1200))
  )
  net(3 name(OUT)
   rect(l8 (1300 4350) (200 200))
   rect(l8 (-200 300) (200 200))
   rect(l8 (-200 300) (200 200))
   rect(l8 (-200 -5250) (200 200))
   rect(l8 (-200 300) (200 200))
   rect(l11 (-250 3250) (300 1400))
   rect(l11 (-300 -4600) (300 3200))
   rect(l11 (-300 -2900) (450 400))
   rect(l11 (-450 -1550) (300 850))
   rect(l12 (-51 499) (2 2))
   rect(l1 (-351 2649) (450 1500))
   rect(l5 (-450 -5500) (450 900))
  )
  net(4 name(VSS)
   rect(l8 (550 300) (200 200))
   rect(l8 (-200 300) (200 200))
   rect(l8 (1400 -550) (200 200))
   rect(l8 (-200 300) (200 200))
   rect(l11 (-1850 -1100) (300 1050))
   rect(l11 (1300 -1050) (300 1200))
   rect(l13 (-1850 -1100) (200 200))
   rect(l13 (-200 300) (200 200))
   rect(l13 (1400 -700) (200 200))
   rect(l13 (-200 300) (200 200))
   rect(l14 (-2350 -850) (3000 1000))
   rect(l15 (-151 -851) (2 2))
   rect(l5 (-2401 49) (450 900))
   rect(l10 (1050 -900) (600 1200))
  )

  # Devices and their connections
  device(1 D$PMOS
   location(1025 4950)
   param(L 0.25)
   param(W 1.5)
   param(AS 0.675)
   param(AD 0.675)
   param(PS 3.9)
   param(PD 3.9)
   terminal(S 2)
   terminal(G 1)
   terminal(D 3)
   terminal(B 2)
  )
  device(2 D$NMOS
   location(1025 650)
   param(L 0.25)
   param(W 0.9)
   param(AS 0.405)
   param(AD 0.405)
   param(PS 2.7)
   param(PD 2.7)
   terminal(S 4)
   terminal(G 1)
   terminal(D 3)
   terminal(B 4)
  )

 )
)

# Reference netlist
reference(

 # Device class section
 class(PMOS MOS4)
 class(NMOS MOS4)

 # Circuit section
 # Circuits are the hierarchical building blocks of the netlist.
 circuit(INVERTER_WITH_DIODES

  # Nets
  net(1 name(VSS))
  net(2 name(IN))
  net(3 name(OUT))
  net(4 name(VDD))

  # Outgoing pins and their connections to nets
  pin(1)
  pin(2)
  pin(3)
  pin(4)

  # Devices and their connections
  device(1 PMOS
   name(P)
   param(L 0.25)
   param(W 1.5)
   param(AS 0)
   param(AD 0)
   param(PS 0)
   param(PD 0)
   terminal(S 4)
   terminal(G 2)
   terminal(D 3)
   terminal(B 4)
  )
  device(2 NMOS
   name(N)
   param(L 0.25)
   param(W 0.9)
   param(AS 0)
   param(AD 0)
   param(PS 0)
   param(PD 0)
   terminal(S 3)
   terminal(G 2)
   terminal(D 1)
   terminal(B 1)
  )

 )
)

# Cross reference
xref(
 circuit(INVERTER_WITH_DIODES INVERTER_WITH_DIODES match
  xref(
   net(1 2 match)
   net(3 3 match)
   net(2 4 match)
   net(4 1 match)
   pin(() 0 match)
   pin(() 1 match)
   pin(() 2 match)
   pin(() 3 match)
   device(2 2 match)
   device(1 1 match)
  )
 )
)