From e71a4dfb92ceffa86c3062f26fe276e2f9554631 Mon Sep 17 00:00:00 2001 From: Matthias Koefferlein Date: Tue, 26 Sep 2023 22:13:19 +0200 Subject: [PATCH] Simplified test code --- src/db/unit_tests/dbLayoutToNetlistTests.cc | 309 +++++--------------- 1 file changed, 78 insertions(+), 231 deletions(-) diff --git a/src/db/unit_tests/dbLayoutToNetlistTests.cc b/src/db/unit_tests/dbLayoutToNetlistTests.cc index b36e38a07..753302d07 100644 --- a/src/db/unit_tests/dbLayoutToNetlistTests.cc +++ b/src/db/unit_tests/dbLayoutToNetlistTests.cc @@ -3131,234 +3131,6 @@ TEST(12_FlattenCircuitDoesFlattenLayout) db::compare_layouts (_this, ly, au); } -TEST(13_JoinNetNames) -{ - db::Layout ly; - db::LayerMap lmap; - - unsigned int nwell = define_layer (ly, lmap, 1); - unsigned int active = define_layer (ly, lmap, 2); - unsigned int pplus = define_layer (ly, lmap, 10); - unsigned int nplus = define_layer (ly, lmap, 11); - unsigned int poly = define_layer (ly, lmap, 3); - unsigned int poly_lbl = define_layer (ly, lmap, 3, 1); - unsigned int diff_cont = define_layer (ly, lmap, 4); - unsigned int poly_cont = define_layer (ly, lmap, 5); - unsigned int metal1 = define_layer (ly, lmap, 6); - unsigned int metal1_lbl = define_layer (ly, lmap, 6, 1); - unsigned int via1 = define_layer (ly, lmap, 7); - unsigned int metal2 = define_layer (ly, lmap, 8); - unsigned int metal2_lbl = define_layer (ly, lmap, 8, 1); - - { - db::LoadLayoutOptions options; - options.get_options ().layer_map = lmap; - options.get_options ().create_other_layers = false; - - std::string fn (tl::testdata ()); - fn = tl::combine_path (fn, "algo"); - fn = tl::combine_path (fn, "device_extract_l13.gds"); - - tl::InputStream stream (fn); - db::Reader reader (stream); - reader.read (ly, options); - } - - db::Cell &tc = ly.cell (*ly.begin_top_down ()); - db::LayoutToNetlist l2n (db::RecursiveShapeIterator (ly, tc, std::set ())); - - std::unique_ptr rbulk (l2n.make_layer ("bulk")); - std::unique_ptr rnwell (l2n.make_layer (nwell, "nwell")); - std::unique_ptr ractive (l2n.make_layer (active, "active")); - std::unique_ptr rpplus (l2n.make_layer (pplus, "pplus")); - std::unique_ptr rnplus (l2n.make_layer (nplus, "nplus")); - std::unique_ptr rpoly (l2n.make_polygon_layer (poly, "poly")); - std::unique_ptr rpoly_lbl (l2n.make_text_layer (poly_lbl, "poly_lbl")); - std::unique_ptr rdiff_cont (l2n.make_polygon_layer (diff_cont, "diff_cont")); - std::unique_ptr rpoly_cont (l2n.make_polygon_layer (poly_cont, "poly_cont")); - std::unique_ptr rmetal1 (l2n.make_polygon_layer (metal1, "metal1")); - std::unique_ptr rmetal1_lbl (l2n.make_text_layer (metal1_lbl, "metal1_lbl")); - std::unique_ptr rvia1 (l2n.make_polygon_layer (via1, "via1")); - std::unique_ptr rmetal2 (l2n.make_polygon_layer (metal2, "metal2")); - std::unique_ptr rmetal2_lbl (l2n.make_text_layer (metal2_lbl, "metal2_lbl")); - - // derived regions - - db::Region ractive_in_nwell = *ractive & *rnwell; - db::Region rpactive = ractive_in_nwell & *rpplus; - db::Region rntie = ractive_in_nwell & *rnplus; - db::Region rpgate = rpactive & *rpoly; - db::Region rpsd = rpactive - rpgate; - - db::Region ractive_outside_nwell = *ractive - *rnwell; - db::Region rnactive = ractive_outside_nwell & *rnplus; - db::Region rptie = ractive_outside_nwell & *rpplus; - db::Region rngate = rnactive & *rpoly; - db::Region rnsd = rnactive - rngate; - - // return the computed layers into the original layout and write it for debugging purposes - - unsigned int lgate = ly.insert_layer (db::LayerProperties (20, 0)); // 20/0 -> Gate - unsigned int lsd = ly.insert_layer (db::LayerProperties (21, 0)); // 21/0 -> Source/Drain - unsigned int lpdiff = ly.insert_layer (db::LayerProperties (22, 0)); // 22/0 -> P Diffusion - unsigned int lndiff = ly.insert_layer (db::LayerProperties (23, 0)); // 23/0 -> N Diffusion - unsigned int lptie = ly.insert_layer (db::LayerProperties (24, 0)); // 24/0 -> P Tie - unsigned int lntie = ly.insert_layer (db::LayerProperties (25, 0)); // 25/0 -> N Tie - - rpgate.insert_into (&ly, tc.cell_index (), lgate); - rngate.insert_into (&ly, tc.cell_index (), lgate); - rpsd.insert_into (&ly, tc.cell_index (), lsd); - rnsd.insert_into (&ly, tc.cell_index (), lsd); - rpsd.insert_into (&ly, tc.cell_index (), lpdiff); - rnsd.insert_into (&ly, tc.cell_index (), lndiff); - rpsd.insert_into (&ly, tc.cell_index (), lptie); - rnsd.insert_into (&ly, tc.cell_index (), lntie); - - db::NetlistDeviceExtractorMOS4Transistor pmos_ex ("PMOS"); - db::NetlistDeviceExtractorMOS4Transistor nmos_ex ("NMOS"); - - // device extraction - - db::NetlistDeviceExtractor::input_layers dl; - - dl["SD"] = &rpsd; - dl["G"] = &rpgate; - dl["P"] = rpoly.get (); // not needed for extraction but to return terminal shapes - dl["W"] = rnwell.get (); - l2n.extract_devices (pmos_ex, dl); - - dl["SD"] = &rnsd; - dl["G"] = &rngate; - dl["P"] = rpoly.get (); // not needed for extraction but to return terminal shapes - dl["W"] = rbulk.get (); - l2n.extract_devices (nmos_ex, dl); - - // net extraction - - l2n.register_layer (rpsd, "psd"); - l2n.register_layer (rnsd, "nsd"); - l2n.register_layer (rptie, "ptie"); - l2n.register_layer (rntie, "ntie"); - - // Intra-layer - l2n.connect (rpsd); - l2n.connect (rnsd); - l2n.connect (*rnwell); - l2n.connect (*rpoly); - l2n.connect (*rdiff_cont); - l2n.connect (*rpoly_cont); - l2n.connect (*rmetal1); - l2n.connect (*rvia1); - l2n.connect (*rmetal2); - l2n.connect (rptie); - l2n.connect (rntie); - // Inter-layer - l2n.connect (rpsd, *rdiff_cont); - l2n.connect (rnsd, *rdiff_cont); - l2n.connect (*rpoly, *rpoly_cont); - l2n.connect (*rpoly_cont, *rmetal1); - l2n.connect (*rdiff_cont, *rmetal1); - l2n.connect (*rdiff_cont, rptie); - l2n.connect (*rdiff_cont, rntie); - l2n.connect (*rnwell, rntie); - l2n.connect (*rmetal1, *rvia1); - l2n.connect (*rvia1, *rmetal2); - l2n.connect (*rpoly, *rpoly_lbl); // attaches labels - l2n.connect (*rmetal1, *rmetal1_lbl); // attaches labels - l2n.connect (*rmetal2, *rmetal2_lbl); // attaches labels - // Global - l2n.connect_global (rntie, "VDD"); - l2n.connect_global (*rnwell, "VDD"); - l2n.connect_global (rptie, "VSS"); - l2n.connect_global (*rbulk, "VSS"); - - // Extract with joining VSS and VDD - l2n.join_net_names (tl::GlobPattern ("{VSS,VDD}")); - l2n.extract_netlist (); - - // debug layers produced for nets - // 201/0 -> Well - // 203/0 -> Poly - // 204/0 -> Diffusion contacts - // 205/0 -> Poly contacts - // 206/0 -> Metal1 - // 207/0 -> Via1 - // 208/0 -> Metal2 - // 210/0 -> N source/drain - // 211/0 -> P source/drain - // 212/0 -> N tie - // 213/0 -> P tie - std::map dump_map; - dump_map [&rpsd ] = ly.insert_layer (db::LayerProperties (210, 0)); - dump_map [&rnsd ] = ly.insert_layer (db::LayerProperties (211, 0)); - dump_map [&rptie ] = ly.insert_layer (db::LayerProperties (212, 0)); - dump_map [&rntie ] = ly.insert_layer (db::LayerProperties (213, 0)); - dump_map [rbulk.get () ] = ly.insert_layer (db::LayerProperties (214, 0)); - dump_map [rnwell.get () ] = ly.insert_layer (db::LayerProperties (201, 0)); - dump_map [rpoly.get () ] = ly.insert_layer (db::LayerProperties (203, 0)); - dump_map [rdiff_cont.get ()] = ly.insert_layer (db::LayerProperties (204, 0)); - dump_map [rpoly_cont.get ()] = ly.insert_layer (db::LayerProperties (205, 0)); - dump_map [rmetal1.get () ] = ly.insert_layer (db::LayerProperties (206, 0)); - dump_map [rvia1.get () ] = ly.insert_layer (db::LayerProperties (207, 0)); - dump_map [rmetal2.get () ] = ly.insert_layer (db::LayerProperties (208, 0)); - - // write nets to layout - db::CellMapping cm = l2n.cell_mapping_into (ly, tc); - dump_nets_to_layout (l2n, ly, dump_map, cm); - - dump_map.clear (); - dump_map [&rpsd ] = ly.insert_layer (db::LayerProperties (310, 0)); - dump_map [&rnsd ] = ly.insert_layer (db::LayerProperties (311, 0)); - dump_map [&rptie ] = ly.insert_layer (db::LayerProperties (312, 0)); - dump_map [&rntie ] = ly.insert_layer (db::LayerProperties (313, 0)); - dump_map [rbulk.get () ] = ly.insert_layer (db::LayerProperties (314, 0)); - dump_map [rnwell.get () ] = ly.insert_layer (db::LayerProperties (301, 0)); - dump_map [rpoly.get () ] = ly.insert_layer (db::LayerProperties (303, 0)); - dump_map [rdiff_cont.get ()] = ly.insert_layer (db::LayerProperties (304, 0)); - dump_map [rpoly_cont.get ()] = ly.insert_layer (db::LayerProperties (305, 0)); - dump_map [rmetal1.get () ] = ly.insert_layer (db::LayerProperties (306, 0)); - dump_map [rvia1.get () ] = ly.insert_layer (db::LayerProperties (307, 0)); - dump_map [rmetal2.get () ] = ly.insert_layer (db::LayerProperties (308, 0)); - - dump_recursive_nets_to_layout (l2n, ly, dump_map, cm); - - // compare netlist as string - CHECKPOINT (); - db::compare_netlist (_this, *l2n.netlist (), - "circuit RINGO ();\n" - " subcircuit INV2 $1 (IN=$I7,$2=FB,OUT=OSC,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" - " subcircuit INV2 $2 (IN=FB,$2=$I34,OUT=$I17,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" - " subcircuit INV2 $3 (IN=$3,$2=$I38,OUT=$I4,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" - " subcircuit INV2 $4 (IN=$I2,$2=$I37,OUT=$3,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" - " subcircuit INV2 $5 (IN=$I4,$2=$I39,OUT=$I5,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" - " subcircuit INV2 $6 (IN=$I5,$2=$I40,OUT=$I6,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" - " subcircuit INV2 $7 (IN=$I6,$2=$I41,OUT=$I7,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" - " subcircuit INV2 $8 (IN=$I17,$2=$I35,OUT=$I1,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" - " subcircuit INV2 $9 (IN=$I1,$2=$I36,OUT=$I2,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" - "end;\n" - "circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5,VDD=VDD,VSS=VSS);\n" - " device PMOS $1 (S=$2,G=IN,D=$5,B=VDD) (L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5);\n" - " device PMOS $2 (S=$5,G=$2,D=OUT,B=VDD) (L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95);\n" - " device NMOS $3 (S=$2,G=IN,D=$4,B=VSS) (L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5);\n" - " device NMOS $4 (S=$4,G=$2,D=OUT,B=VSS) (L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95);\n" - " subcircuit TRANS $1 ($1=$2,$2=$4,$3=IN);\n" - " subcircuit TRANS $2 ($1=$2,$2=$5,$3=IN);\n" - " subcircuit TRANS $3 ($1=$5,$2=OUT,$3=$2);\n" - " subcircuit TRANS $4 ($1=$4,$2=OUT,$3=$2);\n" - "end;\n" - "circuit TRANS ($1=$1,$2=$2,$3=$3);\n" - "end;\n" - ); - - // compare the collected test data - - std::string au = tl::testdata (); - au = tl::combine_path (au, "algo"); - au = tl::combine_path (au, "device_extract_au13_circuits.gds"); - - db::compare_layouts (_this, ly, au); -} - namespace { @@ -3494,9 +3266,6 @@ public: l2n.connect (*rpoly, *rpoly_lbl); // attaches labels l2n.connect (*rmetal1, *rmetal1_lbl); // attaches labels l2n.connect (*rmetal2, *rmetal2_lbl); // attaches labels - // Global - l2n.connect_global (*rbulk, "BULK"); - l2n.connect_global (rptie, "BULK"); return l2n_p.release (); } @@ -3574,6 +3343,8 @@ public: private: db::Layout &m_ly; db::LayerMap m_lmap; + +public: unsigned int nwell; unsigned int nwell_lbl; unsigned int active; @@ -3617,6 +3388,78 @@ private: } +TEST(13_JoinNetNames) +{ + db::Layout ly; + TestRig test_rig (ly); + + { + db::LoadLayoutOptions options; + options.get_options ().layer_map = test_rig.lmap (); + options.get_options ().create_other_layers = false; + + std::string fn (tl::testdata ()); + fn = tl::combine_path (fn, "algo"); + fn = tl::combine_path (fn, "device_extract_l13.gds"); + + tl::InputStream stream (fn); + db::Reader reader (stream); + reader.read (ly, options); + } + + std::unique_ptr l2n (test_rig.make_l2n ()); + + // Global + l2n->connect_global (test_rig.rntie, "VDD"); + l2n->connect_global (*test_rig.rnwell, "VDD"); + l2n->connect_global (test_rig.rptie, "VSS"); + l2n->connect_global (*test_rig.rbulk, "VSS"); + + // Extract with joining VSS and VDD + l2n->join_net_names (tl::GlobPattern ("{VSS,VDD}")); + + l2n->extract_netlist (); + + test_rig.dump_nets (*l2n); + test_rig.dump_nets_recursive (*l2n); + + // compare netlist as string + CHECKPOINT (); + db::compare_netlist (_this, *l2n->netlist (), + "circuit RINGO ();\n" + " subcircuit INV2 $1 (IN=$I7,$2=FB,OUT=OSC,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" + " subcircuit INV2 $2 (IN=FB,$2=$I34,OUT=$I17,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" + " subcircuit INV2 $3 (IN=$3,$2=$I38,OUT=$I4,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" + " subcircuit INV2 $4 (IN=$I2,$2=$I37,OUT=$3,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" + " subcircuit INV2 $5 (IN=$I4,$2=$I39,OUT=$I5,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" + " subcircuit INV2 $6 (IN=$I5,$2=$I40,OUT=$I6,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" + " subcircuit INV2 $7 (IN=$I6,$2=$I41,OUT=$I7,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" + " subcircuit INV2 $8 (IN=$I17,$2=$I35,OUT=$I1,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" + " subcircuit INV2 $9 (IN=$I1,$2=$I36,OUT=$I2,$4=VSS,$5=VDD,VDD=VDD,VSS=VSS);\n" + "end;\n" + "circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5,VDD=VDD,VSS=VSS);\n" + " device PMOS $1 (S=$2,G=IN,D=$5,B=VDD) (L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5);\n" + " device PMOS $2 (S=$5,G=$2,D=OUT,B=VDD) (L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95);\n" + " device NMOS $3 (S=$2,G=IN,D=$4,B=VSS) (L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5);\n" + " device NMOS $4 (S=$4,G=$2,D=OUT,B=VSS) (L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95);\n" + " subcircuit TRANS $1 ($1=$2,$2=$4,$3=IN);\n" + " subcircuit TRANS $2 ($1=$2,$2=$5,$3=IN);\n" + " subcircuit TRANS $3 ($1=$5,$2=OUT,$3=$2);\n" + " subcircuit TRANS $4 ($1=$4,$2=OUT,$3=$2);\n" + "end;\n" + "circuit TRANS ($1=$1,$2=$2,$3=$3);\n" + "end;\n" + ); + + // compare the collected test data + + std::string au = tl::testdata (); + au = tl::combine_path (au, "algo"); + au = tl::combine_path (au, "device_extract_au13_circuits.gds"); + + db::compare_layouts (_this, ly, au); +} + TEST(14_JoinNets) { db::Layout ly; @@ -3638,6 +3481,10 @@ TEST(14_JoinNets) std::unique_ptr l2n (test_rig.make_l2n ()); + // Global + l2n->connect_global (*test_rig.rbulk, "BULK"); + l2n->connect_global (test_rig.rptie, "BULK"); + // Extract while joining VSS with BULK and VDD with NWELL std::set jn; jn.insert ("VDD");