From e5852a7757641c884cb6314610ee7c614594c5db Mon Sep 17 00:00:00 2001 From: Matthias Koefferlein Date: Fri, 19 Jul 2019 00:14:57 +0200 Subject: [PATCH] Updated alternative golden test data for Windows too --- testdata/algo/lvs_test1b_au.lvsdb.2 | 49 +++++++++++++--------- testdata/algo/lvs_test2b_au.lvsdb.2 | 63 +++++++++++++++++------------ 2 files changed, 67 insertions(+), 45 deletions(-) diff --git a/testdata/algo/lvs_test1b_au.lvsdb.2 b/testdata/algo/lvs_test1b_au.lvsdb.2 index bfae714a8..dbcdf7f3e 100644 --- a/testdata/algo/lvs_test1b_au.lvsdb.2 +++ b/testdata/algo/lvs_test1b_au.lvsdb.2 @@ -112,6 +112,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(INV2 + # Circuit boundary + rect((-1700 -2440) (3100 7820)) + # Nets with their geometries net(1 rect(nwell (-1400 1800) (2800 3580)) @@ -259,6 +262,9 @@ layout( ) circuit(INV2PAIR + # Circuit boundary + rect((0 -1640) (5740 7820)) + # Nets with their geometries net(1 name(BULK)) net(2 @@ -374,6 +380,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((-1720 -2440) (26880 7820)) + # Nets with their geometries net(1 name(FB) rect(diff_cont (20210 90) (220 220)) @@ -790,16 +799,17 @@ reference( net(6 name('6')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(5 name('5')) + pin(6 name('6')) # Devices and their connections device(1 PMOS - name($1) param(L 0.25) + name($1) + param(L 0.25) param(W 3.5) param(AS 1.4) param(AD 1.4) @@ -811,7 +821,8 @@ reference( terminal(B 1) ) device(2 NMOS - name($3) param(L 0.25) + name($3) + param(L 0.25) param(W 3.5) param(AS 1.4) param(AD 1.4) @@ -836,13 +847,13 @@ reference( net(7 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) - pin(7) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(5 name('5')) + pin(6 name('6')) + pin(7 name('7')) # Subcircuits and their connections circuit(1 INV2 name($1) @@ -876,10 +887,10 @@ reference( net(8 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) # Subcircuits and their connections circuit(1 INV2PAIR name($1) diff --git a/testdata/algo/lvs_test2b_au.lvsdb.2 b/testdata/algo/lvs_test2b_au.lvsdb.2 index eef170b01..6f4b5e8d3 100644 --- a/testdata/algo/lvs_test2b_au.lvsdb.2 +++ b/testdata/algo/lvs_test2b_au.lvsdb.2 @@ -112,6 +112,9 @@ layout( # Circuits are the hierarchical building blocks of the netlist. circuit(INV2 + # Circuit boundary + rect((-1700 -2440) (3100 7820)) + # Nets with their geometries net(1 rect(nwell (-1400 1800) (2800 3580)) @@ -259,6 +262,9 @@ layout( ) circuit(INV2PAIR + # Circuit boundary + rect((0 -1640) (5740 7820)) + # Nets with their geometries net(1 name(BULK)) net(2 @@ -374,6 +380,9 @@ layout( ) circuit(RINGO + # Circuit boundary + rect((-1720 -2440) (26880 7820)) + # Nets with their geometries net(1 name(FB) rect(diff_cont (20210 90) (220 220)) @@ -790,16 +799,17 @@ reference( net(6 name('6')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(5 name('5')) + pin(6 name('6')) # Devices and their connections device(1 PMOS - name($1) param(L 0.25) + name($1) + param(L 0.25) param(W 3.5) param(AS 1.4) param(AD 1.4) @@ -811,7 +821,8 @@ reference( terminal(B 1) ) device(2 NMOS - name($3) param(L 0.25) + name($3) + param(L 0.25) param(W 3.5) param(AS 1.4) param(AD 1.4) @@ -835,13 +846,13 @@ reference( net(6 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin() - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(name('5')) + pin(5 name('6')) + pin(6 name('7')) # Subcircuits and their connections circuit(1 INV2 name($2) @@ -867,10 +878,10 @@ reference( net(8 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) # Subcircuits and their connections circuit(1 INV2PAIR name($1) @@ -928,13 +939,13 @@ reference( net(6 name('7')) # Outgoing pins and their connections to nets - pin(1) - pin(2) - pin(3) - pin(4) - pin() - pin(5) - pin(6) + pin(1 name('1')) + pin(2 name('2')) + pin(3 name('3')) + pin(4 name('4')) + pin(name('5')) + pin(5 name('6')) + pin(6 name('7')) # Subcircuits and their connections circuit(1 INV2 name($2)