From d4634f8620b904e9d26f2198a576fce5b1e803b5 Mon Sep 17 00:00:00 2001 From: Matthias Koefferlein Date: Thu, 30 May 2019 07:12:49 +0200 Subject: [PATCH] Try to establish reproducability of clock tree compare test. --- src/db/unit_tests/dbNetlistCompareTests.cc | 68 ++++++++++++---------- 1 file changed, 37 insertions(+), 31 deletions(-) diff --git a/src/db/unit_tests/dbNetlistCompareTests.cc b/src/db/unit_tests/dbNetlistCompareTests.cc index d07e904b4..32d9b07d6 100644 --- a/src/db/unit_tests/dbNetlistCompareTests.cc +++ b/src/db/unit_tests/dbNetlistCompareTests.cc @@ -2611,7 +2611,13 @@ TEST(18_ClockTree) bool good = comp.compare (&nl1, &nl2); - EXPECT_EQ (logger.text (), + std::string txt = logger.text (); + // because L/R matching is ambiguous, we need to do this to + // establish reproducability on different platforms: + txt = tl::replaced (txt, "L", "X"); + txt = tl::replaced (txt, "R", "X"); + + EXPECT_EQ (txt, "begin_circuit INV INV\n" "match_nets VDD VDD\n" "match_nets OUT OUT\n" @@ -2624,41 +2630,41 @@ TEST(18_ClockTree) "match_devices $1 $1\n" "match_devices $2 $2\n" "end_circuit INV INV MATCH\n" - "begin_circuit TREE TREE\n" + "begin_circuit TXEE TXEE\n" "match_nets IN IN\n" "match_nets S S\n" "match_nets VDD VDD\n" "match_nets VSS VSS\n" - "match_ambiguous_nets SL SR\n" - "match_ambiguous_nets SR SL\n" - "match_ambiguous_nets SLL SRL\n" - "match_ambiguous_nets SLR SRR\n" - "match_ambiguous_nets SLLL SRLL\n" - "match_ambiguous_nets SLLR SRLR\n" - "match_ambiguous_nets SLRL SRRL\n" - "match_ambiguous_nets SLRR SRRR\n" - "match_ambiguous_nets SRL SLL\n" - "match_ambiguous_nets SRR SLR\n" - "match_ambiguous_nets SRLL SLLR\n" - "match_ambiguous_nets SRLR SLLL\n" - "match_ambiguous_nets SRRL SLRR\n" - "match_ambiguous_nets SRRR SLRL\n" - "match_subcircuits TRRL TLRR\n" - "match_subcircuits TL TR\n" - "match_subcircuits TLRL TRRL\n" - "match_subcircuits TLLR TRLR\n" - "match_subcircuits TRR TLR\n" - "match_subcircuits TRL TLL\n" - "match_subcircuits TLRR TRRR\n" - "match_subcircuits TRLR TLLL\n" - "match_subcircuits TRRR TLRL\n" + "match_ambiguous_nets SX SX\n" + "match_ambiguous_nets SX SX\n" + "match_ambiguous_nets SXX SXX\n" + "match_ambiguous_nets SXX SXX\n" + "match_ambiguous_nets SXXX SXXX\n" + "match_ambiguous_nets SXXX SXXX\n" + "match_ambiguous_nets SXXX SXXX\n" + "match_ambiguous_nets SXXX SXXX\n" + "match_ambiguous_nets SXX SXX\n" + "match_ambiguous_nets SXX SXX\n" + "match_ambiguous_nets SXXX SXXX\n" + "match_ambiguous_nets SXXX SXXX\n" + "match_ambiguous_nets SXXX SXXX\n" + "match_ambiguous_nets SXXX SXXX\n" + "match_subcircuits TXXX TXXX\n" + "match_subcircuits TX TX\n" + "match_subcircuits TXXX TXXX\n" + "match_subcircuits TXXX TXXX\n" + "match_subcircuits TXX TXX\n" + "match_subcircuits TXX TXX\n" + "match_subcircuits TXXX TXXX\n" + "match_subcircuits TXXX TXXX\n" + "match_subcircuits TXXX TXXX\n" "match_subcircuits T T\n" - "match_subcircuits TRLL TLLR\n" - "match_subcircuits TR TL\n" - "match_subcircuits TLR TRR\n" - "match_subcircuits TLLL TRLL\n" - "match_subcircuits TLL TRL\n" - "end_circuit TREE TREE MATCH" + "match_subcircuits TXXX TXXX\n" + "match_subcircuits TX TX\n" + "match_subcircuits TXX TXX\n" + "match_subcircuits TXXX TXXX\n" + "match_subcircuits TXX TXX\n" + "end_circuit TXEE TXEE MATCH" ); EXPECT_EQ (good, true); }